This document discusses the design and simulation of a high-speed CMOS differential current sensing comparator in 0.35μm and 0.25μm technologies. It presents the circuit design of the differential current sensing comparator and output buffer stage. Various performance metrics of the comparator like propagation delay, speed, power dissipation, offset voltage, and input common mode range are analyzed through simulations in the two technologies. The results show improvements in speed, power dissipation, and input common mode range in the 0.25μm technology compared to the 0.35μm technology.