Presentation on Intel microprocessors till pentium series

1. Evolution of microprocessors Intel 4004 Intel 8008, 8080, 8088 Intel 8086, 8088, 80188 Intel 80186, 80286, 80386, 80486… Intel Core Series Intel Pentium Series

3. The total addressable memory size is 1MB KB.

4. Processor instructions use 16-bit pointers the processor can effectively address only 64 KB of memory.

6. Two independent high-speed DMA channels

7. Programmable interrupt controller

8. Three programmable 16-bit timers

9. Programmable wait state generator

10. Local bus controller

11. Programmable memory and peripheral chip-select logicElectrical Parameter :

13. 16 MB of memory to be addressed by the on-chip linear memory management unit (MMU) with 1 GB logical address space.

14. The 80286 provided the first glimpse into the world of the protection mechanisms, allowing Real program multitasking.

16. Manufacturing Process - 1.5 micron.

17. Data width 16 bits.

18. Physical memory – 1 MB (real mode), 16 MB (protected mode).

19. Virtual Memory 1GB.Electrical Parameter :

21. It had 275,000 transistors and were used as the central processing unit (CPU) of many personal computers.

23. Data width – 32 bits.

24. Physical Memory – 4 GB.

25. Virtual Memory – 64 TB.Electrical Parameter :

27. The 80486 was the first tightlypipelined x86 design.

28. It use more than a million transistors, it represents a fourth generation of binary compatible CPUs.

30. Data width – 32 bits.

31. Level 1 cache size - 8 KB 4-way set associative unified code and data cache.

32. Physical memory – 4 GB.

33. Virtual Memory – 64 TB.

34. On-chip peripherals - Memory management unit.Electrical Parameter :

36. Binary compatible with older generations of x86 processors.

37. Branch prediction.

38. Dual processor support.

39. Superscalar architecture (2 pipe-lined integer units + 1 pipe-lined FPU).

40. FPUperformance enhancements.

41. Separate 16 KB code and 16 KB data cache.

42. Power management features.

43. 3.3V input/output level and 2.8V core.New 67 MMX instructions and 4 new 64 bit data types.

45. Data Width – 32 (64 bit data bus) bit.

46. Level 1 cache size - 16 KB 4-way set associative code cache, 16 KB 4-way set associative write-back data cache.

47. Physical Memory – 4 GB.

48. Multiprocessing - Up to 2 processors.

49. Low power features - System Management Mode, Clock Control, SL power-management features.

50. On-chip peripherals - Memory Management Unit, Local Advanced Programmable Interrupt Controller.

53. Pentium II featured an improved version of the first P6-generation core of the Pentium Pro, which contained 5.5 million transistors.

54. the Pentium II CPU was packaged in a slot-based module rather than a CPU socket.

55. The improved 16-bit performance and MMX support made it a better choice for consumer-level operating systems, such as Windows 9x.

57. Data Width – 32 bits.

58. Data bus Width – 64 bits.

59. Floating Point Unit – integrated.

60. Level 1 cache size - 16 KB code, 16 KB data.

61. Level 2 cache size - 512 KB unified cache running at 1/2 of processor frequency.

62. Physical memory – 64 GB.

63. Low power features – Auto HALT state, Stop Grant state, Sleep state, Deep sleep state.Electrical parameters :

65. These Pentium III CPUs were packaged in SECC 2 package, plugged into Slot 1 connector, used the same 0.25 micron manufacturing technology.

67. Data Width – 32 (64 bit Data bus) bit.

68. Floating Point Unit – Integrated.

69. Level 1 cache size - 16 KB instruction cache, 16 KB data cache.

70. Level 2 cache size - Half-speed in-package 512 KB.

71. MMX technology.

72. SSE instructions.

73. Low power features – Auto HALT state , Stop Grant state , Sleep state , Deep Sleep state , System Management Mode.

74. Multiprocessing – Up to 2 processors.Electrical parameters :

76. One of key features of Pentium 4 processor was Hyper-Pipelined Technology - 20-stage pipeline, that was two times longer than in previous generation of Pentium processors.

77. Trace Execution Cache, Advanced Transfer Cache, Enhanced Branch prediction, Quad Data Rate bus and Hyper-Threading technology.

79. Data width – 32 bits.

80. Floating Point Unit – Integrated.

81. Level 1 cache size - Execution trace cache for up to 12K decoded micro-operations, 8 KB data cache.

82. Level 2 cache size - 512 KB 8-way associative full-speed on-die cache.

83. MMX, SSE, SEE 2.

84. Low power features - System Management Mode, Auto-HALT mode, Stop Grant mode, Sleep mode .Electrical parameters :