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# Does anyone know how to translate this MIPS assembly code to its equiv.docx

Does anyone know how to translate this MIPS assembly code to its equivalent C statements, assuming that the registers #s1, \$s2, \$t1 and \$t2 are integers a, b, i and j, respectively? addi \$t1, \$0, 0 LOOP: slti \$at, \$t1, 15 beq \$at, \$0, EXITLOOP addi \$t2, \$0, 20 LOOP2: beq \$t2, \$0, EXITLOOP2 addi \$s2, \$s2, 5 addi \$t2, \$t2, -1 j LOOP2 EXITLOOP2: addi \$t1, \$t1, 1 j LOOP EXITLOOP:
Solution
i=0;
while(i<15){
j=20;
while(j!=0){
b=b+5;
j=j-1;
}
i=i+1;
}
.

Does anyone know how to translate this MIPS assembly code to its equivalent C statements, assuming that the registers #s1, \$s2, \$t1 and \$t2 are integers a, b, i and j, respectively? addi \$t1, \$0, 0 LOOP: slti \$at, \$t1, 15 beq \$at, \$0, EXITLOOP addi \$t2, \$0, 20 LOOP2: beq \$t2, \$0, EXITLOOP2 addi \$s2, \$s2, 5 addi \$t2, \$t2, -1 j LOOP2 EXITLOOP2: addi \$t1, \$t1, 1 j LOOP EXITLOOP:
Solution
i=0;
while(i<15){
j=20;
while(j!=0){
b=b+5;
j=j-1;
}
i=i+1;
}
.

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### Does anyone know how to translate this MIPS assembly code to its equiv.docx

1. 1. Does anyone know how to translate this MIPS assembly code to its equivalent C statements, assuming that the registers #s1, \$s2, \$t1 and \$t2 are integers a, b, i and j, respectively? addi \$t1, \$0, 0 LOOP: slti \$at, \$t1, 15 beq \$at, \$0, EXITLOOP addi \$t2, \$0, 20 LOOP2: beq \$t2, \$0, EXITLOOP2 addi \$s2, \$s2, 5 addi \$t2, \$t2, -1 j LOOP2 EXITLOOP2: addi \$t1, \$t1, 1 j LOOP EXITLOOP: Solution i=0; while(i<15){ j=20; while(j!=0){ b=b+5; j=j-1; } i=i+1; }