Presentation for a lecture in the doctoral series at Stefan cel Mare University, Suceava, Romania, May 2009.
Aim was to show current generation the rich history of computer hardarware and that many of the recent innovations in CPU design have their origins in designs of teh 50s and 60s.
1. CPU Architecture Historical Perspective Leading to the CPU of today’s PCs OLLSCOIL LUIMNIGH UNIVERSITY OF LIMERICK Timothy Hall Dept Electronic & Computer Engineering, University of Limerick Professor (hc) Computer Science, Stefan cel Mare University of Suceava
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4. CPU Architecture "I think that there is a world market for maybe five computers." - remark attributed to Thomas J. Watson, chairman of IBM, 1943
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6. Technology Relays, Thermionic valve, Diodes and Bipolar Transistors, RTL then TTL integrated circuits, MOS integrated circuits, LSI and VLSI
10. CPU Architecture Where to start? Not here! www.computersciencelab.com/ComputerHistory/History.htm
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13. CPU Architecture Eckert & Mauchley ENIAC: Begun 1943 finished 1946 5000 operations a second Programmed by plugboard & switches I/O: card, lights, plugs, switches Size: floor area 100 sq metres
14. CPU Architecture Colossus 1. 1944 Used for code breaking by the British Programmed by Patch cord and switches I/O: paper tape, teleprinter 1500 thermionic valves 5000 operations a second Reliability?: Never switched off unless malfunctioned. Followed by Colossus Mk2, 2400 valves, 25000 operations a second
15. CPU Architecture Harvard Mark 1 1944: Electromechanical, programmable (really an automatic calculator),16m long, 2m high, more reliable than contempary valve machines
16. CPU Architecture EDSAC. 1949 First practical programmable stored program computer 1k words of memory 17 bit word Mercury delay line memory 700 operations a second I/O: punched tape, teleprinter Programmed by a primitive assembler set-up by hand on uniselectors and transferred into memory. Wilkes: Cambridge University Mathematics Lab
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18. CPU Architecture “ From then on, when anything went wrong with a computer, we said it had bugs in it (an error in the 1940s Harvard mark 11 computer was traced to a moth trapped inside).” - Rear Admiral Grace Murray Hopper, US Navy
19. CPU Architecture Manchester Mark 1 . 1949 Begun 1947 1300 valves Memory: 128 + 1024 40 bit words Memory: Cathode Ray tube and magnetic drum I/O: papertape, teleprinter Programming: switches Add time 1.8 microseconds Design: Williams & Kilburn
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22. CPU Architecture SEAC 1950 Diode logic 10500 diodes and 1500 valves Mercury delayline memory 512 words 45 bits Clock 1MHz Add 864 microseconds Magnetic Tape external storage I/O: teleprinter or mag tape & remote teleprinter Used for scientific calculation: Meteorology, navigation etc..
23. CPU Architecture ACE 1950 Start of project:1948 Completed:1950 Add time:1.8 microseconds Input/output:cards Memory size:352 32-digit words Memory type:delay lines Technology:800 valves Floor space:1.5 sq metres Project leader:J. H. Wilkinson
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26. CPU Architecture Clock 500kHz Instruction time 1.5 ms Multiple I/O streams I/O: paper tape & punch, card reader & punch, mag tape Memory: mercury delay line 2048 35 bit words Initially used for production planning, later for inventory and payroll – 1 st MIS LEO 1951
27. CPU Architecture IBM 701. 1953 IBM’s first commercial scientific computer. 19 were sold. KOMPILER compiler and run-time environment, later FORTRAN Memory 2048 36 bit words (expandable to 4096) Multiply/divide 456 microseconds
28. CPU Architecture Magnetic Core Memory. First used in Whilrwind computer 1953 First Random Access memory. Non-volatile. Faster and more reliable than earlier memory technology
29. CPU Architecture Memory access is as a read/write cycle Required address is decoded as X & Y coordinates and a current pulse applied If the core where X & Y are coincident is a 0 no signal on the sense line, if a 1 the magnetic state of the core is flipped and there is a sense pulse This read is destructive so the data has to be written back Magnetic core memory is non-volatile Magnetic Core Memory
30. CPU Architecture 1954. Silicon Transistor Texas Instruments 1955. TRADIC Bell Labs First transistorized computer 800 transistors 10000 diodes Power less than 100 Watts (a twelfth power required by valves) In the photo a program is being Loaded via a plugboard
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33. CPU Architecture IBM´s 7000 series mainframes were the company's first transistorized computers. Top of the line was the 7030 "Stretch." Nine of the computers, which featured a 64-bit word and other innovations, were sold to US national laboratories and other scientific users. It’s designer L. R. Johnson first used the term "architecture" in describing the Stretch. 1959 IBM 7000 series
34. CPU Architecture 1960 DEC PDP1 50 were build, cost $120,000. It had a cathode ray tube graphic display, needed no air conditioning and required only one operator. The display intrigued early hackers at MIT, who wrote the first computerized video game, SpaceWar!, for it. SpaceWar became The standard demonstration on all 50.
35. CPU Architecture Fairchild invented the resistor-transistor logic (RTL). The first product a set/reset flip-flop and the first integrated circuit available as a monolithic chip. 1961 RTL ICs
36. " But what...is it good for?" -Engineer at the Advanced Computing Systems Division of IBM, 1968, commenting on the microchip
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38. CPU Architecture 1964 IBM System/360 IBM System/360: a family of six mutually compatible computers and 40 peripherals that could work together. The initial investment of $5 billion was quickly returned as orders for the system climbed to 1,000 per month within two years. At the time IBM released the System/360, the company was making a transition from discrete transistors to integrated circuits, and its major source of revenue moved from punched-card equipment to electronic computer systems.
39. CPU Architecture Digital Equipment Corp. introduced the PDP-8, the first commercially successful minicomputer. The PDP-8 sold for $18,000, one-fifth the price of a small IBM 360 mainframe. The speed, small size, and reasonable cost enabled the PDP-8 to go into thousands of manufacturing plants, small businesses, and scientific laboratories. 1965 DEC PDP8
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41. CPU Architecture CDC´s 6600 supercomputer, designed by Seymour Cray, performed up to 3 million instructions per second. The 6600 retained the distinction of being the fastest computer in the world until surpassed by its successor, the CDC 7600, in 1968. Part of the speed came from the computer's design, which had 10 small computers, known as peripheral processors, funneling data to a large central processing unit. 1964 CDC 6600
42. CPU Architecture Hewlett-Packard entered the general purpose computer business with its HP-2115, offering a computational power formerly found only in much larger computers. It supported a wide variety of languages, among them BASIC, ALGOL, and FORTRAN. The photo shows the familiar teleprinter for papertape I/O and printer for output. The CPU with binary display and switches. Thes second box is core memory 1966 HP-2115
43. CPU Architecture Fairchild produced the first standard metal oxide semiconductor MOS product for data processing applications, an eight-bit arithmetic unit and accumulator. 1967 1 st data processing MOS ic
44. CPU Architecture Data General Corp., started by a group of engineers that had left DEC., introduced the Nova, with 32 kilobytes of memory, for $8,000. In the photograph, Ed deCastro, president and founder of Data General, sits with a Nova minicomputer. The simple architecture of the Nova instruction set inspired Steve Wozniak´s Apple I board eight years later. 1968 DG Nova
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47. CPU Architecture A thought experiment by the English Mathemetician Alan Turing in 1936. Decisions are based on the current state (the result of what happened before) and the data being read, the “head” moves back and forth based on this decision. This encapsulates the action of a digital computer’s CPU, the current state and new data are manipulated according to an instruction and what happens next is determined.
48. CPU Architecture Von Neumann architecture. Data and instructions are stored in memory, the Control Unit takes instructions and controls data manipulation in the Arithmetic Logic Unit. Input/Output is needed to make the machine a practicality Memory Control ALU I/O
49. CPU Architecture CPU Architecture The ALU manipulates two binary words according to the instruction decoded in the Control unit. The result is in the Accumulator and may be moved into Memory.
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52. CPU Architecture CPU Architecture ALU A X Y In the simplest, minimum hardware, solution one of them, say X, is the accumulator A, the other, Y, is straight off the memory bus (this requires a temporary register not visible to the programmer). The instruction may be ADDA, which means: add to the contents of A the number (Y) and put the answer in A. data bus
58. CPU Architecture 1972: INTEL 8008 A vast improvement over the 4004, its eight-bit word afforded 256 unique arrangements of ones and zeros. For the first time, a microprocessor could handle both uppercase and lowercase letters, all 10 numerals, punctuation marks, and a host of other symbols, as in ASCII. And led to the early microcomputers….
59. CPU Architecture 1973: Micral The Micral was the earliest commercial, non-kit personal computer based on a micro-processor, the Intel 8008. Thi Truong developed the computer and Philippe Kahn the software. Truong, founder and president of the French company R2E, created the Micral as a replacement for minicomputers in situations that didn´t require high performance. Selling for $1,750, the Micral never penetrated the U.S. market. In 1979, Truong sold Micral to Bull. There are other very early microcomputers, see: www.digibarn.com/stories/bill-pentz-story/index.html The 8008 was quickly followed by the more functional 8080….
60. CPU Architecture 1975: Altair 8800 The January edition of Popular Electronics featured the Altair 8800 computer kit, based on Intel 8080 microprocessor, on its cover. Within weeks of the computer's debut, customers inundated the manufacturing company, MITS, with orders. Bill Gates and Paul Allen licensed BASIC as the software language for the Altair. Ed Roberts invented the 8800 — which sold for $297, or $395 with a case — and coined the term "personal computer." The machine came with 256 bytes of memory (expandable to 64K) and an open 100-line bus structure that evolved into the S-100 standard.
61. CPU Architecture 1976: Apple 1 Steve Wozniak designed the Apple I, a single-board computer. With an order for 100 machines at $500 each from the Byte Shop, he and Steve Jobs got their start in business. In this photograph of the Apple I board, the upper two rows are a video terminal and the lower two rows are the computer. The 6502 microprocessor in the white package sits on the lower left. About 200 of the machines sold before the Apple 2 was introduced.
62. CPU Architecture 1976 also saw the introduction a famous supercomputer the Cray 1. It made its name as the first commercially successful vector processor. The fastest machine of its day, its speed came partly from its shape, a C, which reduced the length of wires and thus the time signals needed to travel across them. The electronics generated a lot of heat needing liquid cooling the mechanism for forms the seating around the base. Project started:1972 completed:1976 Speed:166 million floating-point operations per second Size:58 cubic feet Weight:5,300 lbs. Technology: Integrated circuit ECL Clock rate:83 MHz Word length:64-bits Instruction set:128 instructions 1976 Cray 1
63. CPU Architecture more info: http://www.z80.info/zip/z80pps.zip The Zilog Z-80 could run any program written for the 8080. It had many features that made it useful in microcomputers to run HLLs, many extra instructions and two sets of CPU registers. 1976 Zilog Z80
64. CPU Architecture The Commodore PET (Personal Electronic Transactor) — the first of several personal computers released in 1977 — came fully assembled and was straightforward to operate, with either 4 or 8 kilobytes of memory, two built-in cassette drives, and a membrane "chiclet" keyboard . The Apple II became an instant success when released in 1977 with its printed circuit motherboard, switching power supply, keyboard, case assembly, manual, game paddles, A/C powercord, and cassette tape with the computer game "Breakout." When hooked up to a color television set, the Apple II produced brilliant color graphics. 1977 Commodore PET, APPLE II
65. CPU Architecture 1978: DEC VAX 11/780 The VAX 11/780 from DEC featured the ability to address up to 4.3 gigabytes of virtual memory, providing hundreds of times the capacity of most minicomputers, But essentially marks the end of the Minicomputer era.
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67. CPU Architecture Address Bus 16 bits Data Bus 8 bits Control signals System Architecture 8bit Micro
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72. CPU Architecture The Motorola 68000 microprocessor exhibited a processing speed far greater than its contemporaries. This high performance processor found its place in powerful work stations intended for graphics-intensive programs common in engineering. 1979: 16 bit Microprocessors 16 bit micros were designed for use in microcomputer. More general purpose registers, bigger address space, more possible levels of indirection in addressing to allow virtual addresses. About 200,000 transistors
73. CPU Architecture Another requirement of HLLs was the ability to carry out floating point maths, programming the algorithms was tedious and execution slow – hence the idea of a co-processor with hardware for FP maths. This is the INTEL 8087 introduced in 1980 Maths co-processor for the 8088. The maths processor eventually become part of the CPU.
74. CPU Architecture 1981: The IBM PC IBM introduced its PC, igniting a fast growth of the personal computer market. The first PC ran on a 4.77 MHz Intel 8088 microprocessor and used Microsoft´s MS-DOS operating system.
77. CPU Architecture 1987 INTEL 386: IBM PS/2 Intel 386 32 bit architecture. IBM Personal System/2, with an Intel 80386 CPU, 2 megabytes of memory, 3 ½ inch floppy a nd a 40 megabyte hard drive.
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80. CPU Architecture Pre-fetch and Pipeline cont. Pipeline increases latency – it takes multiple clock cycles to from entering the pipeline to execution. When the next instruction is not the next in the pipe everything has to be thrown out. These two problems limit the practical length of a pipeline. Separate instruction and data caches are common.
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82. CPU Architecture 1987: Motorola 68030 32-bit enhanced microprocessor with a central processing unit core, a data cache, an instruction cache, an enhanced bus controller, and a memory management unit in a single VLSI device — all operating at speeds of at least 20 MHz.