1.
MEMORY SPEED

2.
INTRODUCTION
- Most Important after microprocessor.
- Issue surrounding memory.
1. Amount
2. Type
3. Speed
- Program execution speed & memory amount & type.
- High speed processor should have high memory speed.

3.
THE EFFECT OF WAIT STATES
- The problem of memory speed came with 286/8MHz &
faster machines.
- So wait states introduced.
- A single wait state can reduce the efficiency of 386/486
Processors by 33%.
- A 20 MHz machine with one wait state = 13 MHz machine
with no wait state.
- So fast memories required, e.g; a 16 MHz 386/486 system
RAM can be accessed. Every 125ns.

4.
THE MEMORY SPEED
* Measured in nano-seconds.
* The access time, the pre charge time & the cycle time.
* The dynamic & Static RAM.
* The latest DRAM & refreshing.
* The statistical approach - uneven memory use
1. Memory Interleave
2. Page Mode
3. Page Interleave
4. Cache
* None the above method completely eliminates wait states.

5.
MEMORY INTERLEAVE
- The simplest of all methods.
- Alternate memory locations linked to two different banks.
- Theoretical reduces the wait states to a statistical 0.5.
- The idea could be extended to more than two banks but
complication of the system increases with a proportional
increase in performance.

6.
PAGE MODE
- A page is a unit of memory storage and access.
- In DRAM chips the size of a page is usually 2KB.
- Only the first access to the page incurs a wait state and
subsequent accesses do not.
- So a wait state is only generated when a page boundary is
crossed.
- Disadvantage - two active areas.
- One the average the wait state is reduced to about 0.8.

7.
PAGE INTRLEAVE
- A combination of interleaving.
- Two banks used - each accessed in page mode. ( i.e; in
2KB pages).
- Reduces 1 wait state to about 0.4 of a wait state.
- Wait state only when different page accessed in same bank.

8.
CACHE
- A sophisticated extension of page mode access.
- Very fast SRAM chips used.
- Installed in small amounts because of expense.
- Typical size are:
32 KB
64 KB
128 KB
256 KB
512 K
- Wait states reduced to 0.1- 0.03 of at wait state.
- Three types of Cache :
1. Direct mapped cache
2. Set associated cache
3. Fully associated cache
- The line size.

9.
CACHE .... CONTINUED
- Write -through, posted write & write-back cache.
- The probe cache coherency.
- The possible solution.
1. Mark entire memory invalid.
2. Mark only the altered locations as invalid.
3. Monitor RAM and Update Cache.
- Increasing the line size is better than increasing the total amount of
cache.
- Cache can be combined with page interleave.
- Intel’s 32385 Cache integrated with 386 to produce a 486 96% hit rate
claimed by Intel (16 Byte line width & four way associative).

10.
MEMORY MANAGEMENT IN MODERN MACHINES
- Pipe lining.
- The Burst Mode(only in 486 & Higher Processor)
- Shadow RAM(or ware).
- Multitasking and multi user efforts.
- Selective Caching.
- Cache- the universal solution.