SlideShare ist ein Scribd-Unternehmen logo
1 von 20
Prepared by :
Shobhan Pujari , M.S.(Northwestern Polytechnic
University,USA)
Abstract
Introduction
History
Importance of ALU
Functions
Project Details
Verilog code
Simulation results
Conclusion
Aim Of the project is to design a 8-bit ALU which
accepts two 8-bit binary numbers and displays
results.
It performs arithmetical , logical and relational
operations.
ALU is designed by using of gates like
AND,OR,NAND,NOR,NOT,XOR and XNOR gates.
Verilog code is used for designing and EDA tool is
used for simulation.
An arithmetic logic unit (ALU) is a major
component of the central processing unit of a
computer system.
It does all processes related to arithmetic and
logic operations that need to be done on
instruction words.
In some microprocessor architectures, the ALU
is divided into the arithmetic unit (AU) and the
logic unit (LU).
Mathematician John von Neumann proposed the
ALU concept in 1945.
The first ALU was introduced in 1948 that
operated on single data bit.
In some early microprocessors employed a
narrow ALU which performs 32-bit operation in
two cycles with a 16-bit ALU.
Over time, transistor geometries shrank further
and it became feasible to build wider ALUs on
microprocessors.
Arithmetic Operations:
Addition
Subtraction
Division
Multiplication
Increment
Decrement
Logical Operations:
AND
OR
NAND
NOR
XOR
XNOR
NOT
Some relational Operations
Verilog code
Testbench code
Diagram Of ALU
Output results
Simulation results
The Arithmetic Logic Unit is an important part
of computer CPU’s. We learned how to produce
different arithmetic operations and logic
functions by using various select singles for a
single circuit.
The ALU can also be designed using reversible
logic gates instead of conventional gates.
The reversibility significantly reduces the use
and loss of information bits.
Great teamwork helped us to achieve our
project goal!
Thank you

Weitere ähnliche Inhalte

Was ist angesagt?

Flag register 8086 assignment
Flag register 8086 assignmentFlag register 8086 assignment
Flag register 8086 assignmentZia3130
 
Decoders-Digital Electronics
Decoders-Digital ElectronicsDecoders-Digital Electronics
Decoders-Digital ElectronicsPaurav Shah
 
ARM7-ARCHITECTURE
ARM7-ARCHITECTURE ARM7-ARCHITECTURE
ARM7-ARCHITECTURE Dr.YNM
 
Multiplexers & Demultiplexers
Multiplexers & DemultiplexersMultiplexers & Demultiplexers
Multiplexers & DemultiplexersJayanshu Gundaniya
 
Introduction to Arduino Microcontroller
Introduction to Arduino MicrocontrollerIntroduction to Arduino Microcontroller
Introduction to Arduino MicrocontrollerMujahid Hussain
 
Timing Diagram of MVI Instruction of 8085 Microprocessor
Timing Diagram of MVI Instruction of 8085 MicroprocessorTiming Diagram of MVI Instruction of 8085 Microprocessor
Timing Diagram of MVI Instruction of 8085 MicroprocessorDhrumil Panchal
 
8051 microcontroller and it’s interface
8051 microcontroller and it’s interface8051 microcontroller and it’s interface
8051 microcontroller and it’s interfaceAbhishek Choksi
 
Microcontroller-8051.ppt
Microcontroller-8051.pptMicrocontroller-8051.ppt
Microcontroller-8051.pptDr.YNM
 
Microprocessor and microcontrollers
Microprocessor and microcontrollersMicroprocessor and microcontrollers
Microprocessor and microcontrollersHiran Gabriel
 
L12 programmable+logic+devices+(pld)
L12 programmable+logic+devices+(pld)L12 programmable+logic+devices+(pld)
L12 programmable+logic+devices+(pld)NAGASAI547
 
VHDL-PRESENTATION.ppt
VHDL-PRESENTATION.pptVHDL-PRESENTATION.ppt
VHDL-PRESENTATION.pptDr.YNM
 
Arithmetic Logic Unit (ALU)
Arithmetic Logic Unit (ALU)Arithmetic Logic Unit (ALU)
Arithmetic Logic Unit (ALU)Student
 
8096 microcontrollers notes
8096 microcontrollers notes8096 microcontrollers notes
8096 microcontrollers notesDr.YNM
 
Automatic temperature control using 8085 microprocessor
Automatic temperature control using 8085 microprocessorAutomatic temperature control using 8085 microprocessor
Automatic temperature control using 8085 microprocessorsubhradeep mitra
 
Alu design-project
Alu design-projectAlu design-project
Alu design-projectalphankg1
 

Was ist angesagt? (20)

ALU
ALUALU
ALU
 
Flag register 8086 assignment
Flag register 8086 assignmentFlag register 8086 assignment
Flag register 8086 assignment
 
Decoders-Digital Electronics
Decoders-Digital ElectronicsDecoders-Digital Electronics
Decoders-Digital Electronics
 
ARM7-ARCHITECTURE
ARM7-ARCHITECTURE ARM7-ARCHITECTURE
ARM7-ARCHITECTURE
 
Multiplexers & Demultiplexers
Multiplexers & DemultiplexersMultiplexers & Demultiplexers
Multiplexers & Demultiplexers
 
Introduction to Arduino Microcontroller
Introduction to Arduino MicrocontrollerIntroduction to Arduino Microcontroller
Introduction to Arduino Microcontroller
 
Timing Diagram of MVI Instruction of 8085 Microprocessor
Timing Diagram of MVI Instruction of 8085 MicroprocessorTiming Diagram of MVI Instruction of 8085 Microprocessor
Timing Diagram of MVI Instruction of 8085 Microprocessor
 
Pic16f84
Pic16f84Pic16f84
Pic16f84
 
8051 microcontroller and it’s interface
8051 microcontroller and it’s interface8051 microcontroller and it’s interface
8051 microcontroller and it’s interface
 
8051 io interface
8051 io interface8051 io interface
8051 io interface
 
Microcontroller-8051.ppt
Microcontroller-8051.pptMicrocontroller-8051.ppt
Microcontroller-8051.ppt
 
Microprocessor and microcontrollers
Microprocessor and microcontrollersMicroprocessor and microcontrollers
Microprocessor and microcontrollers
 
Unit 1 MPMC
Unit 1 MPMCUnit 1 MPMC
Unit 1 MPMC
 
L12 programmable+logic+devices+(pld)
L12 programmable+logic+devices+(pld)L12 programmable+logic+devices+(pld)
L12 programmable+logic+devices+(pld)
 
VHDL-PRESENTATION.ppt
VHDL-PRESENTATION.pptVHDL-PRESENTATION.ppt
VHDL-PRESENTATION.ppt
 
Arithmetic Logic Unit (ALU)
Arithmetic Logic Unit (ALU)Arithmetic Logic Unit (ALU)
Arithmetic Logic Unit (ALU)
 
8096 microcontrollers notes
8096 microcontrollers notes8096 microcontrollers notes
8096 microcontrollers notes
 
Automatic temperature control using 8085 microprocessor
Automatic temperature control using 8085 microprocessorAutomatic temperature control using 8085 microprocessor
Automatic temperature control using 8085 microprocessor
 
Alu design-project
Alu design-projectAlu design-project
Alu design-project
 
Encoders and decoders
Encoders and decodersEncoders and decoders
Encoders and decoders
 

Andere mochten auch

Design and implementation of 32 bit alu using verilog
Design and implementation of 32 bit alu using verilogDesign and implementation of 32 bit alu using verilog
Design and implementation of 32 bit alu using verilogSTEPHEN MOIRANGTHEM
 
Designing of 8 BIT Arithmetic and Logical Unit and implementing on Xilinx Ver...
Designing of 8 BIT Arithmetic and Logical Unit and implementing on Xilinx Ver...Designing of 8 BIT Arithmetic and Logical Unit and implementing on Xilinx Ver...
Designing of 8 BIT Arithmetic and Logical Unit and implementing on Xilinx Ver...Rahul Borthakur
 
ECE_467_Final_Project_Report
ECE_467_Final_Project_ReportECE_467_Final_Project_Report
ECE_467_Final_Project_ReportSidharth Kumar
 
Alu description[1]
Alu description[1]Alu description[1]
Alu description[1]Ayeen Muhammad
 
Verilog codes and testbench codes for basic digital electronic circuits.
Verilog codes and testbench codes for basic digital electronic circuits. Verilog codes and testbench codes for basic digital electronic circuits.
Verilog codes and testbench codes for basic digital electronic circuits. shobhan pujari
 
All VLSI programs
All VLSI programsAll VLSI programs
All VLSI programsGouthaman V
 
DESIGN AND SIMULATION OF DIFFERENT 8-BIT MULTIPLIERS USING VERILOG CODE BY SA...
DESIGN AND SIMULATION OF DIFFERENT 8-BIT MULTIPLIERS USING VERILOG CODE BY SA...DESIGN AND SIMULATION OF DIFFERENT 8-BIT MULTIPLIERS USING VERILOG CODE BY SA...
DESIGN AND SIMULATION OF DIFFERENT 8-BIT MULTIPLIERS USING VERILOG CODE BY SA...Saikiran Panjala
 
Bit Serial multiplier using Verilog
Bit Serial multiplier using VerilogBit Serial multiplier using Verilog
Bit Serial multiplier using VerilogBhargavKatkam
 
Verilog HDL
Verilog HDLVerilog HDL
Verilog HDLMantra VLSI
 
FPGA Verilog Processor Design
FPGA Verilog Processor DesignFPGA Verilog Processor Design
FPGA Verilog Processor DesignArchana Udaranga
 
Vhdl code and project report of arithmetic and logic unit
Vhdl code and project report of arithmetic and logic unitVhdl code and project report of arithmetic and logic unit
Vhdl code and project report of arithmetic and logic unitNikhil Sahu
 
An 8 bit_multiplier
An 8 bit_multiplierAn 8 bit_multiplier
An 8 bit_multiplierRobi Parvez
 
verilog code for logic gates
verilog code for logic gatesverilog code for logic gates
verilog code for logic gatesRakesh kumar jha
 
Rtl design optimizations and tradeoffs
Rtl design optimizations and tradeoffsRtl design optimizations and tradeoffs
Rtl design optimizations and tradeoffsGrace Abraham
 
Verilog Tutorial - Verilog HDL Tutorial with Examples
Verilog Tutorial - Verilog HDL Tutorial with ExamplesVerilog Tutorial - Verilog HDL Tutorial with Examples
Verilog Tutorial - Verilog HDL Tutorial with ExamplesE2MATRIX
 
Vhdl Project List - Verilog Projects
Vhdl Project List - Verilog Projects Vhdl Project List - Verilog Projects
Vhdl Project List - Verilog Projects E2MATRIX
 

Andere mochten auch (20)

Design and implementation of 32 bit alu using verilog
Design and implementation of 32 bit alu using verilogDesign and implementation of 32 bit alu using verilog
Design and implementation of 32 bit alu using verilog
 
Designing of 8 BIT Arithmetic and Logical Unit and implementing on Xilinx Ver...
Designing of 8 BIT Arithmetic and Logical Unit and implementing on Xilinx Ver...Designing of 8 BIT Arithmetic and Logical Unit and implementing on Xilinx Ver...
Designing of 8 BIT Arithmetic and Logical Unit and implementing on Xilinx Ver...
 
VERILOG CODE
VERILOG CODEVERILOG CODE
VERILOG CODE
 
ECE_467_Final_Project_Report
ECE_467_Final_Project_ReportECE_467_Final_Project_Report
ECE_467_Final_Project_Report
 
Alu description[1]
Alu description[1]Alu description[1]
Alu description[1]
 
Verilog codes and testbench codes for basic digital electronic circuits.
Verilog codes and testbench codes for basic digital electronic circuits. Verilog codes and testbench codes for basic digital electronic circuits.
Verilog codes and testbench codes for basic digital electronic circuits.
 
All VLSI programs
All VLSI programsAll VLSI programs
All VLSI programs
 
DESIGN AND SIMULATION OF DIFFERENT 8-BIT MULTIPLIERS USING VERILOG CODE BY SA...
DESIGN AND SIMULATION OF DIFFERENT 8-BIT MULTIPLIERS USING VERILOG CODE BY SA...DESIGN AND SIMULATION OF DIFFERENT 8-BIT MULTIPLIERS USING VERILOG CODE BY SA...
DESIGN AND SIMULATION OF DIFFERENT 8-BIT MULTIPLIERS USING VERILOG CODE BY SA...
 
Bit Serial multiplier using Verilog
Bit Serial multiplier using VerilogBit Serial multiplier using Verilog
Bit Serial multiplier using Verilog
 
Verilog HDL
Verilog HDLVerilog HDL
Verilog HDL
 
FPGA Verilog Processor Design
FPGA Verilog Processor DesignFPGA Verilog Processor Design
FPGA Verilog Processor Design
 
Vhdl code and project report of arithmetic and logic unit
Vhdl code and project report of arithmetic and logic unitVhdl code and project report of arithmetic and logic unit
Vhdl code and project report of arithmetic and logic unit
 
An 8 bit_multiplier
An 8 bit_multiplierAn 8 bit_multiplier
An 8 bit_multiplier
 
verilog code for logic gates
verilog code for logic gatesverilog code for logic gates
verilog code for logic gates
 
Rtl design optimizations and tradeoffs
Rtl design optimizations and tradeoffsRtl design optimizations and tradeoffs
Rtl design optimizations and tradeoffs
 
VLSI_ASIC_Training_Summer_Offer
VLSI_ASIC_Training_Summer_OfferVLSI_ASIC_Training_Summer_Offer
VLSI_ASIC_Training_Summer_Offer
 
FIFODC
FIFODCFIFODC
FIFODC
 
Verilog Tutorial - Verilog HDL Tutorial with Examples
Verilog Tutorial - Verilog HDL Tutorial with ExamplesVerilog Tutorial - Verilog HDL Tutorial with Examples
Verilog Tutorial - Verilog HDL Tutorial with Examples
 
Vhdl Project List - Verilog Projects
Vhdl Project List - Verilog Projects Vhdl Project List - Verilog Projects
Vhdl Project List - Verilog Projects
 
B.Tech VLSI projects list
B.Tech VLSI projects listB.Tech VLSI projects list
B.Tech VLSI projects list
 

Ă„hnlich wie 8 bit alu design

Behavioral Design and Synthesis of 64 BIT ALU using Xilinx ISE
Behavioral Design and Synthesis of 64 BIT ALU using Xilinx ISEBehavioral Design and Synthesis of 64 BIT ALU using Xilinx ISE
Behavioral Design and Synthesis of 64 BIT ALU using Xilinx ISEIOSR Journals
 
Computer Organization and Architecture ppt .pptx
Computer Organization and Architecture ppt .pptxComputer Organization and Architecture ppt .pptx
Computer Organization and Architecture ppt .pptxSURESHKUMARMURK22DS4
 
Material Architecture and organization of computer
Material Architecture and organization of computerMaterial Architecture and organization of computer
Material Architecture and organization of computerferoza rosalina
 
Microprocessor Introduction
Microprocessor IntroductionMicroprocessor Introduction
Microprocessor IntroductionNaveen Dubey
 
Lecturer1 introduction to computer architecture (ca)
Lecturer1   introduction to computer architecture (ca)Lecturer1   introduction to computer architecture (ca)
Lecturer1 introduction to computer architecture (ca)ADEOLA ADISA
 
ALUs Mini Project.pptx
ALUs Mini Project.pptxALUs Mini Project.pptx
ALUs Mini Project.pptxDrMathewStrandgh
 
CPU(central Processing Unit)
CPU(central Processing Unit)CPU(central Processing Unit)
CPU(central Processing Unit)ghazanfarsajjad
 
Introduction to microprocessor
Introduction to microprocessorIntroduction to microprocessor
Introduction to microprocessorKashyap Shah
 
Fpga implementation of a functional microcontroller
Fpga implementation of a functional microcontrollerFpga implementation of a functional microcontroller
Fpga implementation of a functional microcontrollereSAT Publishing House
 
Lecture 1 introduction to microcontroller systems
Lecture 1   introduction to microcontroller systemsLecture 1   introduction to microcontroller systems
Lecture 1 introduction to microcontroller systemsesposa76
 
POA_Unit 5.pptx
POA_Unit 5.pptxPOA_Unit 5.pptx
POA_Unit 5.pptxGAURAVWANI11
 
Central Processing Unit
Central Processing UnitCentral Processing Unit
Central Processing UnitJan Ralph
 
Introduction to microprocessor notes
Introduction to microprocessor notesIntroduction to microprocessor notes
Introduction to microprocessor notesSARITHA REDDY
 
Introduction to microprocessors notes
Introduction to microprocessors notesIntroduction to microprocessors notes
Introduction to microprocessors notesSARITHA REDDY
 
MPMC all units .pdf
MPMC all units .pdfMPMC all units .pdf
MPMC all units .pdfRishaSingh26
 
Computer organiztion1
Computer organiztion1Computer organiztion1
Computer organiztion1Umang Gupta
 
Processors - an overview
Processors - an overviewProcessors - an overview
Processors - an overviewLorenz Lo Sauer
 

Ă„hnlich wie 8 bit alu design (20)

Behavioral Design and Synthesis of 64 BIT ALU using Xilinx ISE
Behavioral Design and Synthesis of 64 BIT ALU using Xilinx ISEBehavioral Design and Synthesis of 64 BIT ALU using Xilinx ISE
Behavioral Design and Synthesis of 64 BIT ALU using Xilinx ISE
 
Computer Organization and Architecture ppt .pptx
Computer Organization and Architecture ppt .pptxComputer Organization and Architecture ppt .pptx
Computer Organization and Architecture ppt .pptx
 
Material Architecture and organization of computer
Material Architecture and organization of computerMaterial Architecture and organization of computer
Material Architecture and organization of computer
 
Microprocessor Introduction
Microprocessor IntroductionMicroprocessor Introduction
Microprocessor Introduction
 
Lecturer1 introduction to computer architecture (ca)
Lecturer1   introduction to computer architecture (ca)Lecturer1   introduction to computer architecture (ca)
Lecturer1 introduction to computer architecture (ca)
 
ALUs Mini Project.pptx
ALUs Mini Project.pptxALUs Mini Project.pptx
ALUs Mini Project.pptx
 
ALUs and HDLs .pptx
ALUs and HDLs .pptxALUs and HDLs .pptx
ALUs and HDLs .pptx
 
CPU(central Processing Unit)
CPU(central Processing Unit)CPU(central Processing Unit)
CPU(central Processing Unit)
 
Introduction to microprocessor
Introduction to microprocessorIntroduction to microprocessor
Introduction to microprocessor
 
Fpga implementation of a functional microcontroller
Fpga implementation of a functional microcontrollerFpga implementation of a functional microcontroller
Fpga implementation of a functional microcontroller
 
Lecture 1 introduction to microcontroller systems
Lecture 1   introduction to microcontroller systemsLecture 1   introduction to microcontroller systems
Lecture 1 introduction to microcontroller systems
 
POA_Unit 5.pptx
POA_Unit 5.pptxPOA_Unit 5.pptx
POA_Unit 5.pptx
 
Central Processing Unit
Central Processing UnitCentral Processing Unit
Central Processing Unit
 
Introduction to microprocessor notes
Introduction to microprocessor notesIntroduction to microprocessor notes
Introduction to microprocessor notes
 
Introduction to microprocessors notes
Introduction to microprocessors notesIntroduction to microprocessors notes
Introduction to microprocessors notes
 
MPMC all units .pdf
MPMC all units .pdfMPMC all units .pdf
MPMC all units .pdf
 
Computer organiztion1
Computer organiztion1Computer organiztion1
Computer organiztion1
 
computer system organization basics
computer system organization basicscomputer system organization basics
computer system organization basics
 
Microcontroller part 1
Microcontroller part 1Microcontroller part 1
Microcontroller part 1
 
Processors - an overview
Processors - an overviewProcessors - an overview
Processors - an overview
 

KĂĽrzlich hochgeladen

Virtual memory management in Operating System
Virtual memory management in Operating SystemVirtual memory management in Operating System
Virtual memory management in Operating SystemRashmi Bhat
 
Sachpazis Costas: Geotechnical Engineering: A student's Perspective Introduction
Sachpazis Costas: Geotechnical Engineering: A student's Perspective IntroductionSachpazis Costas: Geotechnical Engineering: A student's Perspective Introduction
Sachpazis Costas: Geotechnical Engineering: A student's Perspective IntroductionDr.Costas Sachpazis
 
US Department of Education FAFSA Week of Action
US Department of Education FAFSA Week of ActionUS Department of Education FAFSA Week of Action
US Department of Education FAFSA Week of ActionMebane Rash
 
Steel Structures - Building technology.pptx
Steel Structures - Building technology.pptxSteel Structures - Building technology.pptx
Steel Structures - Building technology.pptxNikhil Raut
 
System Simulation and Modelling with types and Event Scheduling
System Simulation and Modelling with types and Event SchedulingSystem Simulation and Modelling with types and Event Scheduling
System Simulation and Modelling with types and Event SchedulingBootNeck1
 
THE SENDAI FRAMEWORK FOR DISASTER RISK REDUCTION
THE SENDAI FRAMEWORK FOR DISASTER RISK REDUCTIONTHE SENDAI FRAMEWORK FOR DISASTER RISK REDUCTION
THE SENDAI FRAMEWORK FOR DISASTER RISK REDUCTIONjhunlian
 
Why does (not) Kafka need fsync: Eliminating tail latency spikes caused by fsync
Why does (not) Kafka need fsync: Eliminating tail latency spikes caused by fsyncWhy does (not) Kafka need fsync: Eliminating tail latency spikes caused by fsync
Why does (not) Kafka need fsync: Eliminating tail latency spikes caused by fsyncssuser2ae721
 
Arduino_CSE ece ppt for working and principal of arduino.ppt
Arduino_CSE ece ppt for working and principal of arduino.pptArduino_CSE ece ppt for working and principal of arduino.ppt
Arduino_CSE ece ppt for working and principal of arduino.pptSAURABHKUMAR892774
 
Instrumentation, measurement and control of bio process parameters ( Temperat...
Instrumentation, measurement and control of bio process parameters ( Temperat...Instrumentation, measurement and control of bio process parameters ( Temperat...
Instrumentation, measurement and control of bio process parameters ( Temperat...121011101441
 
Internet of things -Arshdeep Bahga .pptx
Internet of things -Arshdeep Bahga .pptxInternet of things -Arshdeep Bahga .pptx
Internet of things -Arshdeep Bahga .pptxVelmuruganTECE
 
Past, Present and Future of Generative AI
Past, Present and Future of Generative AIPast, Present and Future of Generative AI
Past, Present and Future of Generative AIabhishek36461
 
CCS355 Neural Networks & Deep Learning Unit 1 PDF notes with Question bank .pdf
CCS355 Neural Networks & Deep Learning Unit 1 PDF notes with Question bank .pdfCCS355 Neural Networks & Deep Learning Unit 1 PDF notes with Question bank .pdf
CCS355 Neural Networks & Deep Learning Unit 1 PDF notes with Question bank .pdfAsst.prof M.Gokilavani
 
Vishratwadi & Ghorpadi Bridge Tender documents
Vishratwadi & Ghorpadi Bridge Tender documentsVishratwadi & Ghorpadi Bridge Tender documents
Vishratwadi & Ghorpadi Bridge Tender documentsSachinPawar510423
 
Main Memory Management in Operating System
Main Memory Management in Operating SystemMain Memory Management in Operating System
Main Memory Management in Operating SystemRashmi Bhat
 
Transport layer issues and challenges - Guide
Transport layer issues and challenges - GuideTransport layer issues and challenges - Guide
Transport layer issues and challenges - GuideGOPINATHS437943
 
Software and Systems Engineering Standards: Verification and Validation of Sy...
Software and Systems Engineering Standards: Verification and Validation of Sy...Software and Systems Engineering Standards: Verification and Validation of Sy...
Software and Systems Engineering Standards: Verification and Validation of Sy...VICTOR MAESTRE RAMIREZ
 
Indian Dairy Industry Present Status and.ppt
Indian Dairy Industry Present Status and.pptIndian Dairy Industry Present Status and.ppt
Indian Dairy Industry Present Status and.pptMadan Karki
 
Industrial Safety Unit-IV workplace health and safety.ppt
Industrial Safety Unit-IV workplace health and safety.pptIndustrial Safety Unit-IV workplace health and safety.ppt
Industrial Safety Unit-IV workplace health and safety.pptNarmatha D
 

KĂĽrzlich hochgeladen (20)

Virtual memory management in Operating System
Virtual memory management in Operating SystemVirtual memory management in Operating System
Virtual memory management in Operating System
 
Sachpazis Costas: Geotechnical Engineering: A student's Perspective Introduction
Sachpazis Costas: Geotechnical Engineering: A student's Perspective IntroductionSachpazis Costas: Geotechnical Engineering: A student's Perspective Introduction
Sachpazis Costas: Geotechnical Engineering: A student's Perspective Introduction
 
US Department of Education FAFSA Week of Action
US Department of Education FAFSA Week of ActionUS Department of Education FAFSA Week of Action
US Department of Education FAFSA Week of Action
 
Steel Structures - Building technology.pptx
Steel Structures - Building technology.pptxSteel Structures - Building technology.pptx
Steel Structures - Building technology.pptx
 
POWER SYSTEMS-1 Complete notes examples
POWER SYSTEMS-1 Complete notes  examplesPOWER SYSTEMS-1 Complete notes  examples
POWER SYSTEMS-1 Complete notes examples
 
System Simulation and Modelling with types and Event Scheduling
System Simulation and Modelling with types and Event SchedulingSystem Simulation and Modelling with types and Event Scheduling
System Simulation and Modelling with types and Event Scheduling
 
THE SENDAI FRAMEWORK FOR DISASTER RISK REDUCTION
THE SENDAI FRAMEWORK FOR DISASTER RISK REDUCTIONTHE SENDAI FRAMEWORK FOR DISASTER RISK REDUCTION
THE SENDAI FRAMEWORK FOR DISASTER RISK REDUCTION
 
Why does (not) Kafka need fsync: Eliminating tail latency spikes caused by fsync
Why does (not) Kafka need fsync: Eliminating tail latency spikes caused by fsyncWhy does (not) Kafka need fsync: Eliminating tail latency spikes caused by fsync
Why does (not) Kafka need fsync: Eliminating tail latency spikes caused by fsync
 
Arduino_CSE ece ppt for working and principal of arduino.ppt
Arduino_CSE ece ppt for working and principal of arduino.pptArduino_CSE ece ppt for working and principal of arduino.ppt
Arduino_CSE ece ppt for working and principal of arduino.ppt
 
Instrumentation, measurement and control of bio process parameters ( Temperat...
Instrumentation, measurement and control of bio process parameters ( Temperat...Instrumentation, measurement and control of bio process parameters ( Temperat...
Instrumentation, measurement and control of bio process parameters ( Temperat...
 
young call girls in Rajiv Chowk🔝 9953056974 🔝 Delhi escort Service
young call girls in Rajiv Chowk🔝 9953056974 🔝 Delhi escort Serviceyoung call girls in Rajiv Chowk🔝 9953056974 🔝 Delhi escort Service
young call girls in Rajiv Chowk🔝 9953056974 🔝 Delhi escort Service
 
Internet of things -Arshdeep Bahga .pptx
Internet of things -Arshdeep Bahga .pptxInternet of things -Arshdeep Bahga .pptx
Internet of things -Arshdeep Bahga .pptx
 
Past, Present and Future of Generative AI
Past, Present and Future of Generative AIPast, Present and Future of Generative AI
Past, Present and Future of Generative AI
 
CCS355 Neural Networks & Deep Learning Unit 1 PDF notes with Question bank .pdf
CCS355 Neural Networks & Deep Learning Unit 1 PDF notes with Question bank .pdfCCS355 Neural Networks & Deep Learning Unit 1 PDF notes with Question bank .pdf
CCS355 Neural Networks & Deep Learning Unit 1 PDF notes with Question bank .pdf
 
Vishratwadi & Ghorpadi Bridge Tender documents
Vishratwadi & Ghorpadi Bridge Tender documentsVishratwadi & Ghorpadi Bridge Tender documents
Vishratwadi & Ghorpadi Bridge Tender documents
 
Main Memory Management in Operating System
Main Memory Management in Operating SystemMain Memory Management in Operating System
Main Memory Management in Operating System
 
Transport layer issues and challenges - Guide
Transport layer issues and challenges - GuideTransport layer issues and challenges - Guide
Transport layer issues and challenges - Guide
 
Software and Systems Engineering Standards: Verification and Validation of Sy...
Software and Systems Engineering Standards: Verification and Validation of Sy...Software and Systems Engineering Standards: Verification and Validation of Sy...
Software and Systems Engineering Standards: Verification and Validation of Sy...
 
Indian Dairy Industry Present Status and.ppt
Indian Dairy Industry Present Status and.pptIndian Dairy Industry Present Status and.ppt
Indian Dairy Industry Present Status and.ppt
 
Industrial Safety Unit-IV workplace health and safety.ppt
Industrial Safety Unit-IV workplace health and safety.pptIndustrial Safety Unit-IV workplace health and safety.ppt
Industrial Safety Unit-IV workplace health and safety.ppt
 

8 bit alu design

  • 1. Prepared by : Shobhan Pujari , M.S.(Northwestern Polytechnic University,USA)
  • 2. Abstract Introduction History Importance of ALU Functions Project Details Verilog code Simulation results Conclusion
  • 3. Aim Of the project is to design a 8-bit ALU which accepts two 8-bit binary numbers and displays results. It performs arithmetical , logical and relational operations. ALU is designed by using of gates like AND,OR,NAND,NOR,NOT,XOR and XNOR gates. Verilog code is used for designing and EDA tool is used for simulation.
  • 4. An arithmetic logic unit (ALU) is a major component of the central processing unit of a computer system. It does all processes related to arithmetic and logic operations that need to be done on instruction words. In some microprocessor architectures, the ALU is divided into the arithmetic unit (AU) and the logic unit (LU).
  • 5. Mathematician John von Neumann proposed the ALU concept in 1945. The first ALU was introduced in 1948 that operated on single data bit. In some early microprocessors employed a narrow ALU which performs 32-bit operation in two cycles with a 16-bit ALU. Over time, transistor geometries shrank further and it became feasible to build wider ALUs on microprocessors.
  • 6.
  • 7.
  • 10. Verilog code Testbench code Diagram Of ALU Output results Simulation results
  • 11.
  • 12.
  • 13.
  • 14.
  • 15.
  • 16.
  • 17.
  • 18. The Arithmetic Logic Unit is an important part of computer CPU’s. We learned how to produce different arithmetic operations and logic functions by using various select singles for a single circuit. The ALU can also be designed using reversible logic gates instead of conventional gates. The reversibility significantly reduces the use and loss of information bits.
  • 19. Great teamwork helped us to achieve our project goal!