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Confidential © 2017 Arm Limited
Trusted Firmware M
Trusted Boot
Tamas Ban
Linaro 2018​
Arm
Non-Confidential © Arm 20182
Agenda
• Concept of trusted boot
• Bootloader in TF-M
• Firmware upgrade
• Alternatives for upgrade
• Alternatives for crypto
• Plans
• Q&A
Non-Confidential © Arm 20183
What is trusted environment?
An integrated execution environment(HW + SW) which can protect valuable assets against
extraction:
• Sensitive user data
• Crypto keys
• Firmware itself, etc.
Hardware
Trusted
Env.
Non-Confidential © Arm 20184
Introduction to trusted bootloader concept
What? Why? How?
SW whose aim is to verify
the origin and integrity of
other SW components
which run on the target
system.
• Bootloader runs as soon
as system is released from
reset prior any other SW.
In case of successful
authentication it passes
execution to the runtime
firmware.
One wants to ensure that
only a certain set of SW,
without any external
modification, can run on a
particular device.
• Device contains sensitive
assets which could be
extracted with the usage
of malicious SW.
Device contains immutable
SW and data, which can be
used for authentication:
• Integrity of SW:
– Checking hash value
• Origin of SW:
– Checking digital signature
Non-Confidential © Arm 20185
Considerations at selection of bootloader
Secure boot requirements
PSA spec defines boot and firmware
update requirements:
• Support for firmware upgrade
• Support for chain-of-trust
• Support for NIST or NSA approved
cryptographic algorithm: SHA2, RSA, ECDSA,
HMAC, KDF
• Etc.
Device constraints
Device constraints mandate `yet-another`
bootloader:
• Usually less than 1 MB flash memory for code
• Usually less than 256 KB RAM for data
• Usage of cryptographic accelerator HW
component
• Computing power
• No MMU, no memory virtualization
• Power failure awareness
• Etc.
Non-Confidential © Arm 20186
Bootloader in TF-M
MCUBoot is utilized to act as BL2 in TF-M:
• Open source project with Apache 2.0 licensing
• Low memory footprint; designed for 32 bit microcontrollers
• Running from flash(currently XIP)
• Several secure boot features are supported for firmware authentication: SHA256, RSA-
2048, (ECDSA)
• Usage of 3rd party libraries for cryptographic operations: mbedTLS, (TinyCrypt)
• Firmware update with image swapping
• Power failure resistant upgrade
• Fallback mechanism to stable version
Non-Confidential © Arm 20187
First bootloader release
MCUBoot integrated within TF-M repository:
Customized to be OS agnostic
Currently SHA256 and RSA-2048 are supported
SPE and NSPE are concatenated to a single binary blob
Hash and digital signature tooling and runtime check
Software Upgrade prototype as proof of concept:
• Emulating flash interface and behaviour over code SRAM
System constraints:
• No support for image size that does not fit in available RAM
• CoT reduced to verify SPE and NSPE in the same go
Non-Confidential © Arm 20188
Immutable
BL1 code
Chain of trust
Hash
BL2
image
SIP/OEM
Root of Trust Public Key
(ROTPK)
OEM/Developer
Public Key(s)
Use CA public key if
supporting certificate
revocation
Check
signature
Public image
signing keys
can be rotated
Check
integrity
NSPE
image
SPE
image
Check
signature
Public key
Public
key(s)
Check
signature
Non-Confidential © Arm 20189
RTOS
&
Application
Boot process
Stage
PSA
(not mandatory)
TF-M
BL1
Immutable
boot code in
ROM
Boot
code
in eFlash
BL2 NSPESPE
Secure
runtime
firmware
Verify
Load
Start
Core
SPM
Secure services
TBD
Verify
Load
Start
Verify
Load
Start
RTOS
&
Application
BL2
MCUBoot Start Start
Verify
combined hash and
signature
Non-Confidential © Arm 201810
Basic operation and memory layout
Non-Confidential © Arm 201811
6.) Copy scratch
to Slot_0
3.) Erease Slot_1
Image swapping
• Code linked to
Slot_0 memory
space
• Divided into
rounds
• Scratch-sized data
is moved in one
go
• Status info saved
after each round
• Power failure safe
Slot_1_Sector_2
Slot_1_Sector_N
Slot_1_Sector_3
Active image
Slot_0
New image
Slot_1
Slot_0_Sector_2
Slot_0_Sector_N
Slot_0_Sector_3
Scratch
area
1.) Erease scratch
Sector_0
Sector_1
Slot_0_Sector_0
Slot_0_Sector_1
Slot_1_Sector_0
Slot_1_Sector_1
2.) Copy Slot_1
to scratch
4.) Copy Slot_1
to scratch
5.) Erease Slot_0
Slot_1_Sector_1
Slot_1_Sector_0
Save swap status
info
Slot_1_Sector_0
Slot_1_Sector_1
Slot_0_Sector_0
Slot_0_Sector_1
Slot_1_Sector_1
Slot_1_Sector_0
Non-Confidential © Arm 201812
Firmware upgrade
• Upgrade is a task
of runtime FW
• Potentially split
between NSPE
and SPE
• XIP images
Non-Confidential © Arm 201813
Image fallback
• Store previous
image
• Health-check new
image with BIST
• Self confirmation
• Reboot in case of
failure
• Revert back stable
image
• Set rollback after
confirmation
Non-Confidential © Arm 201814
Design constraints
Header size - VTOR alignment:
• Device dependent 512-1024 bytes
Image slot’s layout must be aligned
Scratch area size:
• Flash memory wear-out
• At least as the largest block size
Real image size smaller than image slot:
• Image header, TLV, swap status info, etc.
No recovery option, if both images are faulty
Non-Confidential © Arm 201815
Common threats
Threat Mitigation Implemented
Malicious firmware sent to device Signed firmware images Yes
Downgrade to old vulnerable
version
Version or fallback counters
check
Not yet*
Persistent malware(rootkits)
Immutable boot code and
data(BL1)
Not yet
Remote bricking of the device Backup image Yes
Attacker gets signing key Key revocation support Not yet*
*: Planned to be addressed in 2018
Non-Confidential © Arm 201816
Alternatives to image swapping
Position independent code
Pros:
• Reduced P/E cycle leads to longer lifetime
• Reduced BL complexity and code footprint
• Reduced boot-up time(no swapping)
Cons:
• Might lead bigger firmware code footprint
• Some compiler switches are not compatible
with PIC code
• Some C lib (Microlib) cannot be compiled to
be PIC
• Other constraints when compiling code to
be PIC
Dual image build
Pros:
• Reduced P/E cycle leads to longer lifetime
• Reduced BL complexity and code footprint
• Reduced boot-up time(no swapping)
Cons:
• More complex build process
• Extra logic in update client
Non-Confidential © Arm 201817
Alternatives to image swapping
Execute from RAM
Pros:
• Reduced P/E cycle leads to longer lifetime
• Faster firmware execution
• Reduced BL complexity and code footprint
Cons:
• Usually infeasible: less RAM than ROM
Off-chip storage
Pros:
• Reduced P/E cycle leads to longer lifetime
• Reduced BL complexity and code footprint
Cons:
• Might be a security risk: when to verify
signature?
• Might require image encryption, increased
code footprint(include AES) and boot-up
time
Non-Confidential © Arm 201818
Alternatives to image swapping
Overwrite
Pros:
• Reduced P/E cycle leads to longer lifetime
• No need for scratch space
• Reduced BL complexity and code footprint
Cons:
• Risk of bricking the device because no
revert possible
Non-Confidential © Arm 201819
MCUBoot as PIC code
Experiment to compile PIC code:
• RO and RW position independent( --ropi, --rwpi)
• Vector table and IRQ handlers must be in RAM
• IRQ handling unavailable until vectors and handlers relocated to RAM
• Image size increased:
• 29KB -> 38KB; More std. C lib was compiled-in
• Limitations on source code:
• Constant pointer cannot be used
• CMSE armclang flag is not compatible with ROPI
• Microlib cannot be compiled to be position independent
Non-Confidential © Arm 201820
Comparison of crypto algorithms
RSA
• Big key size: up to 15KB
• 128 bit level of security: RSA-3072
• ROM size(mbedTLS): ~14KB
• RAM usage(mbedTLS): ~7KB
• Key generation: slower
• Signature generation: slower
• Signature verification time: faster
ECC
• Small key size: up to 512 bits
• 128 bit level of security: ECC-256
• ROM size(mbedTLS):
• RAM usage(mbedTLS): ~13KB
• Key generation: faster
• Signature generation: faster
• Signature verification : slower
Moving from RSA to ECC
Non-Confidential © Arm 201821
„Speed up asymmetric crypto”
Signature verification with RSA or ECC is time consuming
Symmetric crypto can spare clock cycles
Replace asym. crypto with symmetric: HMAC, CMAC, etc:
• Previously verified images(upgrade time) can get a MAC, generated based on Hardware
Unique Key(HUK)
• At boot time this MAC is verified instead of original signature
• Boot time can be significantly reduced
Download
new
firmware
Verify
signature
Deploy in
flash
Generate
MAC
Save to flash
Reset device
Bootloader
checks MAC
Non-Confidential © Arm 201822
Alternatives for crypto libraries
HW accelerator:
• Improved performance / reduced code footprint
CryptoCell-312:
• Symmetric and asymmetric crypto
• Runtime library: use mbedTLS API
• Boot library:
– Signature verification
– X509 certificate parsing
– Image verification and optional
decryption
• Asset provisioning to OTP memory
• Rollback counters
Non-Confidential © Arm 201823
Bootloader plans
PSA compliance:
• Anti-rollback protection
• Create interface between SPE and bootloaders
• Add support of multiple chains of trust and might be certificates
Explore possibilities to make BL2 updatable
Integrate crypto HW accelerator (CC312) with BL2
Non-Confidential © Arm 201824
How to get involved
TF-A and TF-M master codebases
• https://git.trustedfirmware.org/
TF-M Team @ Connect HKG18
• Abhishek Pandit
• Ashutosh Singh
• Tamas Ban
• Miklos Balint
Get in touch
• Come round LITE hacking room between 3-4 pm Wednesday
• Schedule a meeting via hkg18.pathable.com
More info on developer.arm.com
2525 Confidential © 2017 Arm Limited
Thank You!
Danke!
Merci!
谢谢!
ありがとう!
Gracias!
Kiitos!
감사합니다
धन्यवाद
Non-Confidential © Arm 201826
Supported platforms
MCUBoot with TF-M can run on:
• In simulator environment(FVP) on PC.
• MPS2 development board with AN521 (Castor) FPGA image
• MPS2 development board with AN519 (M23) FPGA image
• Musca_A porting is in progress
Non-Confidential © Arm 201827
Trailer(Swap status)
BL2 - Bootloader
Secure firmware
Non-secure firmware
Header
TLV(SHA, DS)
Secure firmware
Non-secure firmware
Header
TLV(SHA, DS)
SLOT_1
Placeholder for
new image
SLOT_0
Active image
Scratch area
Currently not updatable
0x0000...
0xXXXX...
Used during
image swapping
Non-Confidential © Arm 201828
BL2 - Bootloader
started
Erase
SLOT_1
Finalize aborted
swap
Initialize
phase
Authenticate
SW in SLOT_1
Swap images
between
SLOT_0
and
SLOT_1
Finalize image
status info
Pass execution
to SPE in
SLOT_0
CPU released
from reset
Is new
SW in
SLOT_1
Is there
aborted
swap?
yes
no
yes
Valid
SW?
no
no
Non-Confidential © Arm 201829
SPENSPE
Update
Client
Trusted
Update
Function
Firmware
Storage
Server
Runtime firmware
BL2 - Bootloader Slot_0 – Active Image Slot_1 – New imageLocal Storage
1. Download:
- firmware
- manifest
2.
Authentication:
- send manifest
Keys
NV counters
3. Provison new
image
4. Reboot
5. Authenticate
and swap images,
start image in slot_0
Remote server
Non-Confidential © Arm 201830
Old image
New image
Reboot
New image
Old image
Test NOK
New image
Old image
New image
Old image
Test OK Confirm
New image
Old image
Reboot
Old image
New image
Set
rollback

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HKG18-223 - Trusted FirmwareM: Trusted boot

  • 1. Confidential © 2017 Arm Limited Trusted Firmware M Trusted Boot Tamas Ban Linaro 2018​ Arm
  • 2. Non-Confidential © Arm 20182 Agenda • Concept of trusted boot • Bootloader in TF-M • Firmware upgrade • Alternatives for upgrade • Alternatives for crypto • Plans • Q&A
  • 3. Non-Confidential © Arm 20183 What is trusted environment? An integrated execution environment(HW + SW) which can protect valuable assets against extraction: • Sensitive user data • Crypto keys • Firmware itself, etc. Hardware Trusted Env.
  • 4. Non-Confidential © Arm 20184 Introduction to trusted bootloader concept What? Why? How? SW whose aim is to verify the origin and integrity of other SW components which run on the target system. • Bootloader runs as soon as system is released from reset prior any other SW. In case of successful authentication it passes execution to the runtime firmware. One wants to ensure that only a certain set of SW, without any external modification, can run on a particular device. • Device contains sensitive assets which could be extracted with the usage of malicious SW. Device contains immutable SW and data, which can be used for authentication: • Integrity of SW: – Checking hash value • Origin of SW: – Checking digital signature
  • 5. Non-Confidential © Arm 20185 Considerations at selection of bootloader Secure boot requirements PSA spec defines boot and firmware update requirements: • Support for firmware upgrade • Support for chain-of-trust • Support for NIST or NSA approved cryptographic algorithm: SHA2, RSA, ECDSA, HMAC, KDF • Etc. Device constraints Device constraints mandate `yet-another` bootloader: • Usually less than 1 MB flash memory for code • Usually less than 256 KB RAM for data • Usage of cryptographic accelerator HW component • Computing power • No MMU, no memory virtualization • Power failure awareness • Etc.
  • 6. Non-Confidential © Arm 20186 Bootloader in TF-M MCUBoot is utilized to act as BL2 in TF-M: • Open source project with Apache 2.0 licensing • Low memory footprint; designed for 32 bit microcontrollers • Running from flash(currently XIP) • Several secure boot features are supported for firmware authentication: SHA256, RSA- 2048, (ECDSA) • Usage of 3rd party libraries for cryptographic operations: mbedTLS, (TinyCrypt) • Firmware update with image swapping • Power failure resistant upgrade • Fallback mechanism to stable version
  • 7. Non-Confidential © Arm 20187 First bootloader release MCUBoot integrated within TF-M repository: Customized to be OS agnostic Currently SHA256 and RSA-2048 are supported SPE and NSPE are concatenated to a single binary blob Hash and digital signature tooling and runtime check Software Upgrade prototype as proof of concept: • Emulating flash interface and behaviour over code SRAM System constraints: • No support for image size that does not fit in available RAM • CoT reduced to verify SPE and NSPE in the same go
  • 8. Non-Confidential © Arm 20188 Immutable BL1 code Chain of trust Hash BL2 image SIP/OEM Root of Trust Public Key (ROTPK) OEM/Developer Public Key(s) Use CA public key if supporting certificate revocation Check signature Public image signing keys can be rotated Check integrity NSPE image SPE image Check signature Public key Public key(s) Check signature
  • 9. Non-Confidential © Arm 20189 RTOS & Application Boot process Stage PSA (not mandatory) TF-M BL1 Immutable boot code in ROM Boot code in eFlash BL2 NSPESPE Secure runtime firmware Verify Load Start Core SPM Secure services TBD Verify Load Start Verify Load Start RTOS & Application BL2 MCUBoot Start Start Verify combined hash and signature
  • 10. Non-Confidential © Arm 201810 Basic operation and memory layout
  • 11. Non-Confidential © Arm 201811 6.) Copy scratch to Slot_0 3.) Erease Slot_1 Image swapping • Code linked to Slot_0 memory space • Divided into rounds • Scratch-sized data is moved in one go • Status info saved after each round • Power failure safe Slot_1_Sector_2 Slot_1_Sector_N Slot_1_Sector_3 Active image Slot_0 New image Slot_1 Slot_0_Sector_2 Slot_0_Sector_N Slot_0_Sector_3 Scratch area 1.) Erease scratch Sector_0 Sector_1 Slot_0_Sector_0 Slot_0_Sector_1 Slot_1_Sector_0 Slot_1_Sector_1 2.) Copy Slot_1 to scratch 4.) Copy Slot_1 to scratch 5.) Erease Slot_0 Slot_1_Sector_1 Slot_1_Sector_0 Save swap status info Slot_1_Sector_0 Slot_1_Sector_1 Slot_0_Sector_0 Slot_0_Sector_1 Slot_1_Sector_1 Slot_1_Sector_0
  • 12. Non-Confidential © Arm 201812 Firmware upgrade • Upgrade is a task of runtime FW • Potentially split between NSPE and SPE • XIP images
  • 13. Non-Confidential © Arm 201813 Image fallback • Store previous image • Health-check new image with BIST • Self confirmation • Reboot in case of failure • Revert back stable image • Set rollback after confirmation
  • 14. Non-Confidential © Arm 201814 Design constraints Header size - VTOR alignment: • Device dependent 512-1024 bytes Image slot’s layout must be aligned Scratch area size: • Flash memory wear-out • At least as the largest block size Real image size smaller than image slot: • Image header, TLV, swap status info, etc. No recovery option, if both images are faulty
  • 15. Non-Confidential © Arm 201815 Common threats Threat Mitigation Implemented Malicious firmware sent to device Signed firmware images Yes Downgrade to old vulnerable version Version or fallback counters check Not yet* Persistent malware(rootkits) Immutable boot code and data(BL1) Not yet Remote bricking of the device Backup image Yes Attacker gets signing key Key revocation support Not yet* *: Planned to be addressed in 2018
  • 16. Non-Confidential © Arm 201816 Alternatives to image swapping Position independent code Pros: • Reduced P/E cycle leads to longer lifetime • Reduced BL complexity and code footprint • Reduced boot-up time(no swapping) Cons: • Might lead bigger firmware code footprint • Some compiler switches are not compatible with PIC code • Some C lib (Microlib) cannot be compiled to be PIC • Other constraints when compiling code to be PIC Dual image build Pros: • Reduced P/E cycle leads to longer lifetime • Reduced BL complexity and code footprint • Reduced boot-up time(no swapping) Cons: • More complex build process • Extra logic in update client
  • 17. Non-Confidential © Arm 201817 Alternatives to image swapping Execute from RAM Pros: • Reduced P/E cycle leads to longer lifetime • Faster firmware execution • Reduced BL complexity and code footprint Cons: • Usually infeasible: less RAM than ROM Off-chip storage Pros: • Reduced P/E cycle leads to longer lifetime • Reduced BL complexity and code footprint Cons: • Might be a security risk: when to verify signature? • Might require image encryption, increased code footprint(include AES) and boot-up time
  • 18. Non-Confidential © Arm 201818 Alternatives to image swapping Overwrite Pros: • Reduced P/E cycle leads to longer lifetime • No need for scratch space • Reduced BL complexity and code footprint Cons: • Risk of bricking the device because no revert possible
  • 19. Non-Confidential © Arm 201819 MCUBoot as PIC code Experiment to compile PIC code: • RO and RW position independent( --ropi, --rwpi) • Vector table and IRQ handlers must be in RAM • IRQ handling unavailable until vectors and handlers relocated to RAM • Image size increased: • 29KB -> 38KB; More std. C lib was compiled-in • Limitations on source code: • Constant pointer cannot be used • CMSE armclang flag is not compatible with ROPI • Microlib cannot be compiled to be position independent
  • 20. Non-Confidential © Arm 201820 Comparison of crypto algorithms RSA • Big key size: up to 15KB • 128 bit level of security: RSA-3072 • ROM size(mbedTLS): ~14KB • RAM usage(mbedTLS): ~7KB • Key generation: slower • Signature generation: slower • Signature verification time: faster ECC • Small key size: up to 512 bits • 128 bit level of security: ECC-256 • ROM size(mbedTLS): • RAM usage(mbedTLS): ~13KB • Key generation: faster • Signature generation: faster • Signature verification : slower Moving from RSA to ECC
  • 21. Non-Confidential © Arm 201821 „Speed up asymmetric crypto” Signature verification with RSA or ECC is time consuming Symmetric crypto can spare clock cycles Replace asym. crypto with symmetric: HMAC, CMAC, etc: • Previously verified images(upgrade time) can get a MAC, generated based on Hardware Unique Key(HUK) • At boot time this MAC is verified instead of original signature • Boot time can be significantly reduced Download new firmware Verify signature Deploy in flash Generate MAC Save to flash Reset device Bootloader checks MAC
  • 22. Non-Confidential © Arm 201822 Alternatives for crypto libraries HW accelerator: • Improved performance / reduced code footprint CryptoCell-312: • Symmetric and asymmetric crypto • Runtime library: use mbedTLS API • Boot library: – Signature verification – X509 certificate parsing – Image verification and optional decryption • Asset provisioning to OTP memory • Rollback counters
  • 23. Non-Confidential © Arm 201823 Bootloader plans PSA compliance: • Anti-rollback protection • Create interface between SPE and bootloaders • Add support of multiple chains of trust and might be certificates Explore possibilities to make BL2 updatable Integrate crypto HW accelerator (CC312) with BL2
  • 24. Non-Confidential © Arm 201824 How to get involved TF-A and TF-M master codebases • https://git.trustedfirmware.org/ TF-M Team @ Connect HKG18 • Abhishek Pandit • Ashutosh Singh • Tamas Ban • Miklos Balint Get in touch • Come round LITE hacking room between 3-4 pm Wednesday • Schedule a meeting via hkg18.pathable.com More info on developer.arm.com
  • 25. 2525 Confidential © 2017 Arm Limited Thank You! Danke! Merci! 谢谢! ありがとう! Gracias! Kiitos! 감사합니다 धन्यवाद
  • 26. Non-Confidential © Arm 201826 Supported platforms MCUBoot with TF-M can run on: • In simulator environment(FVP) on PC. • MPS2 development board with AN521 (Castor) FPGA image • MPS2 development board with AN519 (M23) FPGA image • Musca_A porting is in progress
  • 27. Non-Confidential © Arm 201827 Trailer(Swap status) BL2 - Bootloader Secure firmware Non-secure firmware Header TLV(SHA, DS) Secure firmware Non-secure firmware Header TLV(SHA, DS) SLOT_1 Placeholder for new image SLOT_0 Active image Scratch area Currently not updatable 0x0000... 0xXXXX... Used during image swapping
  • 28. Non-Confidential © Arm 201828 BL2 - Bootloader started Erase SLOT_1 Finalize aborted swap Initialize phase Authenticate SW in SLOT_1 Swap images between SLOT_0 and SLOT_1 Finalize image status info Pass execution to SPE in SLOT_0 CPU released from reset Is new SW in SLOT_1 Is there aborted swap? yes no yes Valid SW? no no
  • 29. Non-Confidential © Arm 201829 SPENSPE Update Client Trusted Update Function Firmware Storage Server Runtime firmware BL2 - Bootloader Slot_0 – Active Image Slot_1 – New imageLocal Storage 1. Download: - firmware - manifest 2. Authentication: - send manifest Keys NV counters 3. Provison new image 4. Reboot 5. Authenticate and swap images, start image in slot_0 Remote server
  • 30. Non-Confidential © Arm 201830 Old image New image Reboot New image Old image Test NOK New image Old image New image Old image Test OK Confirm New image Old image Reboot Old image New image Set rollback

Editor's Notes

  1. Assumes a two stage bootloader Assumes Assumes certain kind of certificate chain, e.g. updating validation certificate for NSPE images requires updating BL2.