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Instruction Cycle
Phases of Instruction Cycle

Unit 3 - CONTROL UNIT DESIGN
Abhineet Anand
Computer Science and Engg. Department
University of Petroleum and Energy Studies, Dehradun

November 26, 2012

Abhineet Anand

Unit 3 - CONTROL UNIT DESIGN
Instruction Cycle
Phases of Instruction Cycle

Introduction
Diagram
Circuit Used

Instruction Cycle

A program residing in the memory unit of the computer
consist of a sequence of Instructions.
The program is executed in the computer by going through
a cycle for each instruction.
Each instruction cycle in turn is subdivided into a sequence
of sub cycle or phase.

Abhineet Anand

Unit 3 - CONTROL UNIT DESIGN
Instruction Cycle
Phases of Instruction Cycle

Introduction
Diagram
Circuit Used

Instruction Cycle

Abhineet Anand

Unit 3 - CONTROL UNIT DESIGN
Instruction Cycle
Phases of Instruction Cycle

Introduction
Diagram
Circuit Used

Circuits Used

The circuits used in the CPU during the cycle are:
Program counter (PC) - an incrementing counter that
keeps track of the memory address of the instruction that is
to be executed next.
Memory address register (MAR) - holds the address of a
memory block to be read from or written to.
Memory data register (MDR) - a two-way register that
holds data fetched from memory (and ready for the CPU to
process) or data waiting to be stored in memory.

Abhineet Anand

Unit 3 - CONTROL UNIT DESIGN
Instruction Cycle
Phases of Instruction Cycle

Introduction
Diagram
Circuit Used

Circuits Used Contd..

Instruction register (IR) - a temporary holding ground for
the instruction that has just been fetched from memory
Control unit (CU) - decodes the program instruction in the
IR, selecting machine resources such as a data source
register and a particular arithmetic operation, and
coordinates activation of those resources
Arithmetic logic unit (ALU) - performs mathematical and
logical operations

Abhineet Anand

Unit 3 - CONTROL UNIT DESIGN
Instruction Cycle
Phases of Instruction Cycle

Fetching the instruction
Decode the instruction
In case of a memory instruction
Execute the instruction

Phases of Instruction Cycle

In basic computer, each instruction cycle consists of the
following phases:
Fetch an instruction from Memory.
Decode the instruction.
Read the effective address from memory if the instruction
has an indirect address.
Execute the instruction.

Abhineet Anand

Unit 3 - CONTROL UNIT DESIGN
Instruction Cycle
Phases of Instruction Cycle

Fetching the instruction
Decode the instruction
In case of a memory instruction
Execute the instruction

Fetching the instruction

The next instruction is fetched from the memory address
that is currently stored in the program counter (PC), and
stored in the instruction register (IR).
Now, the PC points to the next instruction that will be read
at the next cycle.

Abhineet Anand

Unit 3 - CONTROL UNIT DESIGN
Instruction Cycle
Phases of Instruction Cycle

Fetching the instruction
Decode the instruction
In case of a memory instruction
Execute the instruction

Decode the instruction

The decoder interprets the instruction.
During this phases the instruction inside the IR (instruction
register) gets decoded.

Abhineet Anand

Unit 3 - CONTROL UNIT DESIGN
Instruction Cycle
Phases of Instruction Cycle

Fetching the instruction
Decode the instruction
In case of a memory instruction
Execute the instruction

In case of a memory instruction
In case of a memory instruction (direct or indirect) the
execution phase will be in the next clock pulse.
Required data is fetched from main memory to be
processed and then placed into data registers.
During this phases the instruction inside the IR (instruction
register) gets decoded.
If the instruction is direct, nothing is done at this clock
pulse.
If this is an I/O instruction or a Register instruction, the
operation is performed (executed) at clock Pulse.

Abhineet Anand

Unit 3 - CONTROL UNIT DESIGN
Instruction Cycle
Phases of Instruction Cycle

Fetching the instruction
Decode the instruction
In case of a memory instruction
Execute the instruction

Execute the instruction
The control unit of CPU passes the decoded information
as a sequence of control signals.
Signals are passed to the relevant function units of the
CPU to perform the actions required.
These action may be :
Reading values from registers,
Passing them to the ALU to perform mathematical or logic
functions on them, or
Writing the result back to a register

The result generated by the operation is stored in the main
memory, or sent to an output device.

Abhineet Anand

Unit 3 - CONTROL UNIT DESIGN
Instruction Cycle
Phases of Instruction Cycle

Fetching the instruction
Decode the instruction
In case of a memory instruction
Execute the instruction

The Fetch Execute cycle in Transfer Notation

Expressed in register transfer notation:
MAR <- PC
MDR<- Memory {MAR address}; PC <- [PC]+1 (Increment
the PC for next cycle at the same time)
IR<- MDR

Abhineet Anand

Unit 3 - CONTROL UNIT DESIGN
Instruction Cycle
Phases of Instruction Cycle

Fetching the instruction
Decode the instruction
In case of a memory instruction
Execute the instruction

THANK YOU

Abhineet Anand

Unit 3 - CONTROL UNIT DESIGN

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Instruction cycle

  • 1. Instruction Cycle Phases of Instruction Cycle Unit 3 - CONTROL UNIT DESIGN Abhineet Anand Computer Science and Engg. Department University of Petroleum and Energy Studies, Dehradun November 26, 2012 Abhineet Anand Unit 3 - CONTROL UNIT DESIGN
  • 2. Instruction Cycle Phases of Instruction Cycle Introduction Diagram Circuit Used Instruction Cycle A program residing in the memory unit of the computer consist of a sequence of Instructions. The program is executed in the computer by going through a cycle for each instruction. Each instruction cycle in turn is subdivided into a sequence of sub cycle or phase. Abhineet Anand Unit 3 - CONTROL UNIT DESIGN
  • 3. Instruction Cycle Phases of Instruction Cycle Introduction Diagram Circuit Used Instruction Cycle Abhineet Anand Unit 3 - CONTROL UNIT DESIGN
  • 4. Instruction Cycle Phases of Instruction Cycle Introduction Diagram Circuit Used Circuits Used The circuits used in the CPU during the cycle are: Program counter (PC) - an incrementing counter that keeps track of the memory address of the instruction that is to be executed next. Memory address register (MAR) - holds the address of a memory block to be read from or written to. Memory data register (MDR) - a two-way register that holds data fetched from memory (and ready for the CPU to process) or data waiting to be stored in memory. Abhineet Anand Unit 3 - CONTROL UNIT DESIGN
  • 5. Instruction Cycle Phases of Instruction Cycle Introduction Diagram Circuit Used Circuits Used Contd.. Instruction register (IR) - a temporary holding ground for the instruction that has just been fetched from memory Control unit (CU) - decodes the program instruction in the IR, selecting machine resources such as a data source register and a particular arithmetic operation, and coordinates activation of those resources Arithmetic logic unit (ALU) - performs mathematical and logical operations Abhineet Anand Unit 3 - CONTROL UNIT DESIGN
  • 6. Instruction Cycle Phases of Instruction Cycle Fetching the instruction Decode the instruction In case of a memory instruction Execute the instruction Phases of Instruction Cycle In basic computer, each instruction cycle consists of the following phases: Fetch an instruction from Memory. Decode the instruction. Read the effective address from memory if the instruction has an indirect address. Execute the instruction. Abhineet Anand Unit 3 - CONTROL UNIT DESIGN
  • 7. Instruction Cycle Phases of Instruction Cycle Fetching the instruction Decode the instruction In case of a memory instruction Execute the instruction Fetching the instruction The next instruction is fetched from the memory address that is currently stored in the program counter (PC), and stored in the instruction register (IR). Now, the PC points to the next instruction that will be read at the next cycle. Abhineet Anand Unit 3 - CONTROL UNIT DESIGN
  • 8. Instruction Cycle Phases of Instruction Cycle Fetching the instruction Decode the instruction In case of a memory instruction Execute the instruction Decode the instruction The decoder interprets the instruction. During this phases the instruction inside the IR (instruction register) gets decoded. Abhineet Anand Unit 3 - CONTROL UNIT DESIGN
  • 9. Instruction Cycle Phases of Instruction Cycle Fetching the instruction Decode the instruction In case of a memory instruction Execute the instruction In case of a memory instruction In case of a memory instruction (direct or indirect) the execution phase will be in the next clock pulse. Required data is fetched from main memory to be processed and then placed into data registers. During this phases the instruction inside the IR (instruction register) gets decoded. If the instruction is direct, nothing is done at this clock pulse. If this is an I/O instruction or a Register instruction, the operation is performed (executed) at clock Pulse. Abhineet Anand Unit 3 - CONTROL UNIT DESIGN
  • 10. Instruction Cycle Phases of Instruction Cycle Fetching the instruction Decode the instruction In case of a memory instruction Execute the instruction Execute the instruction The control unit of CPU passes the decoded information as a sequence of control signals. Signals are passed to the relevant function units of the CPU to perform the actions required. These action may be : Reading values from registers, Passing them to the ALU to perform mathematical or logic functions on them, or Writing the result back to a register The result generated by the operation is stored in the main memory, or sent to an output device. Abhineet Anand Unit 3 - CONTROL UNIT DESIGN
  • 11. Instruction Cycle Phases of Instruction Cycle Fetching the instruction Decode the instruction In case of a memory instruction Execute the instruction The Fetch Execute cycle in Transfer Notation Expressed in register transfer notation: MAR <- PC MDR<- Memory {MAR address}; PC <- [PC]+1 (Increment the PC for next cycle at the same time) IR<- MDR Abhineet Anand Unit 3 - CONTROL UNIT DESIGN
  • 12. Instruction Cycle Phases of Instruction Cycle Fetching the instruction Decode the instruction In case of a memory instruction Execute the instruction THANK YOU Abhineet Anand Unit 3 - CONTROL UNIT DESIGN