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Data types in verilog

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Data types in verilog

  1. 1. DATA TYPES ANINDRA 1
  2. 2. TYPES OF DATA TYPES….  There are two groups of data types ….. I. Nets . II. Variable .  Verilog data types supports 4-state variables 0,1,X,Z.  These net data types are driven in the continuous assignment only .  Synthesizable. 2 12/11/2014
  3. 3. NET DATA TYPE …..  What is net..?  The group of data types which are used for connections are known as net data types .  Net is the group of data types.  The default value of net data types is Z. 3 12/11/2014
  4. 4. NET DATA TYPES…  There are many data types in the net.  They are as follows :-  wire , tri , tri1, supply0 , wand , triand , tri0 , supply1 , wor , trior , trireg.  In these data types mostly we prefer wire data type . 4 12/11/2014
  5. 5. NET DATA TYPES…  WIRE :-  A wire net is typically used for nets that are driven by a single gate or continuous assignment.  Example : wire w1, w2; // declares 2 wires.  The default data type in declaration is wire .  TRI :-  A wire net is typically used for nets that are driven by multiple drivers drive a net .  Logical conflicts from multiple sources on a wire or a tri net result in unknown values unless the net is controlled by logic strength. 5 12/11/2014
  6. 6. NET DATA TYPES…  Example : tri [15:0] busa; // a tri-state 16-bit bus .  WIRED NETS :-  Wired nets are of type wor , wand , trior , and triand .  These are used to model wired logic configurations .  These will resolve the conflicts that result when multiple drivers drive the same net.  The wor and trior nets create wired or configurations, such that when any of the drivers is 1, the net is 1.  The wand and triand nets create wired and configurations, such that if any driver is 0, the net is 0. 6 12/11/2014
  7. 7. NET DATA TYPES…  EXAMPLES : wor w1 ,w2 ; // or operation .  Wand x,y ; // and operation .  Trior [2:0] bus ; //or operation.  Triand [3:0] bus ; // and operation. 7 12/11/2014
  8. 8. NET DATA TYPES…  TRIREG :-  The trireg net stores a value and is used to model charge storage nodes. A trireg can be one of two states:  The Driven State :- When at least one driver of a trireg has a value of 1, 0, or x, that value propagates into the trireg and is the trireg’s driven value.  Capacitive State :- When all the drivers of a trireg net are at the high impedance value (z), the trireg net retains its last driven value; the high impedance  value does not propagate from the driver to the trireg.  This is only data type in net which is used to store.  EXAMPLE : trireg [2:0] bus ; // a charge storage node . 8 12/11/2014
  9. 9. NET DATA TYPES …  TRI0 AND TRI1 :-  The tri0 and tri1 nets model nets with resistive pulldown and resistive pullup devices on them.  When no driver drives a tri0 net, its value is 0.  When no driver drives a tri1 net, its value is 1.  These data types are use in the switch level modeling .  SUPPLY0 AND SUPPLY1 :-  These data types are used to strength the data types .  If one or more drivers drives the input the there is a chance of getting unknown value for output. In order to avoid that we these strengthen levels.  Where supply0(gnd) and 1(vdd) are part of the strength levels. 9 12/11/2014
  10. 10. VARIABLE DATA TYPES …  It is used to represent the data storage element.  The default value of variable data type is X.  Data types under the variable data type…  Reg , integer , real , time .  REG :-  This data type is used to represent the data storage element .  It holds the value , Until the a new value is assigned to it .  This reg is used when the variables are declared in the procedural blocks only (always and initial block).  Example :- reg [2:0] out ; //where the out is used in the procedural block . 10 12/11/2014
  11. 11. VARIABLE DATA TYPES…  Integer :-  It is used to declare integers.  Example :- integer count ; //assume that count is an integer value.  It is signed.  It is synthesizable .  Default size is 32 bit.  Real :-  Used to declare the real values.  Default size is 64 bit.  Not synthesizable . 11 12/11/2014
  12. 12. VARIABLE DATA TYPES …  EXAMPLE :- real x;  initial  begin  x=4.47;  #10 x=3.2;  end 12 12/11/2014
  13. 13. VARIABLE DATA TYPES…  Time :-  This is used to record the simulation time .  Default size is 64 bit .  Not synthesizable .  Example :- time snapshot ; 13 12/11/2014
  14. 14. IMPORTANT POINTS …  Net is not a keyword.  Reg is same not as hardware register .  The default data type is wire.  The rules for using nets and registers in ports of modules and primitives: 14 12/11/2014 Data type input output inout wire yes yes yes Reg No Yes no
  15. 15. THANK YOU….. 15 12/11/2014

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