SlideShare a Scribd company logo
1 of 67
Download to read offline
Chapter-3: Methods of analysis
3.1: Introduction
• Having understood the fundamental laws of circuit theory (Ohm’s and
Kirchhoff’s laws), we are now prepared to apply these laws to develop
two powerful techniques for circuit analysis i.e.
• Nodal analysis, which is based on a systematic application of
Kirchhoff’s current law (KCL), and
• Mesh analysis, which is based on a systematic application of
Kirchhoff’s voltage law (KVL).
3.2: Nodal Analysis
• Nodal analysis provides a general procedure for analyzing circuits
using node voltages as the circuit variables.
• Choosing node voltages as circuit variables is convenient and reduces
the number of equations that must solve simultaneously.
• In Nodal Analysis, node voltages are defined with respect to some
common reference point in the circuit.
• Generally one of the nodes in a network is selected as reference node
and all other node voltages are defined with respect to this node.
• Reference node is normally selected such that most of the circuit
branches terminate/originate there.
• Reference node is always assumed to be at zero or ground potential.
• All unknown node voltages are represented by positive variables with
respect to ground and even if some of these voltages are in fact
negative, it will be revealed in subsequent computations.
• KCL equations are drawn only for non-reference nodes of network.
• While writing the KCL equations, we opt to assume that node being
considered is at high potential i.e. entering currents are negative.
• A reference node is indicated by any of the
three symbols shown in Fig. 3.1.
• We will always use symbol of Fig. 3.1(b).
• Having selected a reference node, next
assign positive voltage variables to non-
reference nodes w.r.t reference node.
• Let’s tryout on circuit with current sources.
• Consider the circuit of Fig. 3.2(a), where node 0 is the reference node
while nodes 1 & 2 are assigned voltage variables v1 & v2 respectively.
• We now apply KCL to each non-reference node of the circuit.
• Where currents directions are NOT provided, then always assume that
current flows away from the node being considered.
• This is reflected in Fig. 3.2(b), where i1, i2 & i3 are added as the
currents through resistors R1, R2 & R3 respectively to prepare the
circuit for application of KCL.
• At node 1: (3.1).
• At node 2: (3.2).
• Next apply Ohm’s law to express currents i1,
i2 and i3 in terms of node voltages i.e.
•
• (3.4).
•
• Substituting current values of Eq. (3.4) in Eqs. (3.1) & (3.2) results in,
• (3.5).
• (3.6).
• In terms of the conductance's, Eqs. (3.5) and (3.6) become
• (3.7).
• (3.8).
• The third step in nodal analysis is to solve for the node voltages.
• Set of Eqs. (3.5) & (3.6) or (3.7) & (3.8) can be solved for the node
voltages v1 & v2 using any standard method, such as the substitution
method, the elimination method, Cramer’s rule, or matrix inversion.
• Simultaneous equations may also be solved using calculators or with
software packages such as MATLAB, Mathcad, Maple & Quattro Pro
• In this course we will employ elimination method & Cramer’s rule.
• Example 3.1: Calculate the node voltages in
the circuit of Fig. 3.3(a) shown here.
• Consider Fig. 3.3(b), where the circuit of Fig.
3.3(a) has been prepared for nodal analysis.
• Notice how the currents are selected for
the application of KCL.
• Except for the branches with current
sources, the labeling of the currents is
arbitrary but consistent with current flow.
• Reference node is selected and node voltages v1 & v2 are allocated.
• At node 1; applying KCL and Ohm’s law gives
•
• Multiplying each term by 4 & collecting similar terms together yield,
• (3.1.1).
• At node 2:
• Multiplying each term by 12 & collecting similar terms together yield,
• (3.1.2).
• Simultaneous Eqs. (3.1.1 & 3.1.2) will be solved 1st using elimination
method followed by Cramer’s rule to discover variables v1 & v2.
• Elimination Technique; addition of Eqs. (3.1.1) & (3.1.2) eliminate v3.
• This results in
• Placing v2 value in one of Eqs. (3.1.1) & (3.1.2) puts v1 = 13.333 V.
• To use Cramer’s rule, cast the simultaneous equations in matrix form.
• Eqs. (3.1.1) & (3.1.2) in matrix form would appear as,
• (3.1.3).
• The determinant of the matrix is
• We now obtain v1 & v2 as
•
•
• Class Work: Compute all the currents in circuit of Fig. 3.3(b)?
•
•
• The fact that i2 is negative shows that the current flows in the direction
opposite to the one assumed.
• Home Work: Practice P_Problem 3.1, Problems 3.2, 3.3 and 3.4.
• Example 3.2: Determine node voltages in circuit of Fig. 3.5(a).
• Circuit in this example has three non-
reference nodes & voltages assigned
to them are shown in Fig. 3.5(b).
• (3.2.1).
• (3.2.2).
• (3.2.3).
• At node 1:
• At node 2:
• At node 3: 
• Multiplying by 4, 8 & 8 respectively, collecting the similar terms
together and rearranging transforms three node equations into:
• Substitution Method: involves writing one variable in terms of other.
• Adding Eqs. (3.2.1) & (3.2.3) eliminates variable v3 yielding,
• 5v1 – 5v2 = 12 & once rearranged, v1 – v2 = 12/5 = 2.4 (3.2.4).
• Adding Eqs. (3.2.2) & (3.2.3) also eliminates variable v3, yielding,
• – 2v1 + 4v2 = 0, which can also be expressed as v1 = 2v2.
• Substituting this value of v1 = 2v2 into Eq. (3.2.4) yields,
• 2v2 – v2 = 2.4, which leads to v2 = 2.4 V.
• Putting this obtained value of v2 = 2.4 in v1 = 2v2 yield v1 = 4.8 V.
• Applying known values of v1 & v2 in Eq. (3.2.3) yield? v3 = – 2.4 V
• Elimination Technique: 1st get set of equations with 2 alike variables.
• Adding Eqs. (3.2.1) & (3.2.3), yield first equation with two variables,
• 5v1 – 5v2 = 12 (3.2.4).
• Addition of Eqs. (3.2.2) & (3.2.3) provide 2nd two variable equation,
• – 2v1 + 4v2 = 0 (3.2.5).
• 2(Eq. 3.2.4) = 10v1 – 10v2 = 24 AND 5(Eq. 3.2.5) = – 10v1 + 20v2 = 0.
• Adding them yield 10 v2 = 24 or v2 = 2.4 V.
• Putting this value in any of above Eqs yield v1 = 4.8 V.
• Substituting known value of v1 & v2 into Eq. (3.2.3) yields,
• v3 = 3v2 – 2v1 = (3 x 2.4) – (2 x 4.8) = 7.2 – 9.6 = – 2.4 V.
• Cramer’s Rule Solution: put Eqs. (3.2.1) to (3.2.3) in matrix form.
• (3.2.6).
• From this, we obtain
• Where , 1, 2 & 3 are the determinants calculated by following any
one of the methods give in Appendix A. of the book.
• We opt to repeat 1st two rows & multiply terms diagonally as follows;
•
• Thus ;
• Similarly;
• While;
• And finally;
• Thus,
• Note: node voltages values remain unaffected by method employed.
• Class Work: compute currents i1, i2, i3, ix & dependent source output?
• i1 = (v1 – v3)  4  = {4.8 – (– 2.4)]  4  = 7.2  4  = 1.8 A.
• i2 = (v2 – v3)  8  = {2.4 – (– 2.4)]  8  = 4.8  8  = 0.6 A.
• i3 = v2  4  = (2.4)  4  = 0.6 A.
• ix = (v1 – v2)  2  = (4.8 – 2.4)  2  = 2.4  2  = 1.2 A.
• Out put of dependent current source = 2ix = 2(1.2) = 2.4 A.
• Home Work: P_Problem 3.2, Problems 3.7 & 3.10.
3.3: Nodal Analysis with Voltage Sources
• Presence of Voltage sources (independent/dependent) affect the way
nodal analysis is performed in circuits.
• KCL is never applied to the node with a voltage source attached to it.
• Voltage source can appear in two possible configurations in a circuit
as shown in the circuit of Fig. 3.7.
• Voltage sources may appear either
in between two non-reference or
reference & non-reference nodes.
• CASE 1: When a voltage source (dependent or independent) is
connected between the reference & non-reference nodes, just set the
voltage at non-reference node equal to voltage of the voltage source.
• For example, in Fig. 3.7, v1 = 10 V (3.10).
• CASE 2: When the voltage source (dependent or independent) is
connected between two non-reference nodes, the two non-reference
nodes are combined into a super node; which change the technique of
node analysis and named as super node analysis method.
• In Fig. 3.7, nodes 2 and 3 form a super node.
• A super node is formed by enclosing a (dependent or independent)
voltage source connected between two non-reference nodes and any
elements connected in parallel with it.
• We could have more than two nodes forming a single super node.
• All non-reference nodes, without any voltage source attached to them,
are analyzed taking same steps as in circuits with only current sources.
• The super nodes are however treated differently. Why?
• Because an essential component of nodal analysis is applying KCL,
which requires knowing the current through each element.
• There is no way knowing current through voltage source in advance.
• Yet, KCL must be satisfied at a super node as it is a closed surface
• Hence, KCL at the super node of Fig. 3.7 yield,
• Expressed in node voltages
• To create 2nd equation (N – 1 = 2) apply KVL to loop with super node as
shown in redrawn circuit of Fig. 3.8.
• Going around the loop in clockwise
•
• Once rearranged
• Called constraint equation, it can too be drawn directly by inspection.
• Difference of potential that exits between nodes v2 & v3 can’t exceed
source voltage and is restricted by constraint equation i.e. v2 – v3 = 5.
• Note that a super node has no voltage of its own.
• Voltage source inside the super node provides a constraint equation to
complete N – 1 equations needed to solve the circuit by node analysis.
• Super node analysis makes use of both KCL and KVL.
• Example 3.3: Solve the circuit shown in Fig. 3.9 by node analysis?
• 2 V source amid nodes 1, 2 & parallel 10  resistor form super node.
• Applying KCL to the super node, as shown
in Fig. 3.10(a), gives
• Substituting i1 & i2 in terms of the node
voltages OR
• OR (3.3.1).
• Constraint Eq.
applying direct
inspection will
be v2 – v1 = 2 V.
• KVL to loop of Fig. 3.10(b) yield same constraint equation i.e.
• (3.3.2).
• From Eqs. (3.3.1) and (3.3.2),
• OR
• Class Work: find the value of v2?
• Note that the 10  resistor does not make any difference because it is
connected in parallel across the super node and shares same voltage
• Home Work: P_Problem 3.3, Problems 3.11, 3.14 and 3.18.
• Example 3.4: Applying node analysis solve the circuit of Fig. 3.12.
• Nodes 1 & 2 form a super node;
so do nodes 3 & 4.
• Applying KCL to the super
nodes in Fig. 3.13(a) reveal,
• At super node 1-2,
• Expressing this in terms of the node voltages,
• multiplying by 6 and rearranged,
• (3.4.1).
• At super node 3-4,
• Expressed in node voltages,
• Multiplied by 12 & rearranged (3.4.2).
• By direct inspection constraint equations at the super node 1-2 is
• v1 – v2 = 20 (3.4.3).
• Super node 3-4 yield constraint equation v3 – v4 = 3vx, but vx = v1 – v4.
• Hence, 3v1 – v3 – 2v4 = 0 (3.4.4).
• These constraint equations can also be computed, by applying KVL
to branches involving the voltage sources, as shown in Fig. 3.13(b).
• Interested students can go through the given procedure in the book.
• For four unknown node voltage variables four simultaneous equations
(N – 1 = 5 – 1 = 4) are needed, rendering Eq. (3.4.5) redundant.
• Fifth unneeded equation is computed applying KVL to loop 3 i.e.
• vx – 3vx + 6i3 – 20 = 0  – 2v1 – v2 + v3 + 2v4 = 20 (3.4.5).
• Solution by Variable Elimination Technique:
• We need only four equation i.e. 3.4.1 to 3.4.4 to solve the circuit.
• Substituting value of variable v2 from Eq. (3.4.3) i.e. v2 = v1 – 20 into
Eq. (3.4.1) i.e. 5v1 + v2 – v3 – 2v4 = 60 eliminates variable v2 yielding
• 6v1 – v3 – 2v4 = 80 (3.4.6).
• Subtracting (Eq. 3.4.4) i.e. 3v1 – v3 – 2v4 = 0 from Eq. (3.4.6) above
leaves behind – 3v1 = – 80
• Solving – 3v1 = – 80 give node voltage value v1 = 80  3 = 26.667 V.
• Putting this value of v1 in Eq. 3.4.3 v2 = v1 – 20 reveal v2 = 6.667 V.
• Replacing variable v2 from Eq. (3.4.3) i.e. v2 = v1 – 20 in Eq. (3.4.2)
i.e. 4v1 + 2v2 – 5v3 – 16v4 = 0 results in equation,
• 6v1 – 5v3 – 16v4 = 40 (3.4.7).
• Putting v1 & v2 value in the Eq. (3.4.1) i.e. 5v1 + v2 – v3 – 2v4 = 60 and
Eq. (3.4.2) i.e. 4 v1 + 2 v2 – 5v3 – 16v4 = 0 yield set of equations;
• – v3 – 2v4 = – 80 and – 5v3 – 16v4 = – 120
• Solving above set of equations eliminate v4 and reveal v3 = 173.33 V.
• Replacing computed values v1 & v3 in Eq. (3.4.4) 3v1 – v3 – 2v4 = 0
yield v4 = – 46.67 V. What does the negative value suggest?
• Cramer’s Rule Solution
• Casting Eqs. (3.4.4) 3v1 – v3 – 2v4 = 0, (3.4.6) 6v1 – v3 – 2v4 = 80 and
(3.4.7) 6v1 – 5v3 – 16v4 = 40 in matrix form results in,
•
• Class Work: Using Cramer’s rule determine the needed determinants?
•
•
• Class Work: Find all node voltage, voltage vx and branch currents?
• and
• and
• Placing v1 & v4 value in Eq. for voltage vx; vx = v1 – v4 = 73.337 V.
• Current through 1  resistor = v4  1 = – 46.67  1 = – 46.67 A.
• Current through 2  resistor = v1  2 = 26.67  2 = 13.335 A.
• Current through 3  resistor = vx  3 = 73.33  3 = 24.443 A.
• Current through 4  resistor = v3  4 = 173.33  4 = 43.3325 A.
• Current through 6  resistor = (v3 – v2)  6 = 166.663  6 = 27.777A.
• Home Work: P_Problem 3.4, problems 3.32 and 3.36.
3.4: Mesh Analysis
• What is mesh and what is the difference between mesh and loop?
• Unlike node analysis that used node voltages as circuit variables,
mesh analysis uses mesh currents as the circuit variables.
• Nodal analysis applies KCL to find unknown voltages in a given
circuit, while mesh analysis applies KVL to find unknown currents.
• Mesh analysis is only applicable to a planar circuits. What is planar circuit?
• A planar circuit is one that can be drawn in a plane with no branches
crossing one another; otherwise it is nonplanar.
• A circuit may have crossing branches and still be planar if it can be
redrawn such that it has no crossing branches.
• For example, circuit in Fig. 3.15(a) has two crossing branches, but it
is planar, as redrawing it removes crossing branches, see Fig. 3.15(b).
• How about the circuit of Fig. 3.16, is it planar or nonplanar? (nonplanar)
• Nonplanar circuits can conveniently be handled using nodal analysis.
• Class Work: Identify the loop and
mesh in circuit of Fig. 3.17?
• Paths abefa & bcdeb are meshes, but
abcdefa is a not a mesh, it is a loop.
• Applying KVL to any mesh/loop provide KVL/mesh/loop equation,
where all load voltages are stated as Ohm’s law statements i.e. v = iR.
• To illustrate the mesh analysis steps involved consider circuit above.
• The first step requires that positive mesh current variables i1 and i2 are
assigned to meshes 1 and 2 respectively.
• Although a mesh current may be assigned an arbitrary direction, it is
conventional to assume that each mesh current flows clockwise.
• As the second step, we apply KVL to each mesh.
• At mesh 1: ,
• Load voltages stated as product of mesh current & branch resistance.
• Simplified, (3.13).
• For mesh 2: , which once simplified,
• (3.14).
• Notice that coefficient of mesh current in neighborhood is negative.
• The third step is to solve for the mesh currents by using any technique
for solving the simultaneous equations.
• Applying Cramer’s rule, requires putting Eqs. (3.13) and (3.14) in
matrix form as follows:
• (3.3).
• According to Eq. (2.12), if a circuit analyzed has n nodes, b branches,
and l independent loops or meshes, then l = b – n + 1.
• Hence, l independent simultaneous equations are required to solve the
circuit using mesh analysis.
• As thumb rule each branch must belong to at least one mesh current.
• Notice that the branch currents are different from the mesh currents
unless the mesh is isolated.
• To distinguish between the two types of currents, we use i for a mesh
current and I for a branch current.
• Example 3.5: For the circuit in Fig. 3.18, find the branch currents I1, I2
and I3 using mesh analysis.
• For mesh 1: applying the KVL;
•
• Or (3.5.1).
• For mesh 2:
•  (3.5.2).
• To solve by substitution technique, subtracting Eq. (3.5.1) from the
product {3 x Eq. (3.5.2)}, eliminates v1, leaving behind,
•
• Substituting this in Eq. (3.5.2):
• Hence;
• To use Cramer’s rule, cast Eqs. (3.5.1) and (3.5.2) in matrix form i.e.
•
• Class Work: Find the needed determinants?
• , and
• Hence;
• And as before:
• Home Work: P_Problem 3.5, Problems 3.35 and 3.36
• Example: 3.6: Find current IO in circuit
of Fig. 3.20 using mesh analysis?
• Applying KVL to the three meshes
reveal three simultaneous equations.
• For mesh 1:
•  (3.6.1).
• For mesh 2:
•  (3.6.2).
• For mesh 3:
• But at node A, IO = i1 – i2 therefore substituting this value above,
•
•  (3.6.3).
• In matrix form, Eqs. (3.6.1) to (3.6.3) become,
•
• Class Work: Find the needed determinants?
•
•
•
•
• Calculating the mesh currents is simply;
• and,
• hence, branch current IO = i1 – i2 = 1.5 A.
• Class Work: Find the voltage drop across 4, 10, 12 & 24  resistors?
• Also determine the out put of dependent voltage source?
• v4 = (i3 – i2) x 4 = (1.5 – 0.75) x 4 = 0.75 x 4 = 3 V.
• v10 = Io x 10 = 1.5 x 10 = 15 V.
• v12 = (i1 – i3) x 12 = (2.25 – 1.5) x 12 = 0.75 x 12 =9 V.
• v24 = i2 x 24 = 0.75 x 24 = 18 V.
• Dependent source output = 4Io = 4 x 1.5 = 6 V.
• Home Work: P_Problem 3.6, Problems 342 and 3.46.
3.5: Mesh Analysis with Current Sources
• Applying mesh analysis to circuits containing current sources
(dependent or independent) may present two possible cases.
• CASE 1: When a current source only falls in path of specific mesh.
• For example; consider the circuit of Fig. 3.22.
• Current source (5 A) falls exclusively in path of mesh current i2.
• This implies that value of mesh
current i2 can neither be more nor
less than the current source output.
• Since both currents are in opposite direction, therefore, i2 = – 5 A.
• This simplifies the mesh analysis as only mesh equation needs to
solved i.e.
• Home Work; Problem 3.51.
• CASE 2: Current source is shared by two meshes, as in Fig. 3.23.
• To solve such circuit requires creation of super mesh.
• A super mesh is necessitated when two meshes have a (dependent or
independent) current source in common as shown in Fig 3.23(a).
• To create a super mesh exclude the current source and any elements
connected in series with it, as shown in Fig. 3.23(b).
• As shown in Fig. 3.23(b), super mesh is created at the periphery of the
two meshes that share current source and is treated differently.
• If a circuit has two or more super meshes and if they intersect then,
they can be combined to form a larger super mesh.
• A super mesh must satisfy KVL like any other mesh.
• For example, applying KVL to the super mesh in Fig. 3.23(b) returns,
•  (3.18).
• Now is it evident as to why a super mesh is treated differently?
• That is: while applying KVL to super mesh, each voltage drop in path
is treated product of the individual meshes either i1 or i2.
• Applying KCL to node 0 in Fig. 3.23(a) gives 2nd mesh equation i.e.
• (3.19).
• Solving Eqs. (3.18) and (3.19), yield;
• Note the following properties of a super mesh:
1. Current source inside super mesh provides constraint equation by
applying KCL. (same can also be drawn directly as difference of
mesh currents sharing current source must equal source current.)
2. Super mesh has no current of its own.
3. Super mesh analysis involves
both KVL as well as KCL.
• Example 3.7: Find currents i1
to i4 using mesh analysis in
circuit shown in Fig. 3.24?
• Note that meshes 1 & 2 form a super mesh since they have an
independent current source in common.
• Also, meshes 2 & 3 form another super mesh because they have a
dependent current source in common.
• Two super meshes intersect and form a larger super mesh as shown.
• Applying KVL to the larger super mesh,
• once simplified and divided by 2,
• (3.7.1).
• For the independent current source, applying KCL to node P yields;
• (3.7.2).
• For the dependent current source, applying KCL to node Q yields;
• but
• (3.7.3).
• In mesh 4: simplified & divided by 2,
• (3.7.4).
• Class Work: Solve Eqs (3.7.1) to (3.7.4) employing substitution?
• Substituting i1 = i2 – 5 and i2 = i3 – 3i4 from Eqs. 3.7.2 & 3.7.3
respectively into Eq 3.71 yield; i2 – 5 + 3i3 – 9i4 + 6i3 – 4i4 = 0.
• Replacing i2 = i3 – 3i4 from Eq. 3.7.3 in this result transforms it into,
• i3 – 3i4 – 5 + 3i3 – 9i4 + 6i3 – 4i4 = 0 and once simplified,
• –16i4 + 10i3 = 5, which can be solved with 5i4 – 4i3 = – 5 (Eq. 3.7.4).
• 5 (–16i4 + 10i3 =5) = –80i4 + 50i3 = 25 and
• 16 (5i4 – 4i3 = – 5) = 80i4 – 64i3 = – 80.
• Adding them together 14i3 = – 55 or i3 = 3.93 A.
• Putting this value of i3 in Eq 3.7.4 reveal i4 = 2.143 A.
• Following the same pattern reveals i1 = – 7.5 A and i2 = – 2.5 A.
• Home Work: P_Problem 3.7, Problems 3.38, 3.44 and 3.45.
3.6: Nodal and Mesh Analyses by Inspection
• When all current sources in a circuit are independent, we need not
apply KCL to each node to produce nodal equations, as we did so far.
• There is a shortcut approach based on mere inspection of a circuit.
• Let’s re-examine the circuit of Fig. 3.26(a) that we solved in Sec 3.2.
• Re-visit the nodal equations that were derived for
this circuit, one of which casted in matrix form is
reproduced below,
• (3.21).
• Observe that every diagonal term is the sum of the conductance's
connected directly to node 1 or 2.
• Where as the off-diagonal terms are the negatives of the conductance's
connected between the nodes 1 & 2.
• Also note that each term on the right hand side of Eq. (3.21) is the
algebraic sum of independent current sources connected to the node.
• In general, if a circuit with independent current sources has N non-
reference nodes, then N-node voltage equations can be written in
terms of the conductance's as shown in the conductance matrix below.
• (3.22).
• In the shown conductance matrix,
• Gkk = Sum of the conductance's connected to node k
• Gkj = Gjk = Negative of the sum of the conductance's directly
connecting nodes k and j, k ≠ j.
• vk = Unknown voltage at node k
• ik = Sum of all independent current sources directly connected to node
k, with currents entering the node treated as positive
• Equation (3.22) can easily be solved to find unknown node voltages.
• We can also represent Eq.322 simply as Gv = i (3.23).
• G is conductance matrix; v is output vector; and i is input vector.
• Keep in mind that this is valid for circuits with only independent
current sources and linear resistors.
• Example 3.8: Write the node
voltage matrix equations for
the circuit of Fig. 3.27 by
inspection.
• Four non-reference nodes require four node equations to solve it.
• This implies that the size of the conductance matrix G, is 4 x 4.
• Computing the diagonal terms of conductance matrix G, in Siemens.
•
•
• Calculating off diagonal terms of conductance matrix G, in Siemens.
•
•
•
•
• The terms of the input current vector i, in amperes are:
•
• We are now ready to write the needed node voltage equations i.e.
•
• Node voltages v1, v2, v3 and v4 can now be computed. How?
• Home Work; Find the node voltages in your own time
• Home Work: P_Problem 3.8 plus Problems 3.67, 3.69 and 3.70.
Mesh Analyses by Inspection
• It is also practical to obtain mesh-current equations by inspection
when a linear resistive circuit has only independent voltage sources.
• Consider circuit of Fig. 3.26(b) with two meshes solved in Sec 3.4.
• Mesh equations derived are reproduced in matrix form as Eq. 3.24.
• (3.24).
• Notice that each of the diagonal terms is the
sum of the resistances in path of mesh 1 or 2.
• Whereas each of the off diagonal terms is the negative of the
resistance common to meshes 1 & 2.
• Each term on right hand side of Eq. (3.24) is the algebraic sum taken
clockwise of all independent voltage sources in the related mesh.
• In general, if the circuit has N meshes, the N-mesh current equations
can be expressed in terms of the resistances as;
• (3.25).
• Where, Rkk = Sum of the resistances in mesh k.
• Rkj = Rjk = Negative of the sum of the resistances directly in common
with meshes k and j, k ≠ j.
• ik = Unknown mesh current for mesh k in clockwise direction.
• vk = Sum taken clockwise of all independent voltage sources in mesh
k, with voltage rise treated as positive.
• Eq. (3.25) can easily be solved to obtain the unknown mesh currents.
• Eq. 3.25 can also be simplified as; Ri = v (3.26).
• R is here resistance matrix; i is output vector; and v is input vector.
• Lt’s implement this method of writing mesh equations in a circuit.
• Example 3.9: By inspection, write the mesh-current equations for the
circuit in Fig. 3.29.
• Given circuit has five meshes, so the resistance matrix must be 5 x 5.
• Diagonal terms, in ohms, are:
•
•
•
•
•
• The off diagonal terms again in ohms are;
•
•
•
•
•
• The input voltage vector v has the following terms in volts:
•
•
• Thus, the mesh current equations are:
•
• It can now be solved to obtain mesh current values.
• Home Work: compute the mesh currents i1, i2, i3, i4 and i5. also solve
P_Problem 3.9, Problems 3.71, 3.72, 3.73 and 3.74.
3.7: Nodal Versus Mesh Analysis
• Both nodal and mesh analyses provide an systematic way of analyzing
a complex network.
• Given a network to be analyzed, how do we know which method is
better or more efficient?
• The choice of the better method is dictated by two factors
• The first factor is the nature of the particular network.
• Networks that contain many series-connected elements, voltage
sources, or super meshes are more suitable for mesh analysis.
• Whereas networks with parallel-connected elements, current sources,
or super nodes are more suitable for nodal analysis.
• Also, a circuit with fewer nodes than meshes is better analyzed using
nodal analysis, while a circuit with fewer meshes than nodes is better
analyzed using mesh analysis.
• Key is to select a method that results in smaller number of equations
• The second factor is the information required, if node voltages are
required, it may be expedient to apply nodal analysis and if currents
(branch/mesh) are required, it may be better to use mesh analysis.
• It helps to be familiar with both methods, for at least two reasons.
• First, it helps to check the results from by other method, if possible.
• Second, since each method has its limitations, only one method may
be suitable only for a particular problem e.g. mesh analysis is the only
method to use in analyzing transistor circuits.
• But mesh analysis cannot easily be used to solve an op amp because
there is no direct way to obtain the voltage across the op amp itself.
• For nonplanar networks, nodal analysis is the only option, because
mesh analysis only applies to planar networks.
• It is also relatively easy to program computational devices for
analyzing a circuit employing nodal analysis than mesh analysis.
• This allows to analyze complicated circuits that defy hand calculation.
• Computer software package based nodal analysis is left as self study.
• Self Study: Go through Sec 3.10, that gives summary of what all we
have studied in this chapter.
• Home Work: Review questions 3.1 to 3.10.
• Also solve all the problems given at the end of chapter that are more
or less similar to the one we solved in this chapter

More Related Content

What's hot

What's hot (20)

09 rc filters
09 rc filters09 rc filters
09 rc filters
 
Superposition theorem
Superposition theoremSuperposition theorem
Superposition theorem
 
mesh analysis
mesh analysismesh analysis
mesh analysis
 
Transient response of RC , RL circuits with step input
Transient response of RC , RL circuits  with step inputTransient response of RC , RL circuits  with step input
Transient response of RC , RL circuits with step input
 
Bipolar junction Transistor
Bipolar junction TransistorBipolar junction Transistor
Bipolar junction Transistor
 
A.c circuits
A.c circuitsA.c circuits
A.c circuits
 
Circuit theory basics
Circuit theory basicsCircuit theory basics
Circuit theory basics
 
Thyrstors turn off methods
Thyrstors turn off methodsThyrstors turn off methods
Thyrstors turn off methods
 
Thyristor
ThyristorThyristor
Thyristor
 
Rc and rl circuits
Rc and rl circuitsRc and rl circuits
Rc and rl circuits
 
Clipper and clampers
Clipper and clampersClipper and clampers
Clipper and clampers
 
rectifiers
rectifiersrectifiers
rectifiers
 
Transistor biasing
Transistor biasing Transistor biasing
Transistor biasing
 
Rectifiers (ac dc)
Rectifiers (ac dc) Rectifiers (ac dc)
Rectifiers (ac dc)
 
Basic of Diode Rectifiers
Basic of Diode RectifiersBasic of Diode Rectifiers
Basic of Diode Rectifiers
 
Superposition and norton Theorem
Superposition and norton TheoremSuperposition and norton Theorem
Superposition and norton Theorem
 
Linear circuit analysis 1
Linear circuit analysis 1Linear circuit analysis 1
Linear circuit analysis 1
 
inductive ac circuits
 inductive ac circuits inductive ac circuits
inductive ac circuits
 
Star delta trsformation
Star delta trsformationStar delta trsformation
Star delta trsformation
 
Mesh analysis and Nodal Analysis
Mesh analysis and Nodal AnalysisMesh analysis and Nodal Analysis
Mesh analysis and Nodal Analysis
 

Similar to Methods of analysis linear circuit analysis

Electric Circuit - Lecture 04
Electric Circuit - Lecture 04Electric Circuit - Lecture 04
Electric Circuit - Lecture 04
Hassaan Rahman
 
Network theorems for electrical engineering
Network theorems for electrical engineeringNetwork theorems for electrical engineering
Network theorems for electrical engineering
Kamil Hussain
 
L 05(gdr)(et) ((ee)nptel)
L 05(gdr)(et) ((ee)nptel)L 05(gdr)(et) ((ee)nptel)
L 05(gdr)(et) ((ee)nptel)
Pradeep Godara
 
Bai thi nghiem_linear_circuit_cttt
Bai thi nghiem_linear_circuit_ctttBai thi nghiem_linear_circuit_cttt
Bai thi nghiem_linear_circuit_cttt
kutyonljne
 

Similar to Methods of analysis linear circuit analysis (20)

3- Ch03- Methods Of Analysis-Sadiku
3- Ch03- Methods Of Analysis-Sadiku3- Ch03- Methods Of Analysis-Sadiku
3- Ch03- Methods Of Analysis-Sadiku
 
circuit theory.pptx
 circuit theory.pptx circuit theory.pptx
circuit theory.pptx
 
Circuit theory 1-c3-analysis methods
Circuit theory 1-c3-analysis methodsCircuit theory 1-c3-analysis methods
Circuit theory 1-c3-analysis methods
 
2. Nodal Analysis Complete.pdf
2. Nodal Analysis Complete.pdf2. Nodal Analysis Complete.pdf
2. Nodal Analysis Complete.pdf
 
Circuitlaws i-120122051920-phpapp01
Circuitlaws i-120122051920-phpapp01Circuitlaws i-120122051920-phpapp01
Circuitlaws i-120122051920-phpapp01
 
beee final.ppt
beee final.pptbeee final.ppt
beee final.ppt
 
Electric Circuit - Lecture 04
Electric Circuit - Lecture 04Electric Circuit - Lecture 04
Electric Circuit - Lecture 04
 
3742250677250MODULEIIMPTRT.pptx
3742250677250MODULEIIMPTRT.pptx3742250677250MODULEIIMPTRT.pptx
3742250677250MODULEIIMPTRT.pptx
 
Project
ProjectProject
Project
 
MESH NODAL DC.pptx
MESH NODAL DC.pptxMESH NODAL DC.pptx
MESH NODAL DC.pptx
 
Circuit laws & network theorems
Circuit laws  & network theoremsCircuit laws  & network theorems
Circuit laws & network theorems
 
Network theorems for electrical engineering
Network theorems for electrical engineeringNetwork theorems for electrical engineering
Network theorems for electrical engineering
 
Chapter 2
Chapter  2Chapter  2
Chapter 2
 
Chapter 2
Chapter  2Chapter  2
Chapter 2
 
Nodal_and_Mesh_analysis
Nodal_and_Mesh_analysisNodal_and_Mesh_analysis
Nodal_and_Mesh_analysis
 
BEE301 - circuit theory - NT.pptx
BEE301 - circuit theory - NT.pptxBEE301 - circuit theory - NT.pptx
BEE301 - circuit theory - NT.pptx
 
NA-Duality& Dual Networks.pptx
NA-Duality& Dual Networks.pptxNA-Duality& Dual Networks.pptx
NA-Duality& Dual Networks.pptx
 
Electrical and Electronics Engineering
Electrical and Electronics EngineeringElectrical and Electronics Engineering
Electrical and Electronics Engineering
 
L 05(gdr)(et) ((ee)nptel)
L 05(gdr)(et) ((ee)nptel)L 05(gdr)(et) ((ee)nptel)
L 05(gdr)(et) ((ee)nptel)
 
Bai thi nghiem_linear_circuit_cttt
Bai thi nghiem_linear_circuit_ctttBai thi nghiem_linear_circuit_cttt
Bai thi nghiem_linear_circuit_cttt
 

More from ZulqarnainEngineerin (6)

Capacitors and inductors linear circuit analysis
Capacitors and inductors linear circuit analysisCapacitors and inductors linear circuit analysis
Capacitors and inductors linear circuit analysis
 
First order circuits linear circuit analysis
First order circuits linear circuit analysisFirst order circuits linear circuit analysis
First order circuits linear circuit analysis
 
Second order circuits linear circuit analysis
Second order circuits linear circuit analysisSecond order circuits linear circuit analysis
Second order circuits linear circuit analysis
 
Circuit theorems linear circuit analysis
Circuit theorems linear circuit analysisCircuit theorems linear circuit analysis
Circuit theorems linear circuit analysis
 
Basic laws linear circuit analysis
Basic laws linear circuit analysisBasic laws linear circuit analysis
Basic laws linear circuit analysis
 
Basic concepts linear circuit analysis
Basic concepts linear circuit analysisBasic concepts linear circuit analysis
Basic concepts linear circuit analysis
 

Recently uploaded

VIP Call Girls Ankleshwar 7001035870 Whatsapp Number, 24/07 Booking
VIP Call Girls Ankleshwar 7001035870 Whatsapp Number, 24/07 BookingVIP Call Girls Ankleshwar 7001035870 Whatsapp Number, 24/07 Booking
VIP Call Girls Ankleshwar 7001035870 Whatsapp Number, 24/07 Booking
dharasingh5698
 
Call Girls in Ramesh Nagar Delhi 💯 Call Us 🔝9953056974 🔝 Escort Service
Call Girls in Ramesh Nagar Delhi 💯 Call Us 🔝9953056974 🔝 Escort ServiceCall Girls in Ramesh Nagar Delhi 💯 Call Us 🔝9953056974 🔝 Escort Service
Call Girls in Ramesh Nagar Delhi 💯 Call Us 🔝9953056974 🔝 Escort Service
9953056974 Low Rate Call Girls In Saket, Delhi NCR
 
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
ssuser89054b
 
Integrated Test Rig For HTFE-25 - Neometrix
Integrated Test Rig For HTFE-25 - NeometrixIntegrated Test Rig For HTFE-25 - Neometrix
Integrated Test Rig For HTFE-25 - Neometrix
Neometrix_Engineering_Pvt_Ltd
 
Call Now ≽ 9953056974 ≼🔝 Call Girls In New Ashok Nagar ≼🔝 Delhi door step de...
Call Now ≽ 9953056974 ≼🔝 Call Girls In New Ashok Nagar  ≼🔝 Delhi door step de...Call Now ≽ 9953056974 ≼🔝 Call Girls In New Ashok Nagar  ≼🔝 Delhi door step de...
Call Now ≽ 9953056974 ≼🔝 Call Girls In New Ashok Nagar ≼🔝 Delhi door step de...
9953056974 Low Rate Call Girls In Saket, Delhi NCR
 
FULL ENJOY Call Girls In Mahipalpur Delhi Contact Us 8377877756
FULL ENJOY Call Girls In Mahipalpur Delhi Contact Us 8377877756FULL ENJOY Call Girls In Mahipalpur Delhi Contact Us 8377877756
FULL ENJOY Call Girls In Mahipalpur Delhi Contact Us 8377877756
dollysharma2066
 

Recently uploaded (20)

KubeKraft presentation @CloudNativeHooghly
KubeKraft presentation @CloudNativeHooghlyKubeKraft presentation @CloudNativeHooghly
KubeKraft presentation @CloudNativeHooghly
 
chapter 5.pptx: drainage and irrigation engineering
chapter 5.pptx: drainage and irrigation engineeringchapter 5.pptx: drainage and irrigation engineering
chapter 5.pptx: drainage and irrigation engineering
 
VIP Call Girls Ankleshwar 7001035870 Whatsapp Number, 24/07 Booking
VIP Call Girls Ankleshwar 7001035870 Whatsapp Number, 24/07 BookingVIP Call Girls Ankleshwar 7001035870 Whatsapp Number, 24/07 Booking
VIP Call Girls Ankleshwar 7001035870 Whatsapp Number, 24/07 Booking
 
A Study of Urban Area Plan for Pabna Municipality
A Study of Urban Area Plan for Pabna MunicipalityA Study of Urban Area Plan for Pabna Municipality
A Study of Urban Area Plan for Pabna Municipality
 
FEA Based Level 3 Assessment of Deformed Tanks with Fluid Induced Loads
FEA Based Level 3 Assessment of Deformed Tanks with Fluid Induced LoadsFEA Based Level 3 Assessment of Deformed Tanks with Fluid Induced Loads
FEA Based Level 3 Assessment of Deformed Tanks with Fluid Induced Loads
 
2016EF22_0 solar project report rooftop projects
2016EF22_0 solar project report rooftop projects2016EF22_0 solar project report rooftop projects
2016EF22_0 solar project report rooftop projects
 
Generative AI or GenAI technology based PPT
Generative AI or GenAI technology based PPTGenerative AI or GenAI technology based PPT
Generative AI or GenAI technology based PPT
 
Thermal Engineering-R & A / C - unit - V
Thermal Engineering-R & A / C - unit - VThermal Engineering-R & A / C - unit - V
Thermal Engineering-R & A / C - unit - V
 
Call Girls in Ramesh Nagar Delhi 💯 Call Us 🔝9953056974 🔝 Escort Service
Call Girls in Ramesh Nagar Delhi 💯 Call Us 🔝9953056974 🔝 Escort ServiceCall Girls in Ramesh Nagar Delhi 💯 Call Us 🔝9953056974 🔝 Escort Service
Call Girls in Ramesh Nagar Delhi 💯 Call Us 🔝9953056974 🔝 Escort Service
 
Unleashing the Power of the SORA AI lastest leap
Unleashing the Power of the SORA AI lastest leapUnleashing the Power of the SORA AI lastest leap
Unleashing the Power of the SORA AI lastest leap
 
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
 
Integrated Test Rig For HTFE-25 - Neometrix
Integrated Test Rig For HTFE-25 - NeometrixIntegrated Test Rig For HTFE-25 - Neometrix
Integrated Test Rig For HTFE-25 - Neometrix
 
DC MACHINE-Motoring and generation, Armature circuit equation
DC MACHINE-Motoring and generation, Armature circuit equationDC MACHINE-Motoring and generation, Armature circuit equation
DC MACHINE-Motoring and generation, Armature circuit equation
 
Thermal Engineering Unit - I & II . ppt
Thermal Engineering  Unit - I & II . pptThermal Engineering  Unit - I & II . ppt
Thermal Engineering Unit - I & II . ppt
 
University management System project report..pdf
University management System project report..pdfUniversity management System project report..pdf
University management System project report..pdf
 
Navigating Complexity: The Role of Trusted Partners and VIAS3D in Dassault Sy...
Navigating Complexity: The Role of Trusted Partners and VIAS3D in Dassault Sy...Navigating Complexity: The Role of Trusted Partners and VIAS3D in Dassault Sy...
Navigating Complexity: The Role of Trusted Partners and VIAS3D in Dassault Sy...
 
Call Now ≽ 9953056974 ≼🔝 Call Girls In New Ashok Nagar ≼🔝 Delhi door step de...
Call Now ≽ 9953056974 ≼🔝 Call Girls In New Ashok Nagar  ≼🔝 Delhi door step de...Call Now ≽ 9953056974 ≼🔝 Call Girls In New Ashok Nagar  ≼🔝 Delhi door step de...
Call Now ≽ 9953056974 ≼🔝 Call Girls In New Ashok Nagar ≼🔝 Delhi door step de...
 
data_management_and _data_science_cheat_sheet.pdf
data_management_and _data_science_cheat_sheet.pdfdata_management_and _data_science_cheat_sheet.pdf
data_management_and _data_science_cheat_sheet.pdf
 
FULL ENJOY Call Girls In Mahipalpur Delhi Contact Us 8377877756
FULL ENJOY Call Girls In Mahipalpur Delhi Contact Us 8377877756FULL ENJOY Call Girls In Mahipalpur Delhi Contact Us 8377877756
FULL ENJOY Call Girls In Mahipalpur Delhi Contact Us 8377877756
 
22-prompt engineering noted slide shown.pdf
22-prompt engineering noted slide shown.pdf22-prompt engineering noted slide shown.pdf
22-prompt engineering noted slide shown.pdf
 

Methods of analysis linear circuit analysis

  • 1. Chapter-3: Methods of analysis 3.1: Introduction • Having understood the fundamental laws of circuit theory (Ohm’s and Kirchhoff’s laws), we are now prepared to apply these laws to develop two powerful techniques for circuit analysis i.e. • Nodal analysis, which is based on a systematic application of Kirchhoff’s current law (KCL), and • Mesh analysis, which is based on a systematic application of Kirchhoff’s voltage law (KVL).
  • 2. 3.2: Nodal Analysis • Nodal analysis provides a general procedure for analyzing circuits using node voltages as the circuit variables. • Choosing node voltages as circuit variables is convenient and reduces the number of equations that must solve simultaneously. • In Nodal Analysis, node voltages are defined with respect to some common reference point in the circuit. • Generally one of the nodes in a network is selected as reference node and all other node voltages are defined with respect to this node.
  • 3. • Reference node is normally selected such that most of the circuit branches terminate/originate there. • Reference node is always assumed to be at zero or ground potential. • All unknown node voltages are represented by positive variables with respect to ground and even if some of these voltages are in fact negative, it will be revealed in subsequent computations. • KCL equations are drawn only for non-reference nodes of network. • While writing the KCL equations, we opt to assume that node being considered is at high potential i.e. entering currents are negative.
  • 4. • A reference node is indicated by any of the three symbols shown in Fig. 3.1. • We will always use symbol of Fig. 3.1(b). • Having selected a reference node, next assign positive voltage variables to non- reference nodes w.r.t reference node. • Let’s tryout on circuit with current sources. • Consider the circuit of Fig. 3.2(a), where node 0 is the reference node while nodes 1 & 2 are assigned voltage variables v1 & v2 respectively. • We now apply KCL to each non-reference node of the circuit.
  • 5. • Where currents directions are NOT provided, then always assume that current flows away from the node being considered. • This is reflected in Fig. 3.2(b), where i1, i2 & i3 are added as the currents through resistors R1, R2 & R3 respectively to prepare the circuit for application of KCL. • At node 1: (3.1). • At node 2: (3.2). • Next apply Ohm’s law to express currents i1, i2 and i3 in terms of node voltages i.e. •
  • 6. • (3.4). • • Substituting current values of Eq. (3.4) in Eqs. (3.1) & (3.2) results in, • (3.5). • (3.6). • In terms of the conductance's, Eqs. (3.5) and (3.6) become • (3.7). • (3.8). • The third step in nodal analysis is to solve for the node voltages.
  • 7. • Set of Eqs. (3.5) & (3.6) or (3.7) & (3.8) can be solved for the node voltages v1 & v2 using any standard method, such as the substitution method, the elimination method, Cramer’s rule, or matrix inversion. • Simultaneous equations may also be solved using calculators or with software packages such as MATLAB, Mathcad, Maple & Quattro Pro • In this course we will employ elimination method & Cramer’s rule. • Example 3.1: Calculate the node voltages in the circuit of Fig. 3.3(a) shown here. • Consider Fig. 3.3(b), where the circuit of Fig. 3.3(a) has been prepared for nodal analysis.
  • 8. • Notice how the currents are selected for the application of KCL. • Except for the branches with current sources, the labeling of the currents is arbitrary but consistent with current flow. • Reference node is selected and node voltages v1 & v2 are allocated. • At node 1; applying KCL and Ohm’s law gives • • Multiplying each term by 4 & collecting similar terms together yield,
  • 9. • (3.1.1). • At node 2: • Multiplying each term by 12 & collecting similar terms together yield, • (3.1.2). • Simultaneous Eqs. (3.1.1 & 3.1.2) will be solved 1st using elimination method followed by Cramer’s rule to discover variables v1 & v2. • Elimination Technique; addition of Eqs. (3.1.1) & (3.1.2) eliminate v3. • This results in • Placing v2 value in one of Eqs. (3.1.1) & (3.1.2) puts v1 = 13.333 V.
  • 10. • To use Cramer’s rule, cast the simultaneous equations in matrix form. • Eqs. (3.1.1) & (3.1.2) in matrix form would appear as, • (3.1.3). • The determinant of the matrix is • We now obtain v1 & v2 as • • • Class Work: Compute all the currents in circuit of Fig. 3.3(b)?
  • 11. • • • The fact that i2 is negative shows that the current flows in the direction opposite to the one assumed. • Home Work: Practice P_Problem 3.1, Problems 3.2, 3.3 and 3.4. • Example 3.2: Determine node voltages in circuit of Fig. 3.5(a). • Circuit in this example has three non- reference nodes & voltages assigned to them are shown in Fig. 3.5(b).
  • 12. • (3.2.1). • (3.2.2). • (3.2.3). • At node 1: • At node 2: • At node 3:  • Multiplying by 4, 8 & 8 respectively, collecting the similar terms together and rearranging transforms three node equations into:
  • 13. • Substitution Method: involves writing one variable in terms of other. • Adding Eqs. (3.2.1) & (3.2.3) eliminates variable v3 yielding, • 5v1 – 5v2 = 12 & once rearranged, v1 – v2 = 12/5 = 2.4 (3.2.4). • Adding Eqs. (3.2.2) & (3.2.3) also eliminates variable v3, yielding, • – 2v1 + 4v2 = 0, which can also be expressed as v1 = 2v2. • Substituting this value of v1 = 2v2 into Eq. (3.2.4) yields, • 2v2 – v2 = 2.4, which leads to v2 = 2.4 V. • Putting this obtained value of v2 = 2.4 in v1 = 2v2 yield v1 = 4.8 V. • Applying known values of v1 & v2 in Eq. (3.2.3) yield? v3 = – 2.4 V
  • 14. • Elimination Technique: 1st get set of equations with 2 alike variables. • Adding Eqs. (3.2.1) & (3.2.3), yield first equation with two variables, • 5v1 – 5v2 = 12 (3.2.4). • Addition of Eqs. (3.2.2) & (3.2.3) provide 2nd two variable equation, • – 2v1 + 4v2 = 0 (3.2.5). • 2(Eq. 3.2.4) = 10v1 – 10v2 = 24 AND 5(Eq. 3.2.5) = – 10v1 + 20v2 = 0. • Adding them yield 10 v2 = 24 or v2 = 2.4 V. • Putting this value in any of above Eqs yield v1 = 4.8 V. • Substituting known value of v1 & v2 into Eq. (3.2.3) yields, • v3 = 3v2 – 2v1 = (3 x 2.4) – (2 x 4.8) = 7.2 – 9.6 = – 2.4 V.
  • 15. • Cramer’s Rule Solution: put Eqs. (3.2.1) to (3.2.3) in matrix form. • (3.2.6). • From this, we obtain • Where , 1, 2 & 3 are the determinants calculated by following any one of the methods give in Appendix A. of the book. • We opt to repeat 1st two rows & multiply terms diagonally as follows; •
  • 16. • Thus ; • Similarly; • While; • And finally;
  • 17. • Thus, • Note: node voltages values remain unaffected by method employed. • Class Work: compute currents i1, i2, i3, ix & dependent source output? • i1 = (v1 – v3)  4  = {4.8 – (– 2.4)]  4  = 7.2  4  = 1.8 A. • i2 = (v2 – v3)  8  = {2.4 – (– 2.4)]  8  = 4.8  8  = 0.6 A. • i3 = v2  4  = (2.4)  4  = 0.6 A. • ix = (v1 – v2)  2  = (4.8 – 2.4)  2  = 2.4  2  = 1.2 A. • Out put of dependent current source = 2ix = 2(1.2) = 2.4 A. • Home Work: P_Problem 3.2, Problems 3.7 & 3.10.
  • 18. 3.3: Nodal Analysis with Voltage Sources • Presence of Voltage sources (independent/dependent) affect the way nodal analysis is performed in circuits. • KCL is never applied to the node with a voltage source attached to it. • Voltage source can appear in two possible configurations in a circuit as shown in the circuit of Fig. 3.7. • Voltage sources may appear either in between two non-reference or reference & non-reference nodes.
  • 19. • CASE 1: When a voltage source (dependent or independent) is connected between the reference & non-reference nodes, just set the voltage at non-reference node equal to voltage of the voltage source. • For example, in Fig. 3.7, v1 = 10 V (3.10). • CASE 2: When the voltage source (dependent or independent) is connected between two non-reference nodes, the two non-reference nodes are combined into a super node; which change the technique of node analysis and named as super node analysis method. • In Fig. 3.7, nodes 2 and 3 form a super node.
  • 20. • A super node is formed by enclosing a (dependent or independent) voltage source connected between two non-reference nodes and any elements connected in parallel with it. • We could have more than two nodes forming a single super node. • All non-reference nodes, without any voltage source attached to them, are analyzed taking same steps as in circuits with only current sources. • The super nodes are however treated differently. Why? • Because an essential component of nodal analysis is applying KCL, which requires knowing the current through each element.
  • 21. • There is no way knowing current through voltage source in advance. • Yet, KCL must be satisfied at a super node as it is a closed surface • Hence, KCL at the super node of Fig. 3.7 yield, • Expressed in node voltages • To create 2nd equation (N – 1 = 2) apply KVL to loop with super node as shown in redrawn circuit of Fig. 3.8. • Going around the loop in clockwise • • Once rearranged
  • 22. • Called constraint equation, it can too be drawn directly by inspection. • Difference of potential that exits between nodes v2 & v3 can’t exceed source voltage and is restricted by constraint equation i.e. v2 – v3 = 5. • Note that a super node has no voltage of its own. • Voltage source inside the super node provides a constraint equation to complete N – 1 equations needed to solve the circuit by node analysis. • Super node analysis makes use of both KCL and KVL. • Example 3.3: Solve the circuit shown in Fig. 3.9 by node analysis? • 2 V source amid nodes 1, 2 & parallel 10  resistor form super node.
  • 23. • Applying KCL to the super node, as shown in Fig. 3.10(a), gives • Substituting i1 & i2 in terms of the node voltages OR • OR (3.3.1). • Constraint Eq. applying direct inspection will be v2 – v1 = 2 V.
  • 24. • KVL to loop of Fig. 3.10(b) yield same constraint equation i.e. • (3.3.2). • From Eqs. (3.3.1) and (3.3.2), • OR • Class Work: find the value of v2? • Note that the 10  resistor does not make any difference because it is connected in parallel across the super node and shares same voltage • Home Work: P_Problem 3.3, Problems 3.11, 3.14 and 3.18. • Example 3.4: Applying node analysis solve the circuit of Fig. 3.12.
  • 25. • Nodes 1 & 2 form a super node; so do nodes 3 & 4. • Applying KCL to the super nodes in Fig. 3.13(a) reveal,
  • 26. • At super node 1-2, • Expressing this in terms of the node voltages, • multiplying by 6 and rearranged, • (3.4.1). • At super node 3-4, • Expressed in node voltages, • Multiplied by 12 & rearranged (3.4.2). • By direct inspection constraint equations at the super node 1-2 is • v1 – v2 = 20 (3.4.3).
  • 27. • Super node 3-4 yield constraint equation v3 – v4 = 3vx, but vx = v1 – v4. • Hence, 3v1 – v3 – 2v4 = 0 (3.4.4). • These constraint equations can also be computed, by applying KVL to branches involving the voltage sources, as shown in Fig. 3.13(b). • Interested students can go through the given procedure in the book. • For four unknown node voltage variables four simultaneous equations (N – 1 = 5 – 1 = 4) are needed, rendering Eq. (3.4.5) redundant. • Fifth unneeded equation is computed applying KVL to loop 3 i.e. • vx – 3vx + 6i3 – 20 = 0  – 2v1 – v2 + v3 + 2v4 = 20 (3.4.5).
  • 28. • Solution by Variable Elimination Technique: • We need only four equation i.e. 3.4.1 to 3.4.4 to solve the circuit. • Substituting value of variable v2 from Eq. (3.4.3) i.e. v2 = v1 – 20 into Eq. (3.4.1) i.e. 5v1 + v2 – v3 – 2v4 = 60 eliminates variable v2 yielding • 6v1 – v3 – 2v4 = 80 (3.4.6). • Subtracting (Eq. 3.4.4) i.e. 3v1 – v3 – 2v4 = 0 from Eq. (3.4.6) above leaves behind – 3v1 = – 80 • Solving – 3v1 = – 80 give node voltage value v1 = 80  3 = 26.667 V. • Putting this value of v1 in Eq. 3.4.3 v2 = v1 – 20 reveal v2 = 6.667 V.
  • 29. • Replacing variable v2 from Eq. (3.4.3) i.e. v2 = v1 – 20 in Eq. (3.4.2) i.e. 4v1 + 2v2 – 5v3 – 16v4 = 0 results in equation, • 6v1 – 5v3 – 16v4 = 40 (3.4.7). • Putting v1 & v2 value in the Eq. (3.4.1) i.e. 5v1 + v2 – v3 – 2v4 = 60 and Eq. (3.4.2) i.e. 4 v1 + 2 v2 – 5v3 – 16v4 = 0 yield set of equations; • – v3 – 2v4 = – 80 and – 5v3 – 16v4 = – 120 • Solving above set of equations eliminate v4 and reveal v3 = 173.33 V. • Replacing computed values v1 & v3 in Eq. (3.4.4) 3v1 – v3 – 2v4 = 0 yield v4 = – 46.67 V. What does the negative value suggest?
  • 30. • Cramer’s Rule Solution • Casting Eqs. (3.4.4) 3v1 – v3 – 2v4 = 0, (3.4.6) 6v1 – v3 – 2v4 = 80 and (3.4.7) 6v1 – 5v3 – 16v4 = 40 in matrix form results in, • • Class Work: Using Cramer’s rule determine the needed determinants? • •
  • 31. • Class Work: Find all node voltage, voltage vx and branch currents? • and • and • Placing v1 & v4 value in Eq. for voltage vx; vx = v1 – v4 = 73.337 V. • Current through 1  resistor = v4  1 = – 46.67  1 = – 46.67 A. • Current through 2  resistor = v1  2 = 26.67  2 = 13.335 A. • Current through 3  resistor = vx  3 = 73.33  3 = 24.443 A. • Current through 4  resistor = v3  4 = 173.33  4 = 43.3325 A. • Current through 6  resistor = (v3 – v2)  6 = 166.663  6 = 27.777A. • Home Work: P_Problem 3.4, problems 3.32 and 3.36.
  • 32. 3.4: Mesh Analysis • What is mesh and what is the difference between mesh and loop? • Unlike node analysis that used node voltages as circuit variables, mesh analysis uses mesh currents as the circuit variables. • Nodal analysis applies KCL to find unknown voltages in a given circuit, while mesh analysis applies KVL to find unknown currents. • Mesh analysis is only applicable to a planar circuits. What is planar circuit? • A planar circuit is one that can be drawn in a plane with no branches crossing one another; otherwise it is nonplanar.
  • 33. • A circuit may have crossing branches and still be planar if it can be redrawn such that it has no crossing branches. • For example, circuit in Fig. 3.15(a) has two crossing branches, but it is planar, as redrawing it removes crossing branches, see Fig. 3.15(b). • How about the circuit of Fig. 3.16, is it planar or nonplanar? (nonplanar) • Nonplanar circuits can conveniently be handled using nodal analysis.
  • 34. • Class Work: Identify the loop and mesh in circuit of Fig. 3.17? • Paths abefa & bcdeb are meshes, but abcdefa is a not a mesh, it is a loop. • Applying KVL to any mesh/loop provide KVL/mesh/loop equation, where all load voltages are stated as Ohm’s law statements i.e. v = iR. • To illustrate the mesh analysis steps involved consider circuit above. • The first step requires that positive mesh current variables i1 and i2 are assigned to meshes 1 and 2 respectively.
  • 35. • Although a mesh current may be assigned an arbitrary direction, it is conventional to assume that each mesh current flows clockwise. • As the second step, we apply KVL to each mesh. • At mesh 1: , • Load voltages stated as product of mesh current & branch resistance. • Simplified, (3.13). • For mesh 2: , which once simplified, • (3.14). • Notice that coefficient of mesh current in neighborhood is negative.
  • 36. • The third step is to solve for the mesh currents by using any technique for solving the simultaneous equations. • Applying Cramer’s rule, requires putting Eqs. (3.13) and (3.14) in matrix form as follows: • (3.3). • According to Eq. (2.12), if a circuit analyzed has n nodes, b branches, and l independent loops or meshes, then l = b – n + 1. • Hence, l independent simultaneous equations are required to solve the circuit using mesh analysis. • As thumb rule each branch must belong to at least one mesh current.
  • 37. • Notice that the branch currents are different from the mesh currents unless the mesh is isolated. • To distinguish between the two types of currents, we use i for a mesh current and I for a branch current. • Example 3.5: For the circuit in Fig. 3.18, find the branch currents I1, I2 and I3 using mesh analysis. • For mesh 1: applying the KVL; • • Or (3.5.1).
  • 38. • For mesh 2: •  (3.5.2). • To solve by substitution technique, subtracting Eq. (3.5.1) from the product {3 x Eq. (3.5.2)}, eliminates v1, leaving behind, • • Substituting this in Eq. (3.5.2): • Hence; • To use Cramer’s rule, cast Eqs. (3.5.1) and (3.5.2) in matrix form i.e. •
  • 39. • Class Work: Find the needed determinants? • , and • Hence; • And as before: • Home Work: P_Problem 3.5, Problems 3.35 and 3.36 • Example: 3.6: Find current IO in circuit of Fig. 3.20 using mesh analysis? • Applying KVL to the three meshes reveal three simultaneous equations.
  • 40. • For mesh 1: •  (3.6.1). • For mesh 2: •  (3.6.2). • For mesh 3: • But at node A, IO = i1 – i2 therefore substituting this value above, • •  (3.6.3). • In matrix form, Eqs. (3.6.1) to (3.6.3) become,
  • 41. • • Class Work: Find the needed determinants? • •
  • 42. • • • Calculating the mesh currents is simply; • and,
  • 43. • hence, branch current IO = i1 – i2 = 1.5 A. • Class Work: Find the voltage drop across 4, 10, 12 & 24  resistors? • Also determine the out put of dependent voltage source? • v4 = (i3 – i2) x 4 = (1.5 – 0.75) x 4 = 0.75 x 4 = 3 V. • v10 = Io x 10 = 1.5 x 10 = 15 V. • v12 = (i1 – i3) x 12 = (2.25 – 1.5) x 12 = 0.75 x 12 =9 V. • v24 = i2 x 24 = 0.75 x 24 = 18 V. • Dependent source output = 4Io = 4 x 1.5 = 6 V. • Home Work: P_Problem 3.6, Problems 342 and 3.46.
  • 44. 3.5: Mesh Analysis with Current Sources • Applying mesh analysis to circuits containing current sources (dependent or independent) may present two possible cases. • CASE 1: When a current source only falls in path of specific mesh. • For example; consider the circuit of Fig. 3.22. • Current source (5 A) falls exclusively in path of mesh current i2. • This implies that value of mesh current i2 can neither be more nor less than the current source output.
  • 45. • Since both currents are in opposite direction, therefore, i2 = – 5 A. • This simplifies the mesh analysis as only mesh equation needs to solved i.e. • Home Work; Problem 3.51. • CASE 2: Current source is shared by two meshes, as in Fig. 3.23.
  • 46. • To solve such circuit requires creation of super mesh. • A super mesh is necessitated when two meshes have a (dependent or independent) current source in common as shown in Fig 3.23(a). • To create a super mesh exclude the current source and any elements connected in series with it, as shown in Fig. 3.23(b). • As shown in Fig. 3.23(b), super mesh is created at the periphery of the two meshes that share current source and is treated differently. • If a circuit has two or more super meshes and if they intersect then, they can be combined to form a larger super mesh.
  • 47. • A super mesh must satisfy KVL like any other mesh. • For example, applying KVL to the super mesh in Fig. 3.23(b) returns, •  (3.18). • Now is it evident as to why a super mesh is treated differently? • That is: while applying KVL to super mesh, each voltage drop in path is treated product of the individual meshes either i1 or i2. • Applying KCL to node 0 in Fig. 3.23(a) gives 2nd mesh equation i.e. • (3.19). • Solving Eqs. (3.18) and (3.19), yield;
  • 48. • Note the following properties of a super mesh: 1. Current source inside super mesh provides constraint equation by applying KCL. (same can also be drawn directly as difference of mesh currents sharing current source must equal source current.) 2. Super mesh has no current of its own. 3. Super mesh analysis involves both KVL as well as KCL. • Example 3.7: Find currents i1 to i4 using mesh analysis in circuit shown in Fig. 3.24?
  • 49. • Note that meshes 1 & 2 form a super mesh since they have an independent current source in common. • Also, meshes 2 & 3 form another super mesh because they have a dependent current source in common. • Two super meshes intersect and form a larger super mesh as shown. • Applying KVL to the larger super mesh, • once simplified and divided by 2, • (3.7.1). • For the independent current source, applying KCL to node P yields;
  • 50. • (3.7.2). • For the dependent current source, applying KCL to node Q yields; • but • (3.7.3). • In mesh 4: simplified & divided by 2, • (3.7.4). • Class Work: Solve Eqs (3.7.1) to (3.7.4) employing substitution? • Substituting i1 = i2 – 5 and i2 = i3 – 3i4 from Eqs. 3.7.2 & 3.7.3 respectively into Eq 3.71 yield; i2 – 5 + 3i3 – 9i4 + 6i3 – 4i4 = 0.
  • 51. • Replacing i2 = i3 – 3i4 from Eq. 3.7.3 in this result transforms it into, • i3 – 3i4 – 5 + 3i3 – 9i4 + 6i3 – 4i4 = 0 and once simplified, • –16i4 + 10i3 = 5, which can be solved with 5i4 – 4i3 = – 5 (Eq. 3.7.4). • 5 (–16i4 + 10i3 =5) = –80i4 + 50i3 = 25 and • 16 (5i4 – 4i3 = – 5) = 80i4 – 64i3 = – 80. • Adding them together 14i3 = – 55 or i3 = 3.93 A. • Putting this value of i3 in Eq 3.7.4 reveal i4 = 2.143 A. • Following the same pattern reveals i1 = – 7.5 A and i2 = – 2.5 A. • Home Work: P_Problem 3.7, Problems 3.38, 3.44 and 3.45.
  • 52. 3.6: Nodal and Mesh Analyses by Inspection • When all current sources in a circuit are independent, we need not apply KCL to each node to produce nodal equations, as we did so far. • There is a shortcut approach based on mere inspection of a circuit. • Let’s re-examine the circuit of Fig. 3.26(a) that we solved in Sec 3.2. • Re-visit the nodal equations that were derived for this circuit, one of which casted in matrix form is reproduced below, • (3.21).
  • 53. • Observe that every diagonal term is the sum of the conductance's connected directly to node 1 or 2. • Where as the off-diagonal terms are the negatives of the conductance's connected between the nodes 1 & 2. • Also note that each term on the right hand side of Eq. (3.21) is the algebraic sum of independent current sources connected to the node. • In general, if a circuit with independent current sources has N non- reference nodes, then N-node voltage equations can be written in terms of the conductance's as shown in the conductance matrix below.
  • 54. • (3.22). • In the shown conductance matrix, • Gkk = Sum of the conductance's connected to node k • Gkj = Gjk = Negative of the sum of the conductance's directly connecting nodes k and j, k ≠ j. • vk = Unknown voltage at node k • ik = Sum of all independent current sources directly connected to node k, with currents entering the node treated as positive
  • 55. • Equation (3.22) can easily be solved to find unknown node voltages. • We can also represent Eq.322 simply as Gv = i (3.23). • G is conductance matrix; v is output vector; and i is input vector. • Keep in mind that this is valid for circuits with only independent current sources and linear resistors. • Example 3.8: Write the node voltage matrix equations for the circuit of Fig. 3.27 by inspection.
  • 56. • Four non-reference nodes require four node equations to solve it. • This implies that the size of the conductance matrix G, is 4 x 4. • Computing the diagonal terms of conductance matrix G, in Siemens. • • • Calculating off diagonal terms of conductance matrix G, in Siemens. • • •
  • 57. • • The terms of the input current vector i, in amperes are: • • We are now ready to write the needed node voltage equations i.e. • • Node voltages v1, v2, v3 and v4 can now be computed. How? • Home Work; Find the node voltages in your own time • Home Work: P_Problem 3.8 plus Problems 3.67, 3.69 and 3.70.
  • 58. Mesh Analyses by Inspection • It is also practical to obtain mesh-current equations by inspection when a linear resistive circuit has only independent voltage sources. • Consider circuit of Fig. 3.26(b) with two meshes solved in Sec 3.4. • Mesh equations derived are reproduced in matrix form as Eq. 3.24. • (3.24). • Notice that each of the diagonal terms is the sum of the resistances in path of mesh 1 or 2.
  • 59. • Whereas each of the off diagonal terms is the negative of the resistance common to meshes 1 & 2. • Each term on right hand side of Eq. (3.24) is the algebraic sum taken clockwise of all independent voltage sources in the related mesh. • In general, if the circuit has N meshes, the N-mesh current equations can be expressed in terms of the resistances as; • (3.25).
  • 60. • Where, Rkk = Sum of the resistances in mesh k. • Rkj = Rjk = Negative of the sum of the resistances directly in common with meshes k and j, k ≠ j. • ik = Unknown mesh current for mesh k in clockwise direction. • vk = Sum taken clockwise of all independent voltage sources in mesh k, with voltage rise treated as positive. • Eq. (3.25) can easily be solved to obtain the unknown mesh currents. • Eq. 3.25 can also be simplified as; Ri = v (3.26). • R is here resistance matrix; i is output vector; and v is input vector.
  • 61. • Lt’s implement this method of writing mesh equations in a circuit. • Example 3.9: By inspection, write the mesh-current equations for the circuit in Fig. 3.29. • Given circuit has five meshes, so the resistance matrix must be 5 x 5. • Diagonal terms, in ohms, are: • • • •
  • 62. • • The off diagonal terms again in ohms are; • • • • • • The input voltage vector v has the following terms in volts: •
  • 63. • • Thus, the mesh current equations are: • • It can now be solved to obtain mesh current values. • Home Work: compute the mesh currents i1, i2, i3, i4 and i5. also solve P_Problem 3.9, Problems 3.71, 3.72, 3.73 and 3.74.
  • 64. 3.7: Nodal Versus Mesh Analysis • Both nodal and mesh analyses provide an systematic way of analyzing a complex network. • Given a network to be analyzed, how do we know which method is better or more efficient? • The choice of the better method is dictated by two factors • The first factor is the nature of the particular network. • Networks that contain many series-connected elements, voltage sources, or super meshes are more suitable for mesh analysis.
  • 65. • Whereas networks with parallel-connected elements, current sources, or super nodes are more suitable for nodal analysis. • Also, a circuit with fewer nodes than meshes is better analyzed using nodal analysis, while a circuit with fewer meshes than nodes is better analyzed using mesh analysis. • Key is to select a method that results in smaller number of equations • The second factor is the information required, if node voltages are required, it may be expedient to apply nodal analysis and if currents (branch/mesh) are required, it may be better to use mesh analysis.
  • 66. • It helps to be familiar with both methods, for at least two reasons. • First, it helps to check the results from by other method, if possible. • Second, since each method has its limitations, only one method may be suitable only for a particular problem e.g. mesh analysis is the only method to use in analyzing transistor circuits. • But mesh analysis cannot easily be used to solve an op amp because there is no direct way to obtain the voltage across the op amp itself. • For nonplanar networks, nodal analysis is the only option, because mesh analysis only applies to planar networks.
  • 67. • It is also relatively easy to program computational devices for analyzing a circuit employing nodal analysis than mesh analysis. • This allows to analyze complicated circuits that defy hand calculation. • Computer software package based nodal analysis is left as self study. • Self Study: Go through Sec 3.10, that gives summary of what all we have studied in this chapter. • Home Work: Review questions 3.1 to 3.10. • Also solve all the problems given at the end of chapter that are more or less similar to the one we solved in this chapter