1. VISHNU PRASAD K V
vish.vish111@gmail.com
Mob:+91 9605673713
Career Objective:
To obtain a responsible, challenging, and awarding position in an organization with an
established track record where my skills, abilities and technical knowledge can be utilized for the
growth of organization and to serve my nation.
Educational Qualifications
Course Institute Board /
University
Grade Year
M.TECH*
Electronic Design
And Technology
National Institute of
Technology, Calicut
NIT Calicut 8.69
(SGPA-till
3rd Semester)
Pursuing
[2014-2016]
B.Tech
College of
Engineering Cherthala
CUSAT 83.46% 2013
Higher Secondary Holy Family HSS
Cherthala
Kerala State
board
94.5% 2009
SSLC/10th
Holy Family HSS
Cherthala
Kerala state
Board
95% 2007
Experience
Company Designation Duration
Broadcom Communication
Technologies Pvt Ltd
Graduate Intern/Cable Modem
IC Design And Verification
June 2015 – May 2016
CPU VERIFICATION:
 Currently involved in a processor core development team where it follows ARM-V8
based superscalar/out-of-order architecture.
 Key role is to verify the functional modules like reordering buffer, reservation station,
integer execution unit, instruction issue part in pipeline stages.
 Debugging both in the system level and module level (SLTB&MLTB) by running weakly
and daily regressions.
 Developed random test cases for instruction Mapper (MP), Instruction Scheduler (IS) and
Execute (EX) clusters.
VAISHNAVAM
KANDATHILPARAMBIL
PATTANAKKAD P .O.
ALAPPUZHA, KERALA
PIN: 688531

2.  Gone through a depth understanding of processor micro-architectural concepts such as
branch-prediction, out-of-order execution, instruction graduation, flow of integer and
vector instructions, caches coherency etc. Generated directed test cases to verify these
fundamentals.
 Contributed and handled the AVS/RAVEN test debugging to get ARM architecture
license.
Technical Skills
Languages: VHDL, C, C++, Perl, Assembly Programming (8085, 8086, ARM), Verilog, System
Verilog
EDA Tools: Xilinx ISE, Verdi, Questasim
Circuit/Device Simulators: SymicaDE
Operating systems: UNIX, Windows
Course Work in Progress: System verilog (done VIP of AXI protocol), UVM
Academic Works:
 M.Tech Mini Projects:
1)RFID based lab attendance system and computer allocation
usingPsoC-4.
2) GSM based Queue Management system using Intel Galileo.
3) SRAM Cell Transistor Sizing Analysis Using Symica Tool.
 M.Tech Seminar: A Custom Mpsoc Architecture With Integrated Power Management
For Real-Time Neural Signal Decoding.
 B.Tech Major Project: Spot accident informing and life saving system using pic
16F877A, gsm, gps modem, zigbee.
 B.Tech Mini project: Bus detection system for blind using RFID including pic16F877A,
APR.
Personal Details:
Gender: Male Age & DOB: 23 years, 11/09/1991
Marital Status: Single Nationality: INDIAN
Languages Known: Malayalam, English, Hindi, Tamil and Konkani.
Achievements and Interests:
 Student’s representative of Association of Electronics and Communication Engineering
Students (AECES) in college.
 Got several prices in technical fests in various colleges for the events Robowar, Wave
cloning, Circuit debugging.
 Participated in university cricket tournament.
Declaration:
I, Vishnu Prasad K V hereby declare that the information provided is correct and true to the best
of my knowledge.
Place: CALICUT
Date: 29-02-2016