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LOW POWER VLSI DESIGN
EENG 561
PRESENTED BY
SRINIVAS V.D
(17304008)
UNIT-5
SPECIAL AND ADVANCED TECHNIQUES
SEMINAR ON
TOPIC: Pass transistor logic synthesis- asynchronous circuits
Pass Transistor Logic synthesis:
1. Basics of pass transistor logic
2. Boolean decision diagram and pass transistor logic
3. Pass transistor logic synthesis system
Asynchronous circuits
1. Asynchronous system basics
2. Prospects of asynchronous computation
CONTENTS
 Change in Technology and design
methodology
 Advancement with pass transistor logic and
asynchronous logic
 Narrow area applications
 lack of design & automation software that can exploit
the low power techniques
 lack of technical discourse
Dynamic Power Dissipation Eq.
P = C L v²f
1. Capacitance C is constant.
2. Voltage V is constant.
3. The capacitor is fully charged and discharg
 Try to reduce one or more variables from above equation
 In this chapter we disturbs voltage for designing
Pass transistor logic synthesis:
 Existing synthesis:-- limited logic cells,
 Boolean exp. can be realized with AOI--- mapped with
CMOS Nand & Nor
 Include multiplexor functions, majority functions,
exclusive-OR functions, etc.
 Pass transistor logic can implement certain complex
Boolean function efficiently.
 handcrafted full custom design.
 now synthesized rather than individually handcrafted to
increase design productivity
1.1. Basics of pass transistor logic:
 Pass transistor logic uses pass transistors to
compose Boolean logic functions.
 A pass transistor is a MOS device that
acts like a switch
 It reduces the count of transistors used to make
different logic gates, by eliminating redundant
transistors.
 we can use the complementary pass
transistor logic style in which both N
and P pass transistors are used forming
a transmission gate
 It passes strong input to the strong
output .
TRANSMISSION GATE:
Example: PTL contrast with CMOS
 Pass transistor circuit requires 8 transistors CMOS implémentation requiers 10 tran
 Pass Transistor Logic could lead to a better power, delay and area
implementation compared to the conventional static CMOS logic.
1.2. Boolean decision diagram and pass transistor logic
 An alternate method to represent a Boolean function.
 A BDD consists of nodes labeled by the input
variables of the Boolean function.
 To determine the output of the Boolean
function, we traverse the BDD from the top
down
 When we reach a circular node, we ask whether
the input variable of the node is at logic 0 or 1
 We traverse the left edge downwards if the
variable is logic 0; otherwise, we traverse the
right edge.
 When the traversal reaches the special nodes, the logic value of the
special node is the output of the function
 if both inputs A & B are at logic I, we follow the right links at both circle
nodes and reach a Logic 0.
 The storage requirement of a Truth Table is always exponential with
respect to the number of inputs. This obviously presents a problem in
handling the table in computer software.
 At the bottom of the diagram, we have two special square nodes
representing logic 0 and 1, respectively
 A Boolean Equation is not unique in the sense that many
different equations can represent the same Boolean function
 This canonical property is desirable for software
manipulation
 Boolean function can be readily constructed using recursive
Shannon's decomposition
EXAMPLE: BDD
1.3 Pass Transistor Logic Synthesis System
 compute arbitrary Boolean functions using direct mapping of BDDs to
multiplexor-based pass transistor logic
 it also opens the door for automated synthesis of pass transistor logic
from hardware description
language. Pass transistor logic is only scarcely used in some XOR or adder cells
because of the particular Boolean functions encountered
 The basic operation of the synthesis system is to express
Boolean logic in BDDs.
 The BDDs are then partitioned
 The partitioned BDDs are then mapped into pass transistor cells and a
post-mapping cleanup eliminates redundant circuits
 The cell library consists of cells built with pass
transistor circuits
shows two different Boolean functions implemented by the same pass
transistor cell.
 Using the proper logic synthesis algorithms, pass transistor logic achieves better
power and area efficiency
than the static CMOS logic.
Asynchronous circuits
 Computation is achieved by a series of events represented by signal
transition edges.
 Type of computation system without any global clock signal
 The speed of computation is determined by the signal propagation delay of the
asynchronous circuit
Asynchronous system basics
The arrows in the timing diagram show the cause and effect relationship of the
sequence of events
Example: An asynchronous
Processing Unit
Prospects of asynchronous computation
 Power elimination---- Remove global clock
 Delay—Circuit elements.
 Request & Ack----- Clocks for syn order of computation
 Delay Insensitive--- LP VLSI
 Supply Voltage--- Brings the throughput
 Complex control systems not desirable with the asynchronous circuits.
REFERENCES
[1] W. Athas, L. Svensson, J. Koller, N. Tzartzanis and E. Chou, "Low-Power
Digital Systems Based on Adiabatic-Switching Principles," IEEE
Transactions on VLSI Systems, vol. 2, no. 4, pp. 398-407, Dec. 1994.
[2] J. Denker, S. Avery, A. Dickinson, A. Kramer and T. Wik, "Adiabatic
Computing with the 2N-2N2D Logic Family," Proceedings of
International Workshop on Low Power Design, pp. 183-187, 1994.
[3] A. Kramer, J. Denker, B. Flower and J. Moroney, "Second Order Adiabatic
Computation with 2N-2P and 2N-2N2P Logic Circuits," Proceedings of
International Symposium on Low Power Design, pp. 191-196, 1995.
[4] T. Indermaur and M. Horowitz, "Evaluation of Charge Recovery Circuits
and Adiabatic Switching for Low Power CMOS Design," Digest of
Technical Papers, IEEE Symposium on Low Power Electronics, pp. 102-103,1994.
Low Power VLSI Desgin

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Low Power VLSI Desgin

  • 1. LOW POWER VLSI DESIGN EENG 561 PRESENTED BY SRINIVAS V.D (17304008)
  • 2. UNIT-5 SPECIAL AND ADVANCED TECHNIQUES SEMINAR ON TOPIC: Pass transistor logic synthesis- asynchronous circuits
  • 3. Pass Transistor Logic synthesis: 1. Basics of pass transistor logic 2. Boolean decision diagram and pass transistor logic 3. Pass transistor logic synthesis system Asynchronous circuits 1. Asynchronous system basics 2. Prospects of asynchronous computation CONTENTS
  • 4.  Change in Technology and design methodology  Advancement with pass transistor logic and asynchronous logic  Narrow area applications  lack of design & automation software that can exploit the low power techniques  lack of technical discourse
  • 5. Dynamic Power Dissipation Eq. P = C L v²f 1. Capacitance C is constant. 2. Voltage V is constant. 3. The capacitor is fully charged and discharg  Try to reduce one or more variables from above equation  In this chapter we disturbs voltage for designing
  • 6. Pass transistor logic synthesis:  Existing synthesis:-- limited logic cells,  Boolean exp. can be realized with AOI--- mapped with CMOS Nand & Nor  Include multiplexor functions, majority functions, exclusive-OR functions, etc.  Pass transistor logic can implement certain complex Boolean function efficiently.  handcrafted full custom design.  now synthesized rather than individually handcrafted to increase design productivity
  • 7. 1.1. Basics of pass transistor logic:  Pass transistor logic uses pass transistors to compose Boolean logic functions.  A pass transistor is a MOS device that acts like a switch  It reduces the count of transistors used to make different logic gates, by eliminating redundant transistors.
  • 8.
  • 9.  we can use the complementary pass transistor logic style in which both N and P pass transistors are used forming a transmission gate  It passes strong input to the strong output . TRANSMISSION GATE:
  • 10. Example: PTL contrast with CMOS  Pass transistor circuit requires 8 transistors CMOS implémentation requiers 10 tran  Pass Transistor Logic could lead to a better power, delay and area implementation compared to the conventional static CMOS logic.
  • 11. 1.2. Boolean decision diagram and pass transistor logic  An alternate method to represent a Boolean function.  A BDD consists of nodes labeled by the input variables of the Boolean function.  To determine the output of the Boolean function, we traverse the BDD from the top down  When we reach a circular node, we ask whether the input variable of the node is at logic 0 or 1  We traverse the left edge downwards if the variable is logic 0; otherwise, we traverse the right edge.
  • 12.  When the traversal reaches the special nodes, the logic value of the special node is the output of the function  if both inputs A & B are at logic I, we follow the right links at both circle nodes and reach a Logic 0.  The storage requirement of a Truth Table is always exponential with respect to the number of inputs. This obviously presents a problem in handling the table in computer software.  At the bottom of the diagram, we have two special square nodes representing logic 0 and 1, respectively  A Boolean Equation is not unique in the sense that many different equations can represent the same Boolean function  This canonical property is desirable for software manipulation  Boolean function can be readily constructed using recursive Shannon's decomposition
  • 14. 1.3 Pass Transistor Logic Synthesis System  compute arbitrary Boolean functions using direct mapping of BDDs to multiplexor-based pass transistor logic  it also opens the door for automated synthesis of pass transistor logic from hardware description language. Pass transistor logic is only scarcely used in some XOR or adder cells because of the particular Boolean functions encountered  The basic operation of the synthesis system is to express Boolean logic in BDDs.  The BDDs are then partitioned  The partitioned BDDs are then mapped into pass transistor cells and a post-mapping cleanup eliminates redundant circuits  The cell library consists of cells built with pass transistor circuits
  • 15. shows two different Boolean functions implemented by the same pass transistor cell.  Using the proper logic synthesis algorithms, pass transistor logic achieves better power and area efficiency than the static CMOS logic.
  • 16. Asynchronous circuits  Computation is achieved by a series of events represented by signal transition edges.  Type of computation system without any global clock signal  The speed of computation is determined by the signal propagation delay of the asynchronous circuit Asynchronous system basics
  • 17. The arrows in the timing diagram show the cause and effect relationship of the sequence of events
  • 19. Prospects of asynchronous computation  Power elimination---- Remove global clock  Delay—Circuit elements.  Request & Ack----- Clocks for syn order of computation  Delay Insensitive--- LP VLSI  Supply Voltage--- Brings the throughput  Complex control systems not desirable with the asynchronous circuits.
  • 20. REFERENCES [1] W. Athas, L. Svensson, J. Koller, N. Tzartzanis and E. Chou, "Low-Power Digital Systems Based on Adiabatic-Switching Principles," IEEE Transactions on VLSI Systems, vol. 2, no. 4, pp. 398-407, Dec. 1994. [2] J. Denker, S. Avery, A. Dickinson, A. Kramer and T. Wik, "Adiabatic Computing with the 2N-2N2D Logic Family," Proceedings of International Workshop on Low Power Design, pp. 183-187, 1994. [3] A. Kramer, J. Denker, B. Flower and J. Moroney, "Second Order Adiabatic Computation with 2N-2P and 2N-2N2P Logic Circuits," Proceedings of International Symposium on Low Power Design, pp. 191-196, 1995. [4] T. Indermaur and M. Horowitz, "Evaluation of Charge Recovery Circuits and Adiabatic Switching for Low Power CMOS Design," Digest of Technical Papers, IEEE Symposium on Low Power Electronics, pp. 102-103,1994.