1. Shengyan Hong
384 Fitzpatrick Hall  Notre Dame, IN  Phone (574) 302-6528  email hongshengyan@gmail.com
EDUCATION
University of Notre Dame Notre Dame, IN
Ph.D., Computer Science and Engineering, GPA: 3.80/4 December 2014
Dissertation: Real-Time Scheduling in Cyber-Physical Systems
Advisor: Dr. Xiaobo Sharon Hu
Pennsylvania State University State College, PA
Master of Engineering, Computer Science and Engineering, GPA: 3.78/4 August 2008
College of Engineering Fellowship
Fudan University Shanghai, P.R. China
Master of Science, Microelectronics & Solid-State Electronics, GPA: 3.51/4 June 2006
Bachelor of Science, Microelectronics, GPA: 3.03/4 July 2003
RESEARCH EXPERIENCE
University of Notre Dame Notre Dame, IN
Graduate Research Assistant, Computer Science and Engineering January 2009 – December 2014
 Developed an on-line centralized scheduler for wireless networked control systems that must handle both periodic and rhythmic packets
 Devised distributed algorithms to assign local deadlines to jobs on each processor in order for the jobs to meet their end-to-end deadlines in a distributed real-time system
 Designed a general adaptive framework to adjust control task deadlines for reducing delay variations
 Developed a simulator to emulate Amazon Elastic Compute Cloud
Pennsylvania State University State College, PA
Graduate Research Assistant, Computer Science and Engineering August 2006 – August 2008
 Designed an algorithm that intelligently maps (and remaps) threads of a parallelized task onto available processors to minimize the completion time of the task
Fudan University Shanghai, P.R. China
Graduate Research Assistant, Microelectronics September 2003 – June 2006
 Implemented a placement software for a series of FPGA chips designed by Fudan University
TECHNICAL SKILLS
Programming Languages:
 Proficient in C, GDB, Perl
 Experienced in C++, Standard Temporary Library, Tcl/Tk, OpenMP, Python, Verilog, VHDL, Matlab, 8086 assembly, 8031 assembly, Shell Scripting, JavaScript
Operating System Platforms:
 Proficient in Linux/Unix, Windows
 Experienced in Mac OS, DOS
Software Tools:
 Proficient in Latex, Microsoft Office Suite, Simplescalar, lp_solve
 Experienced in NS-2, Simics, Soft Hard Real-Time Kernel, Cadence, Modelsim, Quartus, Hspice, Xilinx Foundation, Cplex, Cacti, Active-HDL
Speaking Languages:
 Proficient in Chinese and English
TEACHING EXPERIENCE
University of Notre Dame Notre Dame, IN
CSE 30321 Computer Architecture I Fall 2013
 Graded lab assignments based on Simplescalar and held office hours
CSE 60321 Advanced Computer Architecture Spring 2009
 Developed and graded homework assignments, midterm and final exams, and held office hours
 Lectured a tutorial on Simplescalar
Pennsylvania State University State College, PA
CMPSC 461 Programming Language Concepts Spring 2007, Fall 2008
 Developed and graded homework assignments, graded midterm and final exams, and held office hours

2. CMPSC 465 Data Structures and Algorithms Fall 2006
 Graded homework assignments, midterm and final exams, and held office hours
INTERNSHIP EXPERIENCE
IBM China Research Laboratory Beijing, P.R. China
Summer Intern May 2012 – July 2012
 Proposed research on the application of the prospective theory in behavioral economics to the traffic guidance system in urban networks
Shanghai Min Qin Electronic Technology Co. Ltd., Shanghai China
Summer Intern August 2005
 Designed a commercial digital microcontroller, and employed an asynchronous circuit concept to lower the chip energy
PEER REVIEWED PUBLICATIONS
[1] Shengyan Hong, Thidapat Chantem, X. Sharon Hu, Local-Deadline Assignment for Distributed Real-Time Systems, accepted by IEEE Transactions on Computers.
[2] Shengyan Hong, Xiaobo Sharon Hu, Song Han, On-line Data Link Layer Scheduling in Wireless Networked Control Systems, submitted to 21th Real-Time and Embedded Technology and Applications Symposium (RTAS), Seattle, USA, April, 2015.
[3] Miao Song, Shuhui Li, Shangping Ren, Shengyan Hong and Xiaobo Sharon Hu, Computation Efficiency Driven Job Removal Policies for Meeting End-to-End Deadlines in Distributed Real-Time Systems, 16th IEEE Computer Society Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing (ISORC), June, Paderborn, Germany, 2013.
[4] Xiaobo Sharon Hu, Shengyan Hong, Michael D. Lemmon, WiP Abstract: Supporting Coordinated Negotiation in CPS Design, 3rd International Conference on Cyber-Physical Systems (ICCPS), Beijing, China, April, 2012.
[5] Shengyan Hong, Thidapat Chantem, X. Sharon Hu, Meeting End-to-End Deadlines through Distributed
Local Deadline assignment, 32nd IEEE Real-Time Systems Symposium (RTSS), Vienna, Austria, November, 2011.
[6] Thidapat Chantem, Jun Yi, Shengyan Hong, Xiaobo Sharon Hu, Christian Poellabauer, Liqiang Zhang, An Online Holistic Scheduling Framework for Energy-Constrained Wireless Real-Time Systems, 17th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA), Toyama, Japan, August, 2011.
[7] Shengyan Hong, Xiaobo Sharon Hu, M.D. Lemmon, An Adaptive Transmission Rate Control Approach to Minimize Energy Consumption, 17th Real-Time and Embedded Technology and Applications Symposium (RTAS), Work-In-Progress, Chicago, USA, April, 2011.
[8] Shengyan Hong, Thidapat Chantem, X. Sharon Hu, Meeting End-to-End Deadlines Through Distributed Local Deadline Assignment, 17th Real-Time and Embedded Technology and Applications Symposium (RTAS), Work-In- Progress, Chicago, USA, April, 2011.
[9] Shengyan Hong, Xiaobo Sharon Hu and Michael Lemmon, Reducing Delay Jitter of Real-Time Control Tasks through Adaptive Deadline Adjustments, 22nd EUROMICRO Conference on Real-Time Systems (ECRTS), Brussels, Belgium, July, 2010.
[10] Shengyan Hong, Xiaobo Sharon Hu, M.D. Lemmon, An Adaptive Approach to Reduce Control Delay Variations, 30th IEEE Real-Time Systems Symposium (RTSS), Work-In-Progress, Washington D.C., USA, December, 2009.
[11] Shengyan Hong, Sri Hari Krishna Narayanan, Mahmut T. Kandemir, Ozcan Ozturk, Process Variation Aware Thread Mapping for Chip Multiprocessors. Design Automation & Test in Europe (DATE), Nice, France, March, 2009.
[12] Shengyan Hong, Pushan Tang, Lingli Wang, Jiarong Tong, FPLACEMENT: New Placement Software for FPGA with Bus Resources, Microelectronics Journal, 2006.
[13] Shengyan Hong, Pushan Tang, Jiarong Tong, FPLACEMENT: New Placement Software for FPGA with Bus Resources, 6th International Conference on ASIC (ASICON), Poster, Shanghai, China, 2005.
PROFESSIONAL ACTIVITIES
Reviewer for Journals and Conferences:
 Journal of Parallel and Distributed Computing, 18th Real-Time and Embedded Technology and Applications Symposium (RTAS)
Judge Activities:
 Judge Northern Indiana Regional Science and Engineering Fair (March 2013, March 2014)