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Performance/Power Space Exploration for Binary64 Division Units

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Pvrtechnologies Nellore
Pvrtechnologies Nellore

Performance/Power Space Exploration for Binary64 Division Units

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E-Mail: pvrieeeprojects@gmail.com, Ph: 81432 71457 Performance/Power Space Exploration for Binary64 Division Units Abstract The digit-recurrence division algorithm is used in several high-performance processors because it provides good tradeoffs in terms of latency, area and power dissipation. In this work we develop a minimally redundant radix-8 divider for binary64 (double-precision) aiming at obtaining better energy efficiency in the performance-per-watt space. The results show that the radix-8 divider, when compared to radix-4 and radix-16 units, requires less energy to complete a division for high clock rates. Tools :  Xilinx 10.1  Modelsim 6.4b Languages :  VHDL / Verilog HDL

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Performance/Power Space Exploration for Binary64 Division Units

  • 1. E-Mail: pvrieeeprojects@gmail.com, Ph: 81432 71457 Performance/Power Space Exploration for Binary64 Division Units Abstract The digit-recurrence division algorithm is used in several high-performance processors because it provides good tradeoffs in terms of latency, area and power dissipation. In this work we develop a minimally redundant radix-8 divider for binary64 (double-precision) aiming at obtaining better energy efficiency in the performance-per-watt space. The results show that the radix-8 divider, when compared to radix-4 and radix-16 units, requires less energy to complete a division for high clock rates. Tools :  Xilinx 10.1  Modelsim 6.4b Languages :  VHDL / Verilog HDL