Operational amplifier

1. CHAPTER 2 OPERATIONAL AMPLIFIERS
Chapter Outline
2.1 The Ideal Op Amp
2.2 The Inverting Configuration
2.3 The Noninverting Configuration
2.4 Difference Amplifiers
2.5 Integrators and Differentiators
2.6 DC Imperfections
2.7 Effect of Finite Open-Loop Gain and Bandwidth on Circuit Performance
2 8 Large Signal Operation of Op Amp
NTUEE Electronics – L. H. Lu 2-1
2.8 Large-Signal Operation of Op Amp

2. 2.1 Ideal Op Amp
Introduction
Their applications were initially in the area of analog computation and instrumentation.
Op amp is very popular because of its versatility.
Op amp circuits work at levels that are quite close to their predicted theoretical performance.
We will first treat the op amp as a building block and study its terminal characteristics and its applications.
Op-amp symbol and terminals
Two input terminals: inverting input terminal () and noninverting input terminal (+)
One output terminal
Two dc power supplies V + and V 
NTUEE Electronics – L. H. Lu 2-2
Other terminals for frequency compensation and offset nulling
Circuit symbol for op amp Op amp with dc power supplies

3. Ideal characteristics of op amp
Differential-input single-ended-output amplifier
Infinite input impedance
i1 = i2 = 0 (regardless of the input voltage)
Zero output impedance
vO= A(v2 – v1) (regardless of the load)
Infinite open-loop differential gain
Infinite common-mode rejection
Infinite bandwidth
iff i i
Differential and common-mode signals
Two independent input signals: v1 and v2
Differential-mode input signal (vId): vId = (v2 – v1)
Common-mode input signal (vIcm): vIcm = (v1 + v2)/2
Alternative expression of v1 and v2:
v1 = vIcm – vId /2
v2 = vIcm + vId /2
NTUEE Electronics – L. H. Lu 2-3

4. 2.2 The Inverting Configuration
The inverting close-loop configuration
External components R1 and R2 form a close loop.
Output is fed back to the inverting input terminal.
Input signal is applied from the inverting terminal.
Inverting-configuration using ideal op amp
The required conditions to apply virtual short for op-amp circuit:
 Negative feedback configuration
 Infinite open-loop gain
Closed-loop gain: G ≡ vO /vI =  R2 /R1
 Infinite differential gain: v v = v /A = 0
 Infinite differential gain: v2  v1 = vO /A = 0
 Infinite input impedance: i2 = i1 = 0
 Zero output impedance: vO = v1  i1 R2 =  vI R2 /R1
 Voltage gain is negative
Input and output signals are out of phase.
 Closed-loop gain depends entirely on external passive
components (independent of op-amp gain).
 Close-loop amplifier trades gain (high open-loop gain)
for accuracy (finite but accurate closed-loop gain).
NTUEE Electronics – L. H. Lu 2-4

5. Equivalent circuit model for the inverting configuration
 Input impedance: Ri ≡vI /iI = vI / (vI /R1) = R1
For high input closed-loop impedance, R1 should be large, but is limited to provide sufficient G.
In general, the inverting configuration suffers from a low input impedance.
 Output impedance: Ro = 0
 Voltage gain: Avo = R2/R1
Other circuit example for inverting configuration
NTUEE Electronics – L. H. Lu 2-5

6. Application: the weighted summer
A weighted summer using the inverting configuration
A weighted summer for coefficients of both signs
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NTUEE Electronics – L. H. Lu 2-6
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7. 2.3 Noninverting Configuration
Application: the weighted summer
External components R1 and R2 form a close loop.
Output is fed back to the inverting input terminal.
Input signal is applied from the noninverting terminal.
Noninverting configuration using ideal op amp
The required conditions to apply virtual short for op-amp circuit:
 Negative feedback configuration
 Infinite open-loop gain
Closed-loop gain: G ≡ vO /vI = 1 + R2 /R1
 Infinite differential gain: v v = v /A = 0
 Infinite differential gain: v+  v = vO /A = 0
 Infinite input impedance: i2 = i1 = v /R1
 Zero output impedance: vO = v + i1R2 = vI (1 + R2 /R1)
 Closed-loop gain depends entirely on external passive
components (independent of op-amp gain).
 Close-loop amplifier trades gain (high open-loop gain)
for accuracy (finite but accurate closed-loop gain).
Equivalent circuit model for the noninverting configuration
 Input impedance: Ri = 
 Output impedance: Ro = 0
 Voltage gain: Avo = 1 + R2 /R1
NTUEE Electronics – L. H. Lu 2-7
(1+R2/R1)vi

8. The voltage follower
Unity-gain buffer based on noninverting configuration
Equivalent voltage amplifier model:
 Input resistance of the voltage follower Ri = 
 Output resistance of the voltage follower Ro = 0
 Voltage gain of the voltage follower Avo = 1
The closed-loop gain is unity regardless of source and load.
It is typically used as a buffer amplifier to connect a source with a high impedance to a low-impedance load.
NTUEE Electronics – L. H. Lu 2-8

9. 2.4 Difference Amplifiers
Difference amplifier
Ideal difference amplifier:
 Responds to differential input signal vId
 Rejects the common-mode input signal vIcm
Practical difference amplifier:
 vO = AdvId + AcmvIcm
Ad is the differential gain
Acm is the common-mode gain
 Common-mode rejection ratio (CMRR):
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Single op-amp difference amplifier
NTUEE Electronics – L. H. Lu 2-9
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10. Superposition technique for linear time-invariant circuit
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The condition for difference amplifier operation: R2 /R1 = R4 /R3  vO = (R2 /R1)(v2  v1)
For simplicity, the resistances can be chosen as: R3 = R1 and R4 = R2.
Differential input resistance Rid:
 Differential input resistance: Rid = 2R1
 Large R1 can be used to increase Rid
R2 becomes impractically large to maintain required gain.
Gain can be adjusted by changing R1 and R2 simultaneously.
NTUEE Electronics – L. H. Lu 2-10
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11. Instrumentation amplifier
Differential-mode gain can be adjusted by tuning R1.
Common-mode gain is zero.
Input impedance is infinite.
Output impedance is zero.
It’s preferable to obtain all the required gain in the first stage, leaving the second stage with a gain of one.
NTUEE Electronics – L. H. Lu 2-11
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12. 2.5 Integrators and Differentiators
Inverting configuration with general impedance
R1 and R2 in inverting configuration can be replaced by Z1(s) and Z2(s).
The closed-loop transfer function: Vo(s) /Vi(s) = Z2(s) /Z1(s)
The transmission magnitude and phase for a sinusoid input
can be evaluated by replacing s with j.
Inverting integrator
Time domain analysis:
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Frequency domain analysis:
Also known as Miller integrator.
Integrator frequency (int) is the inverse of the integrator time-constant (RC)  int = 1/RC
The capacitor behaves as an open-circuit at dc ( = 0)  open-loop configuration at dc (infinite gain).
Any tiny dc in the input could result in output saturation.
NTUEE Electronics – L. H. Lu 2-12
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13. The miller integrator with parallel feedback resistance
In order to prevent integrator saturation due to infinite dc gain, parallel feedback resistance is included.
 (log scale)
G (dB)
RC
1
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RF
1
Closed-loop gain = 1/(jRF + R/RF)
Closed-loop gain at dc = RF/R
Closed-loop gain at high frequency ( >>1/RFC) ≈ 1/ jRC
Corner frequency (3dB frequency) = 1/RFC
The integrator characteristics is no longer ideal.
Large resistance RF should be used for the feedback.
NTUEE Electronics – L. H. Lu 2-13
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14. The op-amp differentiator
Time domain analysis
Frequency domain analysis
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Differentiator operation:
Differentiator time-constant: RC
Gain (= RC) becomes infinite at very high frequencies.
High-frequency noise is magnified (generally avoided in practice).
NTUEE Electronics – L. H. Lu 2-14
i

15. The differentiator with series resistance
To prevent magnifying high-frequency noise, series resistance RF is included.
 (log scale)
G (dB)
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Closed-loop gain = jRC / (1 + jRFC)
Closed-loop gain at infinite frequency = R/RF
Closed-loop gain at low frequency ( << 1/RFC ) ≈  jRC
Corner frequency (3dB frequency) = 1/RFC
The differentiator characteristics is no longer ideal.
NTUEE Electronics – L. H. Lu 2-15
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16. 2.6 DC Imperfections
Offset voltage
Input offset voltage (VOS) arises as a result of the unavoidable mismatches.
The offset voltage and its polarity vary from one op-amp to another.
The analysis can be simplified by using the circuit model with an offset-free
op amp and a voltage source VOS at input terminal.
Typical offset voltage is a few mV.
Effect of offset voltage for a closed-loop amplifier
A dc voltage VOS(1+R2/R1) exists at the output at zero input voltage.
The input offset voltage is effectively amplified by the closed-loop gain as the error voltage at output.
Some op amps are provided with two additional terminals for offset nulling.
NTUEE Electronics – L. H. Lu 2-16
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/
1
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2 R
R
V
V OS
O 
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17. Input bias and offset current
DC bias currents IB1 and IB2 are required for certain types of op amps.
Input bias current is defined by IB = (IB1+IB2)/2
Input offset current is defined as IOS = |IB1IB2|.
Typical values for general-purpose op amps that use bipolar transistors are IB = 100 nA and IOS = 10 nA.
Effect of input bias current for a closed-loop amplifiers
Output dc voltage due to input bias current: VO = IB1R2  IBR2
The value of R2 and the closed-loop gain are limited.
NTUEE Electronics – L. H. Lu 2-17

18. Effect of input offset voltage on the the inverting integrator
The output voltage is given by
The output voltage increases with time until the op amp saturates.
Effect of input bias current on the inverting integrator
The output voltage is given by
The output voltage also increases with time unitl the op amp saturates.
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1
NTUEE Electronics – L. H. Lu 2-18

19. 2.7 Effect of Finite Open-Loop Gain and Bandwidth on Circuit Performance
Practical op-amp characteristics
Op amp with finite open-loop gain: A(j) = A0
Op amp with finite open-loop gain and bandwidth: A(j) = A0 / (1 + j /b)
Frequency response of op amp:
Open-loop op-amp
The frequency response of an open-loop op amp is approximated by STC form: A(j) = A0 /(1+ j/b).
At low frequencies ( << b), the open-loop op amp is approximated by |A(j)| ≈ A0
At high frequencies ( >> b), the open-loop op amp is approximated by |A(j)| ≈ A0/b
Unity-gain bandwidth (ft = t /2) is defined as the frequency at which |A(jt)| ≈ 1  t = A0b
NTUEE Electronics – L. H. Lu 2-19

20. Inverting configuration using op-amp with finite open-loop gain
Closed-loop gain:
 Closed-loop gain approaches the ideal value of R2 /R1 as A0 approaches to infinite.
 To minimize the dependence of G on open-loop gain, we should have A0 >> 1+ R2 /R1
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Input impedance:
Output impedance:
Inverting configuration using op amp with finite gain and bandwidth
NTUEE Electronics – L. H. Lu 2-20
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where G0 = R2/R1 and 3dB = A0b /(1+R2/R1) ≈ (A0 /|G0|)b

21. 2.8 Large-Signal Operation of Op Amps
Output voltage saturation
Rated output voltage (vO,max) specifies the maximum output voltage swing of op amp
Linear amplifier operation (for the required vO < vO,max): vO = (1+R2/R1)vI
Clipped output waveform (for the required vO > vO,max): vO = vO,max
The maximum input swing allowed for output voltage limited case: vI,max = vO,max/ (1+R2/R1)
Output is typically limited by voltage in cases where RL is large
Output current limits
Maximum output current (iO,max) specifies the output current limitation of op amp
Linear amplifier operation (for the required iO < iO,max): vO = (1+R2/R1)vI and iL = vO /RL
Clipped output waveform (for the required i > i ): i = i i
Clipped output waveform (for the required iO > iO,max): iL = iO,max iF
The maximum input swing allowed for output current limited case: vI,max = iO,max[RL||(R1+R2)]/(1+R2/R1)
Output is typically limited by current in cases where RL is small
NTUEE Electronics – L. H. Lu 2-21

22. Slew rate
Slew rate is the maximum rate of change possible at the output: (V/sec)
Slew rate may cause non-linear distortion for large-signal operation.
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Full-power bandwidth
Defined as the highest frequency allowed for a unity-gain buffer with a sinusoidal output at vO,max
NTUEE Electronics – L. H. Lu 2-22
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