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Unit 2
8085 Microprocessor
&
8051 Microcontroller
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LHC
Learning is a Step by step process
Evolution of Microprocessors
Microprocessor 8085
• 8085 is pronounced as "eighty-eighty-five"
microprocessor invented by Intel.
• It is an 8-bit microprocessor designed by Intel in
1977 using NMOS (Negative channel Metal Oxide
Semicoductor) technology.
Microprocessor 8085
• A microprocessor is an electronic (i.e.,
semiconductor) component that is used by a
computer to do its work.
• It is a central processing unit on a single integrated
circuit chip containing millions of very small
components including transistors, resistors, and
diodes that work together.
• The microprocessor is a multipurpose, clock driven,
register based, digital-integrated circuit which
accepts binary data as input, processes it according
to instructions stored in its memory, and provides
results as output.
Microprocessor 8085
• Main units: ALU (Arithmetic logic Unit), Register
array (Memory Unit), Control unit.
• The Microprocessors use three steps commonly
called Fetch (எடுக்க), Decode (ரகசிய ம ொழியில் உள்ளதை
கண
் டுபிடி), and Execute (மெயல்படுை்து).
• In the Fetch step, an instruction is copied from
the computer memory into the microprocessor.
In the Decode step, the microprocessor figures
out what operation the instruction is meant to
do. In the Execute step, this operation is
performed.
3 Main Units and Functions of
Microprocessor
3 main functions of Microprocessors
• Process the data
• Fetches the instruction from memory
• Decodes and executes the instructions
Parts of Computer
Arithmetic
Logic
Unit
Register
Arrays
(Memory
unit)
Control Unit
GP-
CPU
CLK Reg
MPU
CPU
Microprocessor-based System
3 main units
Register
Features of Microprocessor
• It is an 8 bit processor.
• It is as single chip device with 40 pins
• It has multiplexed address and data bus.(AD0-
AD7).
• It provides 16 address lines.
• It works on 5-Volt DC power supply.
• The maximum clock frequency is 3-MHz while
minimum frequency is 500-kHz.
• It provides 74 instructions with 5 different
addressing mode.
Functions of Microprocessor
• Averaging the data
• Alarm or annunciator settings
• Setting of set points
• Amplifier gain control
• Control I/O devices
• To format output signals
• Interface control
Uses of Microprocessor
• Instrumentation applications
• Microprocessor-based instruments made
intelligent by incorporating programmability
– Frequency meters
– Function generators
– Spectrum synthesis
– Oscilloscopes
– Counters
– Digital millimeters
• Inventory control system
• Home entertainment and games
Uses of Microprocessor
• Process control
– Monitoring and control
– Data acquisition
– Logging (make a systematic recording of
events, observations, or measurements) and
processing
• Medical Electronics
– Patient-monitoring in ICU
– Pathological (ந ோயியல்) analysis
– Measurement of BP, temperature, ECG, EEG, EMG
• Control of automation in industries
Pros Cons
Speed Violation of
privacy
Reliability Impact of labour
force
Consistency Public safety
Storage Health risks
Communications Impact on
environment
Architecture of
Microprocessor 8085
Inside the 8051 Chip
Microprocessor-Based Systems
Microprocessor-Based Systems
Buses/System buses in μP
System bus
Address bus:
• The address bus is a group of 16 lines
generally called as A0 – A15 to carry a
16-bit address of memory location.
• In a computer system, each peripheral
or memory location is identified by a
binary number called an address. This
is similar to the postal address of a
house.
• The address bus is unidirectional,
that means bit flow in only one
direction from MPU to peripheral.
• MPU carries 16-bit address i.e. 216 =
65,536 or 64K memory locations.
System bus
Data Bus:
• The data bus is a group of eight bidirectional
lines used for data flow in both the directions
between MPH and peripheral devices.
• The address bus is a group of 16 lines generally
called as D0 – D7 to carry a 8-bit address of
memory location.
• The 8 data lines are manipulating 8-bit data
ranging from 00 to FF i.e. (28 = 256) numbers
from 0000 0000 -1111 1111.
• Its is bidirectional.
• It’s multiplexed with A0 – A7
System bus
Control bus:
• Control bus is having various single lines used for
sending control signals in the form of pulse to
the memory and I/O devices.
• It is a group of conducting wires, which is used to
generate timing and control signals to control all
the associated peripherals, microprocessor uses
control bus to process data, that is what to do
with selected memory location.
Control bus
• Some control signals are:
– Memory read
– Memory write
– I/O read
– I/O Write
– Opcode fetch
Signal classification of 8085
• Address bus
• Data bus
• Control and status signals
• Power supply and frequency signals
• Externally initiated signals
• Serial I/O ports
Types of Communication through
buses
Microprocessor-Based Systems
RAM ROM
Definiti
on
Random Access Memory or RAM
is a form of data storage that can be
accessed randomly at any time, in
any order and from any physical
location., allowing quick access and
manipulation.
Read-only memory or ROM is also a
form of data storage that can not be
easily altered or reprogrammed. Stores
instructions that are not necessary for re-
booting up to make the computer operate
when it is switched off. They are
hardwired.
Use
RAM allows the computer to read
data quickly to run applications.
It allows reading and writing.
ROM stores the program required to
initially boot the computer. It only allows
reading.
Volatili
ty
RAM is volatile i.e. its contents are
lost when the device is powered off.
It is non-volatile i.e. its contents are
retained even when the device is powered
off.
Types
The two main types of RAM are
static RAM and dynamic RAM.
The types of ROM include PROM,
EPROM and EEPROM.
Architecture of 8085
(99.9% most asked question in University)
Architecture of 8085
Main parts of 8085 architecture
• ALU
• Set of Registers
• Timing & Control units
• Interrupt control
• Serial I/O control
• Instruction decoder & Machine cycle encoder
ALU
• An arithmetic logic unit (ALU) is a digital circuit used to perform arithmetic and logic
operations.
• It represents the fundamental building block
of the central processing unit (CPU) which is
Microprocessor of a computer. It carries a 8
bits for its operation.
ALU
• ALU units typically need to be able to perform the
basic logical operations (AND, OR) and the
addition operation.
• The inclusion of inverters on the inputs enables
the same ALU hardware to perform the
subtraction operation (adding an inverted
operand), and the operations NAND and NOR.
• Multiplication and division instructions are not
present in 8085 as its less powerful.
• It stores the result in Accumulator.
Main parts of 8085 architecture
• ALU
• Set of Registers
• Timing & Control units
• Interrupt control
• Serial I/O control
• Instruction decoder & Machine cycle encoder
Registers in μP
General purpose
Temporary
registers
Special Purpose
registers
16 bit Registers
(Spl purpose)
Flag register
Registers in μP
General purpose
Temporary
registers
Special Purpose
registers
16 bit Registers
(Spl purpose)
Program counter
Stack Pointer
Function of the program counter
is to point to the memory address
from which the next byte is to be
fetched.
Reserved area (Stack) of memory in RAM
to store or retrive the contents of GP
registers during execution.
Increment decrement address latch
enable
• The 8-bit contents of a register or a memory
location can be incremented or decremented
by 1.
• This 16-bit register is used to increment or
decrement the content of program counter
and stack pointer register by 1.
• Increment or decrement can be performed on
any register or a memory location.
Main parts of 8085 architecture
• ALU
• Set of Registers
• Timing & Control units
• Interrupt control
• Serial I/O control
• Instruction decoder & Machine cycle encoder
XYZ – Active low signal (The pin gets actuated when 0 is given)
XYZ – Active high signal (The pin gets actuated when 1 is given)
Control and Timing Unit
• The control and timing unit coordinates with all the actions
of the microprocessor by the clock and gives the control
signals which are required for communication among the
microprocessor as well as peripherals.
• It provides timing and control signal to the microprocessor
to perform operations.
• Following are the timing and control signals, which control
external and internal circuits −
– Control Signals: READY, RD, WR, ALE (Address Latch Enable)
– Status Signals: S0, S1, IO/M
– DMA (Direct Memory Access) Signals: HOLD, HLDA
– RESET Signals: RESET IN, RESET OUT
8085 Architecture & Pin
• Ready – Synchronize MP with peripherals.
– Send signal whether any peripherals are connected or not
• Reset IN – Low signal, Reset PC to Zero (Whole MP,Registers)
– PC = 0000H
• Reset OUT – Reset the entire connected device (Peripherals)
• HOLD – indicates another device requesting for use of AD bus
• HLDA – Acknowledge for HOLD request
ALE
• Address Latch Enable of the 8085 processor has 16
address lines for 16 bit address of a memory location.
• Out of this 16 address lines 8 address lines are solely
dedicated to transfer 8 higher order address bits while
the remaining lower order 8 bits of the address are
sent through another 8 lines multiplexed with the 8 bit
data lines.
• It is the control signal ALE to be sent by the processor
in appropriate time to indicate the operation of this 8
bit multiplexed bus whether it will be used to send the
lower order 8 address bits or to send the 8 data bits.
Demultiplexing AD0 – AD7
Main parts of 8085 architecture
• ALU
• Set of Registers
• Timing & Control units
• Serial I/O control
• Interrupt control
• Instruction decoder & Machine cycle encoder
Serial I/O control
• It controls the serial data
communication by using these
two instructions: SID (Serial
input data) and SOD (Serial
output data).
• SOD (Serial output data line) −
This output signal enables the
transmission of serial data bit
by bit to the external device.
• SID (Serial input data line) −
This input signal used to accept
serial data bit by bit from
external device.
Main parts of 8085 architecture
• ALU
• Set of Registers
• Timing & Control units
• Serial I/O control
• Interrupt control
• Instruction decoder & Machine cycle encoder
Interrupt (குறுக்கிடு) control
• Interrupt is a signal to the microprocessor
generated by HW/SW indicating an immediate
action needed.
• When a microprocessor is executing a main
program and whenever an interrupt occurs, the
microprocessor shifts the control from the main
program to process the incoming request.
• After the request is completed, the control goes
back to the main program.
Interrupt control
• There are 5 Hardware Interrupts
in 8085 microprocessor.
• They are – INTR, RST 7.5, RST
6.5, RST 5.5, TRAP.
• Software Interrupts are those
which are inserted in between
the program which means these
are mnemonics of
microprocessor.
• There are 8 software interrupts
in 8085 microprocessor. They
are – RST 0, RST 1, RST 2, RST 3,
RST 4, RST 5, RST 6, RST 7.
Interrupt control
• Maskable Interrupts are those which can
be disabled or ignored by the
microprocessor. These interrupts are
either edge-triggered or level-triggered,
so they can be disabled. INTR, RST 7.5,
RST 6.5, RST 5.5 are maskable interrupts
in 8085 microprocessor.
• Non-Maskable Interrupts are those which
cannot be disabled or ignored by
microprocessor. TRAP is a non-maskable
interrupt. It consists of both level as well
as edge triggering and is used in critical
power failure conditions.
SET/READ Interrupts
• SIM – Set interrupt mask – Can mask
maskable interrupt (RST 7.5, RST 6.5, RST 5.5).
• RIM - Read interrupt mask – Enabling
maskable interrupt.
Main parts of 8085 architecture
• ALU
• Set of Registers
• Timing & Control units
• Interrupt control
• Serial I/O control
• Instruction register, decoder & Machine cycle
encoder
Instruction register & decoder:
• It is an 8-bit register. When an instruction is
fetched from memory then it is stored in the
Instruction register. Instruction decoder
decodes the information present in the
Instruction register.
Machine cycle encoder:
• The machine cycle encoder is used for
providing information about the currently
executing machine cycle of an instruction
execution. (Arithmetic and logical)
instructions)
Summarization of
8085 architecture
• ALU
• Set of Registers
• Timing & Control units
• Interrupt control
• Serial I/O control
• Instruction register, decoder & Machine cycle
encoder
Uni & Bi- Directionals
Signal classification of 8085
(Pin Configuration)
• Address bus (AD0 – A15)
• Data bus (AD0 – AD7)
• Control and status signals (ALE, RD, WR, IO/M,
S0 & S1)
• Power supply and frequency signals (X1, X2 &
CLK)
• Externally initiated signals (Interrupt & Reset)
• Serial I/O ports (SOD, SID)
Timing diagram of 8085
(3rd Topic of this Unit)
Timing Diagram
Instruction Cycle
Instruction Cycle
Instruction Cycle
Note: S1 S0 – never be 0 simultaneously
RD & WR – never be 0 simultaneously
(4T)
(3T)
(3T)
(3T)
(3T)
Timing diagram of
Memory Read
machine cycle
Timing diagram of Memory Write
machine cycle
Timing diagram of I/O Read machine
cycle
Timing diagram of I/O Write machine
cycle
Draw the timing diagram of the
instruction MOV A,B and explain its
process. (8) [Nov 2017]
Example : MOV A, B
Memory
Address
Opcode/
hexcode
Mnemonics Operand Machine cycle
4100 78 MOV A, B OPCODE FETCH
Machine Cycles for MOV A,B instruction:
Opcode Fetch only.
(Fetching the Opcode “78” to understand
the Instruction that Move contents of
register B to Accumulator)
Example : MVI A, 05H
Memory
Address
Opcode Mnemonics Operand Machine cycle
4100 3E MVI A, 05H OPCODE FETCH
4101 05 MEMORY READ
1
Example : STA 526AH
• It require 4 m/c cycles 13 T states
1.Opcode fetch(4T)
2.Memory read(3T)
3.Memory read(3T)
4.Memory write(3T)
Memory
Address
Opcode or
Hex Code
Mnemonics Operand Machine cycle
41FF 32 STA 526AH OPCODE FETCH
4200 6A MEMORY READ
4201 52 MEMORY READ
.
.
526A C7
(This is Data
from
Accum)
MEMORY WRITE
Memory
Address
Opcod
e
Mne
monic
s
Operan
d
Machine
cycle
41FF 32 STA 526A
H
OPCODE
FETCH
4200 6A MEMORY
READ
4201 52 MEMORY
READ
.
.
526A C7
(This is
Data
from
Accum
)
MEMORY
WRITE
Mem
ory
Addr
ess
Opc
ode
Mn
em
oni
cs
Ope
rand
Machin
e cycle
41FF 32 STA 526
AH
OPCODE
FETCH
4200 6A MEMO
RY
READ
4201 52 MEMOR
Y READ
.
.
526A C7
(Thi
s is
Dat
a
fro
m
Acc
MEMOR
Y WRITE
Me
mo
ry
Ad
dre
ss
O
p
c
o
d
e
M
n
e
m
o
n
ic
s
Op
er
an
d
Machi
ne
cycle
41F
F
3
2
S
T
A
52
6A
H
OPCO
DE
FETC
H
420
0
6
A
MEM
ORY
READ
4
2
0
1
5
2
ME
M
OR
Y
RE
AD
Memory
Address
Opcode Mnemonic
s
Operand Machine cycle
41FF 32 STA 526AH OPCODE FETCH
4200 6A MEMORY READ
4201 52 MEMORY READ
.
.
526A C7
(This is
Data from
Accumulat
or)
MEMORY WRITE
Anna University question on Timing
diagram
6. Draw the timing diagram for the instruction
IN 02. Operate for IN is DB. [May 2019]
Speed control of DC motor using
Microprocessor 8085 kit
Recall your Lab experiment
Speed control of DC motor using
Microprocessor 8085 kit -
Connections
Controlling of Temperature of PCB by
adjusting the speed of DC motor
Speed Control in DC Motor using 8085
Microprocessor Kit
Memory Address Mnemonics Operand Remarks
4100 5E MVI A,FF Move the High Voltage to
Accumulator immediately
4101 FF
4102 D3 OUT CO Send the Data to Output device
which is having address COH
4103 CO
4104 76 HLT End the program
Draw the timing diagram for the
instruction IN 02. Operate for IN is DB.
[May 2019]
Understanding the question for making any
assumptions if needed.
• “02” followed after the IN
(Mnemonics/Instruction) is the Port address.
• DB is the Hexcode or Opcode for the Instruction
IN (Refer opcode sheet to justify this).
• There is no Data provided in the question.
• Hence a data is assumed which has to be sent
inside the microprocessor from an input device.
• And the Data assumed is DD.
Example : IN 02H
Port Address Data Machine cycle Remarks
02
(Memory Address
of Port)
DD I/O READ Data to be sent
from Input device
through the Port 02
to Accumulator
Memory
Address
Opcode Mnemonics Operand Machine cycle Remarks
4100 DB IN 02 OPCODE FETCH 02 is the Name of the
Port in
Microprocessor at
which the Input
device is connected
4101 02 MEMORY READ
DD is an assumed data
Machine Cycles for IN 02 instruction
1. Opcode Fetch (fetching the Opcode DB to
understand the Instruction)
2. Memory read (To read the Port address 02 of
Microprocessor in which the Input device is
connected)
3. Input read (Reading the data DD from the
Input device by the Accumulator of
Microprocessor)
Example : OUT 00H
Memory
Address
Opcode Mnemonics Operand Machine
cycle
Remarks
4100 D3 OUT F0 OPCODE
FETCH
FO is the
name of the
Port
4101 FO MEMORY
READ
.
.
FO (Memory
Address of
Port)
00 - - I/O WRITE Data to be
sent to Port
from
Accumulator
Timing diagram of OUT 00H
Addressing Modes in 8085
(4th Topic in this unit)
Addressing Modes in 8085
(4th Topic in this unit)
1. Direct Addressing
2. Register Direct addressing
3. Register Indirect addressing
4. Immediate Addressing
5. Implicit Addressing
Addressing Modes in 8085
Instruction Set
(5th Topic)
Data Transfer
Group
Arithmetic
Group
Logic Group
Branch
group
Stack, I/O &
machine
control
group
Move (MOV,MVI)
Load (LDA,LXI)
Store (STA,SHLD)
Exchange (XCHG)
Addition (ADD,ADI)
Subtraction (SUB,SUI)
Increment (INR,INX)
Decrement (DCR,DCX)
AND (ANA,ANI)
OR (ORA, ORI)
XOR (XRA, XRI)
Compliment NOT
(CMA)
Compare (CMP, CPI)
Rotate (RLC, RRC)
Jump (JMP, JZ, JNZ,
JC, JNC)
Call & Return –
Subroutine (CALL,
RET)
HLT & NOP
PUSH & POP
IN & OUT
Interrupts (EI, DI,
SIM RIM)
LDA addr
• Before Execution:
Memory Address Input value
4100 DA
4101 45
4102 30
4103 04
A
54
• After Execution of:
LDA 4100H
Memory Address Input value
4100 DA
4101 45
4102 30
4103 04
A
DA
LXI rp, data (16)
• Before Execution:
H L
56 48
• After Execution of:
LXI H, 4150H H L
41 50
XCHG
• Before Execution:
Memory
Address
Input
value
4150 10
4151 20
4152 30
4153 40
Memory
Address
Output
value
4150 30
4151 40
4152 10
4153 20
• After Execution of:
LHLD 4150H
XCHG
LHLD 4152H
SHLD 4150H
XCHG
SHLD 4152
HLT
H L
41 50
D E
41 50
H L
41 52
Memory
Address
Output
value
4150 30
4151 40
H L
41 50
Memory
Address
Output
value
4152 10
4153 20
D E
41 50
ADD r
• Before Execution:
A
02
• After Execution of:
ADD B
A
0E
B
0C
B
0C
ADD M
• Before Execution:
A
0A
• After Execution of:
ADD 4150
A
1A
Memory Address Input value
4150 10
4151 51
4152 51
4153 84
Memory Address Input value
4150 10
4151 20
4152 30
4153 40
ADI data(8)
• Before Execution:
A
02
• After Execution of:
ADI 08
A
0A
Same for Subtraction:
SUB r
SUB M
SUI data(8)
INR r
• Before Execution:
B
12
• After Execution of:
INR B
B
13
INR M
• Before Execution:
H L
41 51
• After Execution of:
INR M
Memory Address Input value
4151 10
4152 51
4153 51
4154 84
H L
41 52
Memory Address Input value
4151 10
4152 51
4153 51
4154 84
Same for Decrement:
DCR r
DCR M
ANA r
• Before Execution:
A
AA
• After Execution of:
ANA B
A
0A
B
0F
B
0F
CY AC
CY AC
0 1
A  00000010 00000010
B  00000000 00001111
A 00000000 00000010
0 A
ANA M
• Before Execution:
A
AA
• After Execution of:
ANA 4150H
A
0A
Memory Address Input value
4150 0F
4151 51
4152 51
4153 84
Memory Address Input value
4150 0F
4151 20
4152 30
4153 40
CY AC
CY AC
0 1
ANI data(8)
• Before Execution:
A
B3
• After Execution of:
ANI 3F
A
33
CY AC
CY AC
0 1
CMA
• Before Execution:
A
BC
• After Execution of:
CMA
A
43
D7 D6 D5 D4 D3 D2 D1 D0
1 0 1 1 1 1 0 0
D7 D6 D5 D4 D3 D2 D1 D0
0 1 0 0 0 0 1 1
CMP r
• A – r (Subtraction)
• Before Execution:
A
B8
• After Execution of:
CMP B
CY Z
CY Z
1 0
B
B9
A
B8
B
B9
A<B
Conditions for Compare instruction
• If A less than (R/M), the CY flag is set and Zero
flag is reset.
• If A equals to (R/M), the Zero flag is set and CY
flag is reset.
• If A greater than (R/M), the CY and Zero flag
are reset.
Accumulator results
after Subraction
Carry Flag Zero Flag
A < r,M 1 0
A = r,M 0 1
A > r.M 0 0
Review and Rotate instruction
• RAL (Rotate Accumulator Left with carry)
• RLC (Rotate Accumulator Left)
• RAR (Rotate Accumulator Right with Carry)
• RRC (Rotate Accumulator Right)
RAL
RLC vs RLA
Branching Instruction
Flags Conditional Jump Conditional Call Conditional return
Z = 0 (NOT ZERO) JNZ addr CNZ addr RNZ addr
Z = 1 (ZERO) JZ CZ RZ
CY = 0 (NO carry) JC CC RC
CY = 1 (Carry) JNC CNC RNC
P = 1 (Even parity) JPE CPE RPE
P = 0 (Odd parity) JPO CPO RPO
S = 0 (+ve) JP CP RP
S = 1 (-ve) JM CM RM
IO instruction
• IN addr
• OUT addr
PORT 0F
10
A
25
IN 0F
PORT 0F
10
A
10
PORT 0F
10
A
FF
OUT 0F
PORT 0F
FF
A
FF
Inputting some value to MP from Input device Outputting some value from MP to Output device
Before Execution
After Execution
Stack instruction
• PUSH
• POP
2000
2001
2002
PUSH D
D E
10 50
2000 50
2001 10
2002
D E
10 50
SP 2002 SP 2000
Before Execution
After Execution
Machine Control
• HLT
• NOP
• Interrupts
– EI
– DI
– SIM
– RIM
Pros
• The function of a Microprocessor is to conduct arithmetic
and logic operations.
• Microprocessors are used to perform complicated
mathematical operations, like operating on the floating
point numbers (rarely).
• Microprocessor is that these are general purpose electronic
processing devices which can be programmed to execute a
number of tasks.
• Microprocessor is its speed, which is measured in hertz. For
instance, a microprocessor with 3 GHz, shortly GHz is
capable of performing 3 billion tasks per second.
• Microprocessor is that it can quickly move data between
the various memory locations.
Cons
• The microprocessor has a limitation on the size of
data.
• Most of the microprocessor does not support
floating point operations.
• The main disadvantage is it’s over heating
physically.
• It should not contact with the other external
devices.
• The microprocessor is does not have any internal
peripheral like ROM, RAM and other I/O devices.
Last Topic in this Unit
Microcontrollers
• Support Devices
– Timers
– A/D converter
– Serial I/O
• Common communication lines
– System Bus
MPU-Based Time
and Temperature System
MCU-Based Time
and Temperature System
Features of 8051 microcontroller
• 8-bit CPU
• 16-bit Program Counter
• 8-bit Processor Status Word (PSW)
• 8-bit Stack Pointer
• Internal RAM of 128bytes
• Special Function Registers (SFRs) of 128 bytes
• 32 I/O pins arranged as four 8-bit ports (P0 - P3)
• Two 16-bit timer/counters : T0 and T1
• Two external and three internal vectored interrupts
• One full duplex serial I/O
• Microcontroller is designed in such a way that the microcontroller
has all programs and data memory, counters and timers, interrupts,
I/O ports are embedded on the chip
Basic 8051 Architecture
Inside the 8051 chip
Simple 8051 Architecture
Detailed 8051 Architecture
Full Architecture from Intel
12 major components in MC
• ALU
• PC
• Registers (R & B)
• Timers & Counters
• Internal ROM & RAM
• Four general purpose parallel I/O ports
• Interrupt control
• Serial data communication
• PSW
• DPTR
• SP
• Data & Address bus
General purpose parallel I/O ports
• PORT P0 : No external memory. In the
presence of external memory it acts as MUX
AD bus. (Dual function).
• PORT P1: Interfacing activities. NO dual
function.
• PORT P2: Similar to PORT P0, but acts as an
address bus in presence of external memory.
• PORT P3: Dedicated I/O port.
Program Status Word (PSW)
• 8-bit register (6 bits of it are used by the 8051
and D5 &D1 (2) user defined).
• Also referred to as the flag register.
• Four of the flags are called conditional
flags, meaning that they indicate some
conditions that result after an instruction is
executed. These four are CY (carry), AC
(auxiliary carry), P (parity), and OV (overflow).
Conditional Flags
CY (carry flag):
• This flag is set whenever there is a carry out from the D. bit
• This flag bit is affected after 8 bit addition or subtraction
• It can also be set to 1 or 0 directly by an instruction such as " SET BC" and "CLRC"
AC(Auxiliary flag):
• If there is a carry from D3 to D4 during ADD or SUB operation this bit is set otherwise it
is cleared
• This flag is used by instruction that perform BCD (binary coded decimal) arithmetic.
P (Parity flag):
• The parity flag reflect the number of 1's in the A (accumulator) register only
• If the A register contains an odd number of 1's then P=1 therefore P=0 if A has an even
number 1's which is 0. As per our convenience, 1 –odd no & 0 – even no.
OV (Overflow flag):
• This flag is set whenever the result of a signed number operation is too large causing
the high order bit to overflow into the sign bit.
• The carry flag is used to detect error in unsigned arithmetic operations
• The overflow flag is only used to detect error in signed arithmetic operations.
Memories in 8051
Internal RAM:
• Internal RAM has memory 128-byte.
• Internal RAM is organized into three distinct areas: 32 bytes
working registers from address 00h to 1Fh 16 bytes bit
addressable occupies RAM byte address 20h to 2Fh, altogether
128 addressable bits General purpose RAM from 30h to 7Fh.
Internal ROM:
• Data memory and program code memory both are in different
physical memory but both have the same addresses.
• An internal ROM occupied addresses from 0000h to 0FFFh. PC
addresses program codes from 0000h to 0FFFh.
• Program addresses higher than 0FFFh that exceed the internal
ROM capacity will cause 8051 architecture to fetch codes bytes
from external program memory.
Registers in 8051 μC
The "R" Registers:
• The "R" registers are a set of eight registers,
namely, R0, R1 to R7. These registers function as
auxiliary or temporary storage registers in many
operations.
The "B" Register
• The "B" register is very similar to the
Accumulator in the sense that it may hold an 8-
bit (1-byte) value.
• The "B" register is used only by two 8051
instructions: MUL AB and DIV AB. To quickly and
easily multiply or divide A by another number,
you may store the other number in "B" and make
use of these two instructions.
Registers (R & B)
The Data Pointer (DPTR)
• The Data Pointer (DPTR) is the 8051’s only
user-accessible 16-bit (2-byte) register.
• The Accumulator, R0–R7 registers and B
register are 1-byte value registers. DPTR is
meant for pointing to data.
• It is used by the 8051 to access external
memory using the address indicated by DPTR.
• DPTR is the only 16-bit register available and is
often used to store 2-byte values.
Timers & Counters
• Synchronization with clock pulses
• XTAL1 & XTAL2 – Oscillator
• EA – External enable – Holds 4Kb of program
memory
• ALE – latches the address signals on Port P0
• PSEN – Program store enable – Reads external
program memory
• RST – reset ports and registers upon start up.
Register bank status in PSW
• The bits PSW.3 and PSW.4 are designated as
RSO and RS1, respectively, and are used to
change the bank registers.
Pin Configuration of 8051
• Pins 1 to 8 − These pins are known as Port 1. This port doesn’t
serve any other functions. It is internally pulled up, bi-
directional I/O port.
• Pin 9 − It is a RESET pin, which is used to reset the
microcontroller to its initial values.
• Pins 10 to 17 − These pins are known as Port 3. This port serves
some functions like interrupts, timer input, control signals, serial
communication signals RXD and TXD, etc.
• Pins 18 & 19 − These pins are used for interfacing an external
crystal to get the system clock.
• Pin 20 − This pin provides the power supply to the circuit.
Pin Configuration of 8051
• Pins 21 to 28 − These pins are known as Port 2. It serves as I/O
port. Higher order address bus signals are also multiplexed using
this port.
• Pin 29 − This is PSEN pin which stands for Program Store Enable.
It is used to read a signal from the external program memory.
• Pin 30 − This is EA pin which stands for External Access input. It
is used to enable/disable the external memory interfacing.
• Pin 31 − This is ALE pin which stands for Address Latch Enable. It
is used to de-multiplex the address-data signal of port.
• Pins 32 to 39 − These pins are known as Port 0. It serves as I/O
port. Lower order address and data bus signals are multiplexed
using this port.
• Pin 40 − This pin is used to provide power supply to the circuit.
Applications of 8051 Microcontroller
• Energy Management: Competent measuring device
systems aid in calculating energy consumption in
domestic and industrialized applications. These
meter systems are prepared competent by
integrating microcontrollers.
• Touch screens: A high degree of microcontroller
suppliers integrate touch sensing abilities in their
designs. Transportable devices such as media players,
gaming devices & cell phones are some illustrations
of micro-controller integrated with touch sensing
screens.
Applications of 8051 Microcontroller
• Medical Devices: Handy medicinal gadgets such
as glucose & blood pressure monitors bring into
play micro-controllers, to put on view the
measurements, as a result, offering higher
dependability in giving correct medical results.
• Automobiles: The microcontroller 8051 discovers
broad recognition in supplying automobile
solutions. They are extensively utilized in hybrid
motor vehicles to control engine variations. In
addition, works such as cruise power and anti-
brake mechanism has created it more capable
with the amalgamation of micro-controllers.
Unit 2 -  Microprocessor & Microcontroller.pptx
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Unit 2 - Microprocessor & Microcontroller.pptx

  • 2.
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  • 17. Created by BelAZ is the world’s largest and heaviest dump truck
  • 18. Bagger 293 is a true masterpiece and a living testament to German engineering. It holds the world record for the highest terrestrial vehicle in the world. This mega machine works in the coal mines of western Germany and is as large as two football fields in length. Besides, it stands at a height of 96 m, that is almost as much as a 30 story building. This excavator weighs up to 14,200 tons and requires five people at once to operate it. In other words, this German giant weighs as much as 2,000 adult elephants.
  • 19. LHC
  • 20. Learning is a Step by step process
  • 22.
  • 23.
  • 24. Microprocessor 8085 • 8085 is pronounced as "eighty-eighty-five" microprocessor invented by Intel. • It is an 8-bit microprocessor designed by Intel in 1977 using NMOS (Negative channel Metal Oxide Semicoductor) technology.
  • 25. Microprocessor 8085 • A microprocessor is an electronic (i.e., semiconductor) component that is used by a computer to do its work. • It is a central processing unit on a single integrated circuit chip containing millions of very small components including transistors, resistors, and diodes that work together. • The microprocessor is a multipurpose, clock driven, register based, digital-integrated circuit which accepts binary data as input, processes it according to instructions stored in its memory, and provides results as output.
  • 26. Microprocessor 8085 • Main units: ALU (Arithmetic logic Unit), Register array (Memory Unit), Control unit. • The Microprocessors use three steps commonly called Fetch (எடுக்க), Decode (ரகசிய ம ொழியில் உள்ளதை கண ் டுபிடி), and Execute (மெயல்படுை்து). • In the Fetch step, an instruction is copied from the computer memory into the microprocessor. In the Decode step, the microprocessor figures out what operation the instruction is meant to do. In the Execute step, this operation is performed.
  • 27. 3 Main Units and Functions of Microprocessor
  • 28. 3 main functions of Microprocessors • Process the data • Fetches the instruction from memory • Decodes and executes the instructions
  • 32. Features of Microprocessor • It is an 8 bit processor. • It is as single chip device with 40 pins • It has multiplexed address and data bus.(AD0- AD7). • It provides 16 address lines. • It works on 5-Volt DC power supply. • The maximum clock frequency is 3-MHz while minimum frequency is 500-kHz. • It provides 74 instructions with 5 different addressing mode.
  • 33. Functions of Microprocessor • Averaging the data • Alarm or annunciator settings • Setting of set points • Amplifier gain control • Control I/O devices • To format output signals • Interface control
  • 34. Uses of Microprocessor • Instrumentation applications • Microprocessor-based instruments made intelligent by incorporating programmability – Frequency meters – Function generators – Spectrum synthesis – Oscilloscopes – Counters – Digital millimeters • Inventory control system • Home entertainment and games
  • 35. Uses of Microprocessor • Process control – Monitoring and control – Data acquisition – Logging (make a systematic recording of events, observations, or measurements) and processing • Medical Electronics – Patient-monitoring in ICU – Pathological (ந ோயியல்) analysis – Measurement of BP, temperature, ECG, EEG, EMG • Control of automation in industries
  • 36. Pros Cons Speed Violation of privacy Reliability Impact of labour force Consistency Public safety Storage Health risks Communications Impact on environment
  • 39.
  • 40.
  • 41.
  • 42.
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  • 45.
  • 48. System bus Address bus: • The address bus is a group of 16 lines generally called as A0 – A15 to carry a 16-bit address of memory location. • In a computer system, each peripheral or memory location is identified by a binary number called an address. This is similar to the postal address of a house. • The address bus is unidirectional, that means bit flow in only one direction from MPU to peripheral. • MPU carries 16-bit address i.e. 216 = 65,536 or 64K memory locations.
  • 49. System bus Data Bus: • The data bus is a group of eight bidirectional lines used for data flow in both the directions between MPH and peripheral devices. • The address bus is a group of 16 lines generally called as D0 – D7 to carry a 8-bit address of memory location. • The 8 data lines are manipulating 8-bit data ranging from 00 to FF i.e. (28 = 256) numbers from 0000 0000 -1111 1111. • Its is bidirectional. • It’s multiplexed with A0 – A7
  • 50. System bus Control bus: • Control bus is having various single lines used for sending control signals in the form of pulse to the memory and I/O devices. • It is a group of conducting wires, which is used to generate timing and control signals to control all the associated peripherals, microprocessor uses control bus to process data, that is what to do with selected memory location.
  • 51. Control bus • Some control signals are: – Memory read – Memory write – I/O read – I/O Write – Opcode fetch
  • 52.
  • 53. Signal classification of 8085 • Address bus • Data bus • Control and status signals • Power supply and frequency signals • Externally initiated signals • Serial I/O ports
  • 54. Types of Communication through buses
  • 55.
  • 57.
  • 58. RAM ROM Definiti on Random Access Memory or RAM is a form of data storage that can be accessed randomly at any time, in any order and from any physical location., allowing quick access and manipulation. Read-only memory or ROM is also a form of data storage that can not be easily altered or reprogrammed. Stores instructions that are not necessary for re- booting up to make the computer operate when it is switched off. They are hardwired. Use RAM allows the computer to read data quickly to run applications. It allows reading and writing. ROM stores the program required to initially boot the computer. It only allows reading. Volatili ty RAM is volatile i.e. its contents are lost when the device is powered off. It is non-volatile i.e. its contents are retained even when the device is powered off. Types The two main types of RAM are static RAM and dynamic RAM. The types of ROM include PROM, EPROM and EEPROM.
  • 59.
  • 60.
  • 61.
  • 62. Architecture of 8085 (99.9% most asked question in University)
  • 64.
  • 65.
  • 66. Main parts of 8085 architecture • ALU • Set of Registers • Timing & Control units • Interrupt control • Serial I/O control • Instruction decoder & Machine cycle encoder
  • 67. ALU • An arithmetic logic unit (ALU) is a digital circuit used to perform arithmetic and logic operations. • It represents the fundamental building block of the central processing unit (CPU) which is Microprocessor of a computer. It carries a 8 bits for its operation.
  • 68. ALU • ALU units typically need to be able to perform the basic logical operations (AND, OR) and the addition operation. • The inclusion of inverters on the inputs enables the same ALU hardware to perform the subtraction operation (adding an inverted operand), and the operations NAND and NOR. • Multiplication and division instructions are not present in 8085 as its less powerful. • It stores the result in Accumulator.
  • 69.
  • 70.
  • 71. Main parts of 8085 architecture • ALU • Set of Registers • Timing & Control units • Interrupt control • Serial I/O control • Instruction decoder & Machine cycle encoder
  • 72. Registers in μP General purpose Temporary registers Special Purpose registers 16 bit Registers (Spl purpose)
  • 74. Registers in μP General purpose Temporary registers Special Purpose registers 16 bit Registers (Spl purpose) Program counter Stack Pointer Function of the program counter is to point to the memory address from which the next byte is to be fetched. Reserved area (Stack) of memory in RAM to store or retrive the contents of GP registers during execution.
  • 75.
  • 76. Increment decrement address latch enable • The 8-bit contents of a register or a memory location can be incremented or decremented by 1. • This 16-bit register is used to increment or decrement the content of program counter and stack pointer register by 1. • Increment or decrement can be performed on any register or a memory location.
  • 77.
  • 78. Main parts of 8085 architecture • ALU • Set of Registers • Timing & Control units • Interrupt control • Serial I/O control • Instruction decoder & Machine cycle encoder XYZ – Active low signal (The pin gets actuated when 0 is given) XYZ – Active high signal (The pin gets actuated when 1 is given)
  • 79. Control and Timing Unit • The control and timing unit coordinates with all the actions of the microprocessor by the clock and gives the control signals which are required for communication among the microprocessor as well as peripherals. • It provides timing and control signal to the microprocessor to perform operations. • Following are the timing and control signals, which control external and internal circuits − – Control Signals: READY, RD, WR, ALE (Address Latch Enable) – Status Signals: S0, S1, IO/M – DMA (Direct Memory Access) Signals: HOLD, HLDA – RESET Signals: RESET IN, RESET OUT
  • 81. • Ready – Synchronize MP with peripherals. – Send signal whether any peripherals are connected or not • Reset IN – Low signal, Reset PC to Zero (Whole MP,Registers) – PC = 0000H • Reset OUT – Reset the entire connected device (Peripherals) • HOLD – indicates another device requesting for use of AD bus • HLDA – Acknowledge for HOLD request
  • 82. ALE • Address Latch Enable of the 8085 processor has 16 address lines for 16 bit address of a memory location. • Out of this 16 address lines 8 address lines are solely dedicated to transfer 8 higher order address bits while the remaining lower order 8 bits of the address are sent through another 8 lines multiplexed with the 8 bit data lines. • It is the control signal ALE to be sent by the processor in appropriate time to indicate the operation of this 8 bit multiplexed bus whether it will be used to send the lower order 8 address bits or to send the 8 data bits.
  • 84.
  • 85. Main parts of 8085 architecture • ALU • Set of Registers • Timing & Control units • Serial I/O control • Interrupt control • Instruction decoder & Machine cycle encoder
  • 86.
  • 87. Serial I/O control • It controls the serial data communication by using these two instructions: SID (Serial input data) and SOD (Serial output data). • SOD (Serial output data line) − This output signal enables the transmission of serial data bit by bit to the external device. • SID (Serial input data line) − This input signal used to accept serial data bit by bit from external device.
  • 88. Main parts of 8085 architecture • ALU • Set of Registers • Timing & Control units • Serial I/O control • Interrupt control • Instruction decoder & Machine cycle encoder
  • 89.
  • 90. Interrupt (குறுக்கிடு) control • Interrupt is a signal to the microprocessor generated by HW/SW indicating an immediate action needed. • When a microprocessor is executing a main program and whenever an interrupt occurs, the microprocessor shifts the control from the main program to process the incoming request. • After the request is completed, the control goes back to the main program.
  • 91. Interrupt control • There are 5 Hardware Interrupts in 8085 microprocessor. • They are – INTR, RST 7.5, RST 6.5, RST 5.5, TRAP. • Software Interrupts are those which are inserted in between the program which means these are mnemonics of microprocessor. • There are 8 software interrupts in 8085 microprocessor. They are – RST 0, RST 1, RST 2, RST 3, RST 4, RST 5, RST 6, RST 7.
  • 92. Interrupt control • Maskable Interrupts are those which can be disabled or ignored by the microprocessor. These interrupts are either edge-triggered or level-triggered, so they can be disabled. INTR, RST 7.5, RST 6.5, RST 5.5 are maskable interrupts in 8085 microprocessor. • Non-Maskable Interrupts are those which cannot be disabled or ignored by microprocessor. TRAP is a non-maskable interrupt. It consists of both level as well as edge triggering and is used in critical power failure conditions.
  • 93. SET/READ Interrupts • SIM – Set interrupt mask – Can mask maskable interrupt (RST 7.5, RST 6.5, RST 5.5). • RIM - Read interrupt mask – Enabling maskable interrupt.
  • 94.
  • 95. Main parts of 8085 architecture • ALU • Set of Registers • Timing & Control units • Interrupt control • Serial I/O control • Instruction register, decoder & Machine cycle encoder
  • 96.
  • 97. Instruction register & decoder: • It is an 8-bit register. When an instruction is fetched from memory then it is stored in the Instruction register. Instruction decoder decodes the information present in the Instruction register. Machine cycle encoder: • The machine cycle encoder is used for providing information about the currently executing machine cycle of an instruction execution. (Arithmetic and logical) instructions)
  • 98. Summarization of 8085 architecture • ALU • Set of Registers • Timing & Control units • Interrupt control • Serial I/O control • Instruction register, decoder & Machine cycle encoder
  • 99. Uni & Bi- Directionals
  • 100. Signal classification of 8085 (Pin Configuration) • Address bus (AD0 – A15) • Data bus (AD0 – AD7) • Control and status signals (ALE, RD, WR, IO/M, S0 & S1) • Power supply and frequency signals (X1, X2 & CLK) • Externally initiated signals (Interrupt & Reset) • Serial I/O ports (SOD, SID)
  • 101.
  • 102.
  • 103.
  • 104.
  • 105.
  • 106.
  • 107.
  • 108. Timing diagram of 8085 (3rd Topic of this Unit)
  • 109.
  • 110.
  • 111.
  • 116. Note: S1 S0 – never be 0 simultaneously RD & WR – never be 0 simultaneously (4T) (3T) (3T) (3T) (3T)
  • 117.
  • 118. Timing diagram of Memory Read machine cycle
  • 119. Timing diagram of Memory Write machine cycle
  • 120. Timing diagram of I/O Read machine cycle
  • 121. Timing diagram of I/O Write machine cycle
  • 122. Draw the timing diagram of the instruction MOV A,B and explain its process. (8) [Nov 2017]
  • 123. Example : MOV A, B Memory Address Opcode/ hexcode Mnemonics Operand Machine cycle 4100 78 MOV A, B OPCODE FETCH Machine Cycles for MOV A,B instruction: Opcode Fetch only. (Fetching the Opcode “78” to understand the Instruction that Move contents of register B to Accumulator)
  • 124.
  • 125. Example : MVI A, 05H Memory Address Opcode Mnemonics Operand Machine cycle 4100 3E MVI A, 05H OPCODE FETCH 4101 05 MEMORY READ
  • 126.
  • 127. 1
  • 128. Example : STA 526AH • It require 4 m/c cycles 13 T states 1.Opcode fetch(4T) 2.Memory read(3T) 3.Memory read(3T) 4.Memory write(3T) Memory Address Opcode or Hex Code Mnemonics Operand Machine cycle 41FF 32 STA 526AH OPCODE FETCH 4200 6A MEMORY READ 4201 52 MEMORY READ . . 526A C7 (This is Data from Accum) MEMORY WRITE
  • 129. Memory Address Opcod e Mne monic s Operan d Machine cycle 41FF 32 STA 526A H OPCODE FETCH 4200 6A MEMORY READ 4201 52 MEMORY READ . . 526A C7 (This is Data from Accum ) MEMORY WRITE
  • 130. Mem ory Addr ess Opc ode Mn em oni cs Ope rand Machin e cycle 41FF 32 STA 526 AH OPCODE FETCH 4200 6A MEMO RY READ 4201 52 MEMOR Y READ . . 526A C7 (Thi s is Dat a fro m Acc MEMOR Y WRITE
  • 132. Memory Address Opcode Mnemonic s Operand Machine cycle 41FF 32 STA 526AH OPCODE FETCH 4200 6A MEMORY READ 4201 52 MEMORY READ . . 526A C7 (This is Data from Accumulat or) MEMORY WRITE
  • 133. Anna University question on Timing diagram 6. Draw the timing diagram for the instruction IN 02. Operate for IN is DB. [May 2019]
  • 134. Speed control of DC motor using Microprocessor 8085 kit
  • 135. Recall your Lab experiment
  • 136. Speed control of DC motor using Microprocessor 8085 kit - Connections
  • 137. Controlling of Temperature of PCB by adjusting the speed of DC motor
  • 138. Speed Control in DC Motor using 8085 Microprocessor Kit Memory Address Mnemonics Operand Remarks 4100 5E MVI A,FF Move the High Voltage to Accumulator immediately 4101 FF 4102 D3 OUT CO Send the Data to Output device which is having address COH 4103 CO 4104 76 HLT End the program
  • 139. Draw the timing diagram for the instruction IN 02. Operate for IN is DB. [May 2019] Understanding the question for making any assumptions if needed. • “02” followed after the IN (Mnemonics/Instruction) is the Port address. • DB is the Hexcode or Opcode for the Instruction IN (Refer opcode sheet to justify this). • There is no Data provided in the question. • Hence a data is assumed which has to be sent inside the microprocessor from an input device. • And the Data assumed is DD.
  • 140. Example : IN 02H Port Address Data Machine cycle Remarks 02 (Memory Address of Port) DD I/O READ Data to be sent from Input device through the Port 02 to Accumulator Memory Address Opcode Mnemonics Operand Machine cycle Remarks 4100 DB IN 02 OPCODE FETCH 02 is the Name of the Port in Microprocessor at which the Input device is connected 4101 02 MEMORY READ DD is an assumed data
  • 141. Machine Cycles for IN 02 instruction 1. Opcode Fetch (fetching the Opcode DB to understand the Instruction) 2. Memory read (To read the Port address 02 of Microprocessor in which the Input device is connected) 3. Input read (Reading the data DD from the Input device by the Accumulator of Microprocessor)
  • 142.
  • 143.
  • 144.
  • 145. Example : OUT 00H Memory Address Opcode Mnemonics Operand Machine cycle Remarks 4100 D3 OUT F0 OPCODE FETCH FO is the name of the Port 4101 FO MEMORY READ . . FO (Memory Address of Port) 00 - - I/O WRITE Data to be sent to Port from Accumulator
  • 146. Timing diagram of OUT 00H
  • 147.
  • 148.
  • 149.
  • 150. Addressing Modes in 8085 (4th Topic in this unit)
  • 151. Addressing Modes in 8085 (4th Topic in this unit)
  • 153. 2. Register Direct addressing
  • 154. 3. Register Indirect addressing
  • 158. Instruction Set (5th Topic) Data Transfer Group Arithmetic Group Logic Group Branch group Stack, I/O & machine control group Move (MOV,MVI) Load (LDA,LXI) Store (STA,SHLD) Exchange (XCHG) Addition (ADD,ADI) Subtraction (SUB,SUI) Increment (INR,INX) Decrement (DCR,DCX) AND (ANA,ANI) OR (ORA, ORI) XOR (XRA, XRI) Compliment NOT (CMA) Compare (CMP, CPI) Rotate (RLC, RRC) Jump (JMP, JZ, JNZ, JC, JNC) Call & Return – Subroutine (CALL, RET) HLT & NOP PUSH & POP IN & OUT Interrupts (EI, DI, SIM RIM)
  • 159.
  • 160.
  • 161. LDA addr • Before Execution: Memory Address Input value 4100 DA 4101 45 4102 30 4103 04 A 54 • After Execution of: LDA 4100H Memory Address Input value 4100 DA 4101 45 4102 30 4103 04 A DA
  • 162. LXI rp, data (16) • Before Execution: H L 56 48 • After Execution of: LXI H, 4150H H L 41 50
  • 163. XCHG • Before Execution: Memory Address Input value 4150 10 4151 20 4152 30 4153 40 Memory Address Output value 4150 30 4151 40 4152 10 4153 20 • After Execution of: LHLD 4150H XCHG LHLD 4152H SHLD 4150H XCHG SHLD 4152 HLT H L 41 50 D E 41 50 H L 41 52 Memory Address Output value 4150 30 4151 40 H L 41 50 Memory Address Output value 4152 10 4153 20 D E 41 50
  • 164. ADD r • Before Execution: A 02 • After Execution of: ADD B A 0E B 0C B 0C
  • 165. ADD M • Before Execution: A 0A • After Execution of: ADD 4150 A 1A Memory Address Input value 4150 10 4151 51 4152 51 4153 84 Memory Address Input value 4150 10 4151 20 4152 30 4153 40
  • 166. ADI data(8) • Before Execution: A 02 • After Execution of: ADI 08 A 0A Same for Subtraction: SUB r SUB M SUI data(8)
  • 167. INR r • Before Execution: B 12 • After Execution of: INR B B 13
  • 168. INR M • Before Execution: H L 41 51 • After Execution of: INR M Memory Address Input value 4151 10 4152 51 4153 51 4154 84 H L 41 52 Memory Address Input value 4151 10 4152 51 4153 51 4154 84 Same for Decrement: DCR r DCR M
  • 169. ANA r • Before Execution: A AA • After Execution of: ANA B A 0A B 0F B 0F CY AC CY AC 0 1 A  00000010 00000010 B  00000000 00001111 A 00000000 00000010 0 A
  • 170. ANA M • Before Execution: A AA • After Execution of: ANA 4150H A 0A Memory Address Input value 4150 0F 4151 51 4152 51 4153 84 Memory Address Input value 4150 0F 4151 20 4152 30 4153 40 CY AC CY AC 0 1
  • 171. ANI data(8) • Before Execution: A B3 • After Execution of: ANI 3F A 33 CY AC CY AC 0 1
  • 172. CMA • Before Execution: A BC • After Execution of: CMA A 43 D7 D6 D5 D4 D3 D2 D1 D0 1 0 1 1 1 1 0 0 D7 D6 D5 D4 D3 D2 D1 D0 0 1 0 0 0 0 1 1
  • 173. CMP r • A – r (Subtraction) • Before Execution: A B8 • After Execution of: CMP B CY Z CY Z 1 0 B B9 A B8 B B9 A<B
  • 174. Conditions for Compare instruction • If A less than (R/M), the CY flag is set and Zero flag is reset. • If A equals to (R/M), the Zero flag is set and CY flag is reset. • If A greater than (R/M), the CY and Zero flag are reset. Accumulator results after Subraction Carry Flag Zero Flag A < r,M 1 0 A = r,M 0 1 A > r.M 0 0
  • 175. Review and Rotate instruction • RAL (Rotate Accumulator Left with carry) • RLC (Rotate Accumulator Left) • RAR (Rotate Accumulator Right with Carry) • RRC (Rotate Accumulator Right)
  • 176. RAL
  • 177.
  • 179.
  • 180.
  • 181.
  • 182. Branching Instruction Flags Conditional Jump Conditional Call Conditional return Z = 0 (NOT ZERO) JNZ addr CNZ addr RNZ addr Z = 1 (ZERO) JZ CZ RZ CY = 0 (NO carry) JC CC RC CY = 1 (Carry) JNC CNC RNC P = 1 (Even parity) JPE CPE RPE P = 0 (Odd parity) JPO CPO RPO S = 0 (+ve) JP CP RP S = 1 (-ve) JM CM RM
  • 183. IO instruction • IN addr • OUT addr PORT 0F 10 A 25 IN 0F PORT 0F 10 A 10 PORT 0F 10 A FF OUT 0F PORT 0F FF A FF Inputting some value to MP from Input device Outputting some value from MP to Output device Before Execution After Execution
  • 184. Stack instruction • PUSH • POP 2000 2001 2002 PUSH D D E 10 50 2000 50 2001 10 2002 D E 10 50 SP 2002 SP 2000 Before Execution After Execution
  • 185. Machine Control • HLT • NOP • Interrupts – EI – DI – SIM – RIM
  • 186.
  • 187.
  • 188.
  • 189.
  • 190.
  • 191. Pros • The function of a Microprocessor is to conduct arithmetic and logic operations. • Microprocessors are used to perform complicated mathematical operations, like operating on the floating point numbers (rarely). • Microprocessor is that these are general purpose electronic processing devices which can be programmed to execute a number of tasks. • Microprocessor is its speed, which is measured in hertz. For instance, a microprocessor with 3 GHz, shortly GHz is capable of performing 3 billion tasks per second. • Microprocessor is that it can quickly move data between the various memory locations.
  • 192. Cons • The microprocessor has a limitation on the size of data. • Most of the microprocessor does not support floating point operations. • The main disadvantage is it’s over heating physically. • It should not contact with the other external devices. • The microprocessor is does not have any internal peripheral like ROM, RAM and other I/O devices.
  • 193. Last Topic in this Unit
  • 194. Microcontrollers • Support Devices – Timers – A/D converter – Serial I/O • Common communication lines – System Bus
  • 195.
  • 196.
  • 197.
  • 200.
  • 201. Features of 8051 microcontroller • 8-bit CPU • 16-bit Program Counter • 8-bit Processor Status Word (PSW) • 8-bit Stack Pointer • Internal RAM of 128bytes • Special Function Registers (SFRs) of 128 bytes • 32 I/O pins arranged as four 8-bit ports (P0 - P3) • Two 16-bit timer/counters : T0 and T1 • Two external and three internal vectored interrupts • One full duplex serial I/O • Microcontroller is designed in such a way that the microcontroller has all programs and data memory, counters and timers, interrupts, I/O ports are embedded on the chip
  • 207.
  • 208. 12 major components in MC • ALU • PC • Registers (R & B) • Timers & Counters • Internal ROM & RAM • Four general purpose parallel I/O ports • Interrupt control • Serial data communication • PSW • DPTR • SP • Data & Address bus
  • 209. General purpose parallel I/O ports • PORT P0 : No external memory. In the presence of external memory it acts as MUX AD bus. (Dual function). • PORT P1: Interfacing activities. NO dual function. • PORT P2: Similar to PORT P0, but acts as an address bus in presence of external memory. • PORT P3: Dedicated I/O port.
  • 210. Program Status Word (PSW) • 8-bit register (6 bits of it are used by the 8051 and D5 &D1 (2) user defined). • Also referred to as the flag register. • Four of the flags are called conditional flags, meaning that they indicate some conditions that result after an instruction is executed. These four are CY (carry), AC (auxiliary carry), P (parity), and OV (overflow).
  • 211. Conditional Flags CY (carry flag): • This flag is set whenever there is a carry out from the D. bit • This flag bit is affected after 8 bit addition or subtraction • It can also be set to 1 or 0 directly by an instruction such as " SET BC" and "CLRC" AC(Auxiliary flag): • If there is a carry from D3 to D4 during ADD or SUB operation this bit is set otherwise it is cleared • This flag is used by instruction that perform BCD (binary coded decimal) arithmetic. P (Parity flag): • The parity flag reflect the number of 1's in the A (accumulator) register only • If the A register contains an odd number of 1's then P=1 therefore P=0 if A has an even number 1's which is 0. As per our convenience, 1 –odd no & 0 – even no. OV (Overflow flag): • This flag is set whenever the result of a signed number operation is too large causing the high order bit to overflow into the sign bit. • The carry flag is used to detect error in unsigned arithmetic operations • The overflow flag is only used to detect error in signed arithmetic operations.
  • 212. Memories in 8051 Internal RAM: • Internal RAM has memory 128-byte. • Internal RAM is organized into three distinct areas: 32 bytes working registers from address 00h to 1Fh 16 bytes bit addressable occupies RAM byte address 20h to 2Fh, altogether 128 addressable bits General purpose RAM from 30h to 7Fh. Internal ROM: • Data memory and program code memory both are in different physical memory but both have the same addresses. • An internal ROM occupied addresses from 0000h to 0FFFh. PC addresses program codes from 0000h to 0FFFh. • Program addresses higher than 0FFFh that exceed the internal ROM capacity will cause 8051 architecture to fetch codes bytes from external program memory.
  • 214. The "R" Registers: • The "R" registers are a set of eight registers, namely, R0, R1 to R7. These registers function as auxiliary or temporary storage registers in many operations. The "B" Register • The "B" register is very similar to the Accumulator in the sense that it may hold an 8- bit (1-byte) value. • The "B" register is used only by two 8051 instructions: MUL AB and DIV AB. To quickly and easily multiply or divide A by another number, you may store the other number in "B" and make use of these two instructions.
  • 216. The Data Pointer (DPTR) • The Data Pointer (DPTR) is the 8051’s only user-accessible 16-bit (2-byte) register. • The Accumulator, R0–R7 registers and B register are 1-byte value registers. DPTR is meant for pointing to data. • It is used by the 8051 to access external memory using the address indicated by DPTR. • DPTR is the only 16-bit register available and is often used to store 2-byte values.
  • 217. Timers & Counters • Synchronization with clock pulses • XTAL1 & XTAL2 – Oscillator • EA – External enable – Holds 4Kb of program memory • ALE – latches the address signals on Port P0 • PSEN – Program store enable – Reads external program memory • RST – reset ports and registers upon start up.
  • 218. Register bank status in PSW • The bits PSW.3 and PSW.4 are designated as RSO and RS1, respectively, and are used to change the bank registers.
  • 219.
  • 220. Pin Configuration of 8051 • Pins 1 to 8 − These pins are known as Port 1. This port doesn’t serve any other functions. It is internally pulled up, bi- directional I/O port. • Pin 9 − It is a RESET pin, which is used to reset the microcontroller to its initial values. • Pins 10 to 17 − These pins are known as Port 3. This port serves some functions like interrupts, timer input, control signals, serial communication signals RXD and TXD, etc. • Pins 18 & 19 − These pins are used for interfacing an external crystal to get the system clock. • Pin 20 − This pin provides the power supply to the circuit.
  • 221. Pin Configuration of 8051 • Pins 21 to 28 − These pins are known as Port 2. It serves as I/O port. Higher order address bus signals are also multiplexed using this port. • Pin 29 − This is PSEN pin which stands for Program Store Enable. It is used to read a signal from the external program memory. • Pin 30 − This is EA pin which stands for External Access input. It is used to enable/disable the external memory interfacing. • Pin 31 − This is ALE pin which stands for Address Latch Enable. It is used to de-multiplex the address-data signal of port. • Pins 32 to 39 − These pins are known as Port 0. It serves as I/O port. Lower order address and data bus signals are multiplexed using this port. • Pin 40 − This pin is used to provide power supply to the circuit.
  • 222. Applications of 8051 Microcontroller • Energy Management: Competent measuring device systems aid in calculating energy consumption in domestic and industrialized applications. These meter systems are prepared competent by integrating microcontrollers. • Touch screens: A high degree of microcontroller suppliers integrate touch sensing abilities in their designs. Transportable devices such as media players, gaming devices & cell phones are some illustrations of micro-controller integrated with touch sensing screens.
  • 223. Applications of 8051 Microcontroller • Medical Devices: Handy medicinal gadgets such as glucose & blood pressure monitors bring into play micro-controllers, to put on view the measurements, as a result, offering higher dependability in giving correct medical results. • Automobiles: The microcontroller 8051 discovers broad recognition in supplying automobile solutions. They are extensively utilized in hybrid motor vehicles to control engine variations. In addition, works such as cruise power and anti- brake mechanism has created it more capable with the amalgamation of micro-controllers.