SlideShare a Scribd company logo
1 of 26
Raheescv
raheescv1992@gmail.com
www.facebook.com/raheescv
twitter.com/raheescv
in.linkedin.com/in/raheescv
09633155669
CPU & ITS EXECUTION OFINSTRUCTION
Disclaimer: This presentation is prepared by trainees of
baabtra as a part of mentoring program. This is not official
document of baabtra –Mentoring Partner
Baabtra-Mentoring Partner is the mentoring division of baabte System Technologies Pvt . Ltd
CPU
• central processing unit or processor
• This is the brain of the computer, it does all the processing
• The main purpose of a CPU is to execute instructions
• The CPU executes the binary representation of the instructions,
-i.e., machine code.
• programs are stored in memory (RAM)
STRUCTURE OF A CPU
ALU
• The ALU consists of circuits to perform arithmetic (+, -, ×, /)
and logical operations (<, ≤ >, ≥, and, or)
-Adder
-Multiplier
-Shifter
-Comparitor
-Etc…
• Operations in the ALU set status flags
like carry, overflow, positive, zero, negative, etc
• The output (result) of the computation (obtained by the ALU)
is often stored in a general purpose register
Control Unit
• The control unit is in charge of managing the fetch-execute
cycle
• It sends out control signals to all other devices
• A control signal indicates that the device should activate or
perform it’s function
• The control unit must communicate with both the
arithmetic/logic unit and memory.
System Bus
• System Bus connects the CPU to memory and I/O devices
• It is a collection of wires that carries electrical current
• There are 3 parts to a bus
1. THE DATA BUS :-
-sometimes called the memory bus
-for both data and program instructions
-handles the transfer of all data and instructions between functional
areas of the computer.
2. THE CONTROL BUS :-
-control signals from the Control Unit to devices, and feedback lines for
acknowledging that the devices are ready or for interrupting the CPU
3. ADDRESS BUS :-
-the address of the memory location or I/O device that is to perform the
given data movement operation
Registers
• Two kind of registers are there
1. User registers
2. Control registers
User registers
• These store data and addresses (pointers to data)
• These are manipulated by your program instructions
Example: Add R1, R2, R3
R1  R2 + R3
• Computers will have between
-1 and hundreds of registers
-Possibly divided into data and address registers
• Registers are usually the size of the computer’s word size
-32 or 64 bits today, previously it had been 8 or 16 bits
• Some machines use special-purpose registers
-each register has an implied usage
User registers (cntnd).
• Others have general-purpose registers
-A general purpose register is a memory cell.
-Each general purpose register has a unique name
-It is used to store intermediate result of complex computation
-use them any way you want to
Control registers
• Registers that store information used by the control unit to
perform the fetch-execute cycle
1. Program Counter (PC)
-the memory location of the next instruction
2. Instruction Register(IR)
-the current instruction being executed
-The CPU will perform the operation indicated by the instruction
code contained in the instruction register.
3. Status flags
- information about the results of the last instruction executed
eg:- “was there an overflow”,
“ was the result positive”,
“ zero or negative” ….. ? Etc)
4. Stack Pointer
– location in memory of the top of the run-time stack (used for
procedure calls and returns)
Control and status registers (cntnd)
5. Memory address registers (MAR):
-Contains the address of a location in memory.
-This register is used to access data and instructions from memory during the
execution of an instruction.
6. Memory buffer register (MBR):
- Contains a word of data to be written to memory or the word most recently
read.
-It is the register that contains the data to be stored in the computer storage or
data after a fetch from the computer storage.
-It acts like a buffer and holds anything that is copied from the memory ready for
the processor to use it,
Types of instruction
• All existing computers (CPU) execute the following 3 types
of instructions:
• Arithmetic and logic operations :-
• (+ , - , / , * , AND, OR ,NOT)
• The result of an arithmetic and logic operation is often stored
in a general purpose register
• Memory transfer operations
• Transfer the content from some specific memory location to a
specific register (memory cell) in the CPU.
• and vice versa (transfer the content from some specific register
(memory cell) in the CPU to some specific memory location).
Types of instruction Cntnd.
• Branch operations :-
•A branch instruction will cause the CPU to branch (jump) to the specified
location in memory
• After the jump has occurred, the CPU will continue to execute the
instructions in sequence, until another branch/jump instruction is
encountered
• There are 2 kinds of branch operations:
1.A unconditional branch instruction will always cause the CPU to jump
to the target location
2.A conditional branch instruction will only cause the CPU to jump to the
target location when the specified condition is met
Instruction execution cycle
• The following is a summary of the 4 steps used to execute a
single instruction
• Fetch the instruction
• Decode the instruction
• Execute the instruction
• Store the instruction
Fetch the instruction
1. Load the address of next instruction in the PC into the MAR.
– So that the control unit can fetch the instruction from the right part
of the memory.
2. Copy the instruction/data that is in the memory address
given by the MAR into the MDR.
– MDR is used whenever anything is to go from the CPU to main
memory, or vice versa.
3. Increment the PC by 1.
– So that it contains the address of the next instruction, assuming that
the instructions are in consecutive locations.
4. Load the instruction/data that is now in the MDR into the IR.
– Thus the next instruction is copied from memory -> MDR -> IR.
DECODE
1. Contents of IR split into operation code and
address if present e.g. store, add or jump
instructions.
2. Decode the instruction that is in the IR
EXECUTE
• If the instruction is a jump instruction then
– Load the address part of the instruction in the IR into the PC.
• If the instruction is an input / load (directly) instruction then
take data input and place in accumulator.
• If the instruction is a load (from memory) instruction.
– Copy address part of the instruction (to load from) in the IR into MAR.
– Copy data from memory address held in MAR to MDR.
– Copy data in MDR into accumulator
Execute contd
• If the instruction is a store instruction then:
– Copy address part of the instruction (to store in) in the IR into MAR.
– Copy data in accumulator to MDR.
– Copy data in MDR into memory address held in MAR.
• If the instruction is an add instruction then:
– Copy address part of the instruction (of number to add) in the IR
into MAR.
– Copy number from memory address held in MAR into MDR.
– Add number in MDR to number in accumulator (accumulator will
now hold the result).
Execute contd
• If the instruction is an output (from memory) instruction
then:
– Copy address part of the instruction (of data to output) in IR into
MAR.
– Output contents of MDR.
Store the output
• Result of calculations in cpu stored in main
memory or sent to output devices.
• program Counter could be updated to a new
address
THANK YOU 
Want to learn more about programming or Looking to become a good programmer?
Are you wasting time on searching so many contents online?
Do you want to learn things quickly?
Tired of spending huge amount of money to become a Software professional?
Do an online course
@ baabtra.com
We put industry standards to practice. Our structured, activity based courses are so designed
to make a quick, good software professional out of anybody who holds a passion for coding.
Follow us @ twitter.com/baabtra
Like us @ facebook.com/baabtra
Subscribe to us @ youtube.com/baabtra
Become a follower @ slideshare.net/BaabtraMentoringPartner
Connect to us @ in.linkedin.com/in/baabtra
Give a feedback @ massbaab.com/baabtra
Thanks in advance
www.baabtra.com | www.massbaab.com |www.baabte.com
Emarald Mall (Big Bazar Building)
Mavoor Road, Kozhikode,
Kerala, India.
Ph: + 91 – 495 40 25 550
NC Complex, Near Bus Stand
Mukkam, Kozhikode,
Kerala, India.
Ph: + 91 – 495 40 25 550
Cafit Square,
Hilite Business Park,
Near Pantheerankavu,
Kozhikode
Start up Village
Eranakulam,
Kerala, India.
Email: info@baabtra.com
Contact Us

More Related Content

What's hot

Part I:Introduction to assembly language
Part I:Introduction to assembly languagePart I:Introduction to assembly language
Part I:Introduction to assembly language
Ahmed M. Abed
 
Computer instructions
Computer instructionsComputer instructions
Computer instructions
Anuj Modi
 
6 multiprogramming & time sharing
6 multiprogramming & time sharing6 multiprogramming & time sharing
6 multiprogramming & time sharing
myrajendra
 

What's hot (20)

Computer arithmetic
Computer arithmeticComputer arithmetic
Computer arithmetic
 
Part I:Introduction to assembly language
Part I:Introduction to assembly languagePart I:Introduction to assembly language
Part I:Introduction to assembly language
 
Architecture of 8085 microprocessor
Architecture of 8085 microprocessorArchitecture of 8085 microprocessor
Architecture of 8085 microprocessor
 
Computer Architecture and organization ppt.
Computer Architecture and organization ppt.Computer Architecture and organization ppt.
Computer Architecture and organization ppt.
 
Instruction set and instruction execution cycle
Instruction set and instruction execution cycleInstruction set and instruction execution cycle
Instruction set and instruction execution cycle
 
Interrupts and types of interrupts
Interrupts and types of interruptsInterrupts and types of interrupts
Interrupts and types of interrupts
 
Asynchronous data transfer
Asynchronous  data  transferAsynchronous  data  transfer
Asynchronous data transfer
 
Computer architecture input output organization
Computer architecture input output organizationComputer architecture input output organization
Computer architecture input output organization
 
Interrupts in 8051
Interrupts in 8051Interrupts in 8051
Interrupts in 8051
 
memory reference instruction
memory reference instructionmemory reference instruction
memory reference instruction
 
Introduction to 8085 microprocessor
Introduction to 8085 microprocessorIntroduction to 8085 microprocessor
Introduction to 8085 microprocessor
 
Dma
DmaDma
Dma
 
RECURSION IN C
RECURSION IN C RECURSION IN C
RECURSION IN C
 
Logic simplification sop and pos forms
Logic simplification sop and pos formsLogic simplification sop and pos forms
Logic simplification sop and pos forms
 
Addressing modes
Addressing modesAddressing modes
Addressing modes
 
Computer instructions
Computer instructionsComputer instructions
Computer instructions
 
Direct Memory Access(DMA)
Direct Memory Access(DMA)Direct Memory Access(DMA)
Direct Memory Access(DMA)
 
Computer Organization and Architecture.
Computer Organization and Architecture.Computer Organization and Architecture.
Computer Organization and Architecture.
 
6 multiprogramming & time sharing
6 multiprogramming & time sharing6 multiprogramming & time sharing
6 multiprogramming & time sharing
 
Presentation on pointer.
Presentation on pointer.Presentation on pointer.
Presentation on pointer.
 

Similar to Cpu & its execution of instruction

Memory & the fetch decode-execute cycle
Memory & the fetch decode-execute cycleMemory & the fetch decode-execute cycle
Memory & the fetch decode-execute cycle
chantellemallia
 

Similar to Cpu & its execution of instruction (20)

Cpu and its execution statements
Cpu and its execution statementsCpu and its execution statements
Cpu and its execution statements
 
CPU and its execution of instruction
CPU and its execution of instructionCPU and its execution of instruction
CPU and its execution of instruction
 
CAO.pptx
CAO.pptxCAO.pptx
CAO.pptx
 
Computer Organisation & Architecture (chapter 1)
Computer Organisation & Architecture (chapter 1) Computer Organisation & Architecture (chapter 1)
Computer Organisation & Architecture (chapter 1)
 
Computer Organization and Architechuture basics
Computer Organization and Architechuture basicsComputer Organization and Architechuture basics
Computer Organization and Architechuture basics
 
Memory & the fetch decode-execute cycle
Memory & the fetch decode-execute cycleMemory & the fetch decode-execute cycle
Memory & the fetch decode-execute cycle
 
Unit 1 processormemoryorganisation
Unit 1 processormemoryorganisationUnit 1 processormemoryorganisation
Unit 1 processormemoryorganisation
 
Unit 2 processor&amp;memory-organisation
Unit 2 processor&amp;memory-organisationUnit 2 processor&amp;memory-organisation
Unit 2 processor&amp;memory-organisation
 
Chap 3 CA.pptx
Chap 3 CA.pptxChap 3 CA.pptx
Chap 3 CA.pptx
 
Co module 1 2019 20-converted
Co module 1 2019 20-convertedCo module 1 2019 20-converted
Co module 1 2019 20-converted
 
Central processing unit i
Central processing unit iCentral processing unit i
Central processing unit i
 
HHCJ AMUMARA:COMPUTER STUDIES LECTURE NOTE FOR SS3:005
HHCJ AMUMARA:COMPUTER STUDIES LECTURE NOTE FOR SS3:005HHCJ AMUMARA:COMPUTER STUDIES LECTURE NOTE FOR SS3:005
HHCJ AMUMARA:COMPUTER STUDIES LECTURE NOTE FOR SS3:005
 
HHCJ AMUMARA:COMPUTER STUDIES LECTURE NOTE FOR SS1:002
HHCJ AMUMARA:COMPUTER STUDIES LECTURE NOTE FOR SS1:002HHCJ AMUMARA:COMPUTER STUDIES LECTURE NOTE FOR SS1:002
HHCJ AMUMARA:COMPUTER STUDIES LECTURE NOTE FOR SS1:002
 
Computer Architecture | Computer Fundamental and Organization
Computer Architecture | Computer Fundamental and OrganizationComputer Architecture | Computer Fundamental and Organization
Computer Architecture | Computer Fundamental and Organization
 
Chapter01 (1).ppt
Chapter01 (1).pptChapter01 (1).ppt
Chapter01 (1).ppt
 
cpuorganisation-140723043011-phpapp02.pdf
cpuorganisation-140723043011-phpapp02.pdfcpuorganisation-140723043011-phpapp02.pdf
cpuorganisation-140723043011-phpapp02.pdf
 
Cpu
CpuCpu
Cpu
 
Cpu organisation
Cpu organisationCpu organisation
Cpu organisation
 
Cpu organisation
Cpu organisationCpu organisation
Cpu organisation
 
CPU.ppd
CPU.ppdCPU.ppd
CPU.ppd
 

More from baabtra.com - No. 1 supplier of quality freshers

More from baabtra.com - No. 1 supplier of quality freshers (20)

Agile methodology and scrum development
Agile methodology and scrum developmentAgile methodology and scrum development
Agile methodology and scrum development
 
Best coding practices
Best coding practicesBest coding practices
Best coding practices
 
Core java - baabtra
Core java - baabtraCore java - baabtra
Core java - baabtra
 
Acquiring new skills what you should know
Acquiring new skills   what you should knowAcquiring new skills   what you should know
Acquiring new skills what you should know
 
Baabtra.com programming at school
Baabtra.com programming at schoolBaabtra.com programming at school
Baabtra.com programming at school
 
99LMS for Enterprises - LMS that you will love
99LMS for Enterprises - LMS that you will love 99LMS for Enterprises - LMS that you will love
99LMS for Enterprises - LMS that you will love
 
Php sessions & cookies
Php sessions & cookiesPhp sessions & cookies
Php sessions & cookies
 
Php database connectivity
Php database connectivityPhp database connectivity
Php database connectivity
 
Chapter 6 database normalisation
Chapter 6  database normalisationChapter 6  database normalisation
Chapter 6 database normalisation
 
Chapter 5 transactions and dcl statements
Chapter 5  transactions and dcl statementsChapter 5  transactions and dcl statements
Chapter 5 transactions and dcl statements
 
Chapter 4 functions, views, indexing
Chapter 4  functions, views, indexingChapter 4  functions, views, indexing
Chapter 4 functions, views, indexing
 
Chapter 3 stored procedures
Chapter 3 stored proceduresChapter 3 stored procedures
Chapter 3 stored procedures
 
Chapter 2 grouping,scalar and aggergate functions,joins inner join,outer join
Chapter 2  grouping,scalar and aggergate functions,joins   inner join,outer joinChapter 2  grouping,scalar and aggergate functions,joins   inner join,outer join
Chapter 2 grouping,scalar and aggergate functions,joins inner join,outer join
 
Chapter 1 introduction to sql server
Chapter 1 introduction to sql serverChapter 1 introduction to sql server
Chapter 1 introduction to sql server
 
Chapter 1 introduction to sql server
Chapter 1 introduction to sql serverChapter 1 introduction to sql server
Chapter 1 introduction to sql server
 
Microsoft holo lens
Microsoft holo lensMicrosoft holo lens
Microsoft holo lens
 
Blue brain
Blue brainBlue brain
Blue brain
 
5g
5g5g
5g
 
Aptitude skills baabtra
Aptitude skills baabtraAptitude skills baabtra
Aptitude skills baabtra
 
Gd baabtra
Gd baabtraGd baabtra
Gd baabtra
 

Recently uploaded

Why Teams call analytics are critical to your entire business
Why Teams call analytics are critical to your entire businessWhy Teams call analytics are critical to your entire business
Why Teams call analytics are critical to your entire business
panagenda
 
+971581248768>> SAFE AND ORIGINAL ABORTION PILLS FOR SALE IN DUBAI AND ABUDHA...
+971581248768>> SAFE AND ORIGINAL ABORTION PILLS FOR SALE IN DUBAI AND ABUDHA...+971581248768>> SAFE AND ORIGINAL ABORTION PILLS FOR SALE IN DUBAI AND ABUDHA...
+971581248768>> SAFE AND ORIGINAL ABORTION PILLS FOR SALE IN DUBAI AND ABUDHA...
?#DUbAI#??##{{(☎️+971_581248768%)**%*]'#abortion pills for sale in dubai@
 
Architecting Cloud Native Applications
Architecting Cloud Native ApplicationsArchitecting Cloud Native Applications
Architecting Cloud Native Applications
WSO2
 

Recently uploaded (20)

Strategies for Unlocking Knowledge Management in Microsoft 365 in the Copilot...
Strategies for Unlocking Knowledge Management in Microsoft 365 in the Copilot...Strategies for Unlocking Knowledge Management in Microsoft 365 in the Copilot...
Strategies for Unlocking Knowledge Management in Microsoft 365 in the Copilot...
 
Apidays New York 2024 - The Good, the Bad and the Governed by David O'Neill, ...
Apidays New York 2024 - The Good, the Bad and the Governed by David O'Neill, ...Apidays New York 2024 - The Good, the Bad and the Governed by David O'Neill, ...
Apidays New York 2024 - The Good, the Bad and the Governed by David O'Neill, ...
 
Data Cloud, More than a CDP by Matt Robison
Data Cloud, More than a CDP by Matt RobisonData Cloud, More than a CDP by Matt Robison
Data Cloud, More than a CDP by Matt Robison
 
Axa Assurance Maroc - Insurer Innovation Award 2024
Axa Assurance Maroc - Insurer Innovation Award 2024Axa Assurance Maroc - Insurer Innovation Award 2024
Axa Assurance Maroc - Insurer Innovation Award 2024
 
Why Teams call analytics are critical to your entire business
Why Teams call analytics are critical to your entire businessWhy Teams call analytics are critical to your entire business
Why Teams call analytics are critical to your entire business
 
MINDCTI Revenue Release Quarter One 2024
MINDCTI Revenue Release Quarter One 2024MINDCTI Revenue Release Quarter One 2024
MINDCTI Revenue Release Quarter One 2024
 
"I see eyes in my soup": How Delivery Hero implemented the safety system for ...
"I see eyes in my soup": How Delivery Hero implemented the safety system for ..."I see eyes in my soup": How Delivery Hero implemented the safety system for ...
"I see eyes in my soup": How Delivery Hero implemented the safety system for ...
 
DBX First Quarter 2024 Investor Presentation
DBX First Quarter 2024 Investor PresentationDBX First Quarter 2024 Investor Presentation
DBX First Quarter 2024 Investor Presentation
 
Apidays Singapore 2024 - Scalable LLM APIs for AI and Generative AI Applicati...
Apidays Singapore 2024 - Scalable LLM APIs for AI and Generative AI Applicati...Apidays Singapore 2024 - Scalable LLM APIs for AI and Generative AI Applicati...
Apidays Singapore 2024 - Scalable LLM APIs for AI and Generative AI Applicati...
 
2024: Domino Containers - The Next Step. News from the Domino Container commu...
2024: Domino Containers - The Next Step. News from the Domino Container commu...2024: Domino Containers - The Next Step. News from the Domino Container commu...
2024: Domino Containers - The Next Step. News from the Domino Container commu...
 
Apidays New York 2024 - The value of a flexible API Management solution for O...
Apidays New York 2024 - The value of a flexible API Management solution for O...Apidays New York 2024 - The value of a flexible API Management solution for O...
Apidays New York 2024 - The value of a flexible API Management solution for O...
 
Emergent Methods: Multi-lingual narrative tracking in the news - real-time ex...
Emergent Methods: Multi-lingual narrative tracking in the news - real-time ex...Emergent Methods: Multi-lingual narrative tracking in the news - real-time ex...
Emergent Methods: Multi-lingual narrative tracking in the news - real-time ex...
 
Powerful Google developer tools for immediate impact! (2023-24 C)
Powerful Google developer tools for immediate impact! (2023-24 C)Powerful Google developer tools for immediate impact! (2023-24 C)
Powerful Google developer tools for immediate impact! (2023-24 C)
 
Exploring the Future Potential of AI-Enabled Smartphone Processors
Exploring the Future Potential of AI-Enabled Smartphone ProcessorsExploring the Future Potential of AI-Enabled Smartphone Processors
Exploring the Future Potential of AI-Enabled Smartphone Processors
 
+971581248768>> SAFE AND ORIGINAL ABORTION PILLS FOR SALE IN DUBAI AND ABUDHA...
+971581248768>> SAFE AND ORIGINAL ABORTION PILLS FOR SALE IN DUBAI AND ABUDHA...+971581248768>> SAFE AND ORIGINAL ABORTION PILLS FOR SALE IN DUBAI AND ABUDHA...
+971581248768>> SAFE AND ORIGINAL ABORTION PILLS FOR SALE IN DUBAI AND ABUDHA...
 
AXA XL - Insurer Innovation Award Americas 2024
AXA XL - Insurer Innovation Award Americas 2024AXA XL - Insurer Innovation Award Americas 2024
AXA XL - Insurer Innovation Award Americas 2024
 
A Beginners Guide to Building a RAG App Using Open Source Milvus
A Beginners Guide to Building a RAG App Using Open Source MilvusA Beginners Guide to Building a RAG App Using Open Source Milvus
A Beginners Guide to Building a RAG App Using Open Source Milvus
 
Architecting Cloud Native Applications
Architecting Cloud Native ApplicationsArchitecting Cloud Native Applications
Architecting Cloud Native Applications
 
How to Troubleshoot Apps for the Modern Connected Worker
How to Troubleshoot Apps for the Modern Connected WorkerHow to Troubleshoot Apps for the Modern Connected Worker
How to Troubleshoot Apps for the Modern Connected Worker
 
FWD Group - Insurer Innovation Award 2024
FWD Group - Insurer Innovation Award 2024FWD Group - Insurer Innovation Award 2024
FWD Group - Insurer Innovation Award 2024
 

Cpu & its execution of instruction

  • 1.
  • 3. Disclaimer: This presentation is prepared by trainees of baabtra as a part of mentoring program. This is not official document of baabtra –Mentoring Partner Baabtra-Mentoring Partner is the mentoring division of baabte System Technologies Pvt . Ltd
  • 4. CPU • central processing unit or processor • This is the brain of the computer, it does all the processing • The main purpose of a CPU is to execute instructions • The CPU executes the binary representation of the instructions, -i.e., machine code. • programs are stored in memory (RAM)
  • 6. ALU • The ALU consists of circuits to perform arithmetic (+, -, ×, /) and logical operations (<, ≤ >, ≥, and, or) -Adder -Multiplier -Shifter -Comparitor -Etc… • Operations in the ALU set status flags like carry, overflow, positive, zero, negative, etc • The output (result) of the computation (obtained by the ALU) is often stored in a general purpose register
  • 7. Control Unit • The control unit is in charge of managing the fetch-execute cycle • It sends out control signals to all other devices • A control signal indicates that the device should activate or perform it’s function • The control unit must communicate with both the arithmetic/logic unit and memory.
  • 8. System Bus • System Bus connects the CPU to memory and I/O devices • It is a collection of wires that carries electrical current • There are 3 parts to a bus 1. THE DATA BUS :- -sometimes called the memory bus -for both data and program instructions -handles the transfer of all data and instructions between functional areas of the computer. 2. THE CONTROL BUS :- -control signals from the Control Unit to devices, and feedback lines for acknowledging that the devices are ready or for interrupting the CPU 3. ADDRESS BUS :- -the address of the memory location or I/O device that is to perform the given data movement operation
  • 9. Registers • Two kind of registers are there 1. User registers 2. Control registers
  • 10. User registers • These store data and addresses (pointers to data) • These are manipulated by your program instructions Example: Add R1, R2, R3 R1  R2 + R3 • Computers will have between -1 and hundreds of registers -Possibly divided into data and address registers • Registers are usually the size of the computer’s word size -32 or 64 bits today, previously it had been 8 or 16 bits • Some machines use special-purpose registers -each register has an implied usage
  • 11. User registers (cntnd). • Others have general-purpose registers -A general purpose register is a memory cell. -Each general purpose register has a unique name -It is used to store intermediate result of complex computation -use them any way you want to
  • 12. Control registers • Registers that store information used by the control unit to perform the fetch-execute cycle 1. Program Counter (PC) -the memory location of the next instruction 2. Instruction Register(IR) -the current instruction being executed -The CPU will perform the operation indicated by the instruction code contained in the instruction register. 3. Status flags - information about the results of the last instruction executed eg:- “was there an overflow”, “ was the result positive”, “ zero or negative” ….. ? Etc) 4. Stack Pointer – location in memory of the top of the run-time stack (used for procedure calls and returns)
  • 13. Control and status registers (cntnd) 5. Memory address registers (MAR): -Contains the address of a location in memory. -This register is used to access data and instructions from memory during the execution of an instruction. 6. Memory buffer register (MBR): - Contains a word of data to be written to memory or the word most recently read. -It is the register that contains the data to be stored in the computer storage or data after a fetch from the computer storage. -It acts like a buffer and holds anything that is copied from the memory ready for the processor to use it,
  • 14. Types of instruction • All existing computers (CPU) execute the following 3 types of instructions: • Arithmetic and logic operations :- • (+ , - , / , * , AND, OR ,NOT) • The result of an arithmetic and logic operation is often stored in a general purpose register • Memory transfer operations • Transfer the content from some specific memory location to a specific register (memory cell) in the CPU. • and vice versa (transfer the content from some specific register (memory cell) in the CPU to some specific memory location).
  • 15. Types of instruction Cntnd. • Branch operations :- •A branch instruction will cause the CPU to branch (jump) to the specified location in memory • After the jump has occurred, the CPU will continue to execute the instructions in sequence, until another branch/jump instruction is encountered • There are 2 kinds of branch operations: 1.A unconditional branch instruction will always cause the CPU to jump to the target location 2.A conditional branch instruction will only cause the CPU to jump to the target location when the specified condition is met
  • 16. Instruction execution cycle • The following is a summary of the 4 steps used to execute a single instruction • Fetch the instruction • Decode the instruction • Execute the instruction • Store the instruction
  • 17. Fetch the instruction 1. Load the address of next instruction in the PC into the MAR. – So that the control unit can fetch the instruction from the right part of the memory. 2. Copy the instruction/data that is in the memory address given by the MAR into the MDR. – MDR is used whenever anything is to go from the CPU to main memory, or vice versa. 3. Increment the PC by 1. – So that it contains the address of the next instruction, assuming that the instructions are in consecutive locations. 4. Load the instruction/data that is now in the MDR into the IR. – Thus the next instruction is copied from memory -> MDR -> IR.
  • 18. DECODE 1. Contents of IR split into operation code and address if present e.g. store, add or jump instructions. 2. Decode the instruction that is in the IR
  • 19. EXECUTE • If the instruction is a jump instruction then – Load the address part of the instruction in the IR into the PC. • If the instruction is an input / load (directly) instruction then take data input and place in accumulator. • If the instruction is a load (from memory) instruction. – Copy address part of the instruction (to load from) in the IR into MAR. – Copy data from memory address held in MAR to MDR. – Copy data in MDR into accumulator
  • 20. Execute contd • If the instruction is a store instruction then: – Copy address part of the instruction (to store in) in the IR into MAR. – Copy data in accumulator to MDR. – Copy data in MDR into memory address held in MAR. • If the instruction is an add instruction then: – Copy address part of the instruction (of number to add) in the IR into MAR. – Copy number from memory address held in MAR into MDR. – Add number in MDR to number in accumulator (accumulator will now hold the result).
  • 21. Execute contd • If the instruction is an output (from memory) instruction then: – Copy address part of the instruction (of data to output) in IR into MAR. – Output contents of MDR.
  • 22. Store the output • Result of calculations in cpu stored in main memory or sent to output devices. • program Counter could be updated to a new address
  • 24. Want to learn more about programming or Looking to become a good programmer? Are you wasting time on searching so many contents online? Do you want to learn things quickly? Tired of spending huge amount of money to become a Software professional? Do an online course @ baabtra.com We put industry standards to practice. Our structured, activity based courses are so designed to make a quick, good software professional out of anybody who holds a passion for coding.
  • 25. Follow us @ twitter.com/baabtra Like us @ facebook.com/baabtra Subscribe to us @ youtube.com/baabtra Become a follower @ slideshare.net/BaabtraMentoringPartner Connect to us @ in.linkedin.com/in/baabtra Give a feedback @ massbaab.com/baabtra Thanks in advance www.baabtra.com | www.massbaab.com |www.baabte.com
  • 26. Emarald Mall (Big Bazar Building) Mavoor Road, Kozhikode, Kerala, India. Ph: + 91 – 495 40 25 550 NC Complex, Near Bus Stand Mukkam, Kozhikode, Kerala, India. Ph: + 91 – 495 40 25 550 Cafit Square, Hilite Business Park, Near Pantheerankavu, Kozhikode Start up Village Eranakulam, Kerala, India. Email: info@baabtra.com Contact Us