SlideShare ist ein Scribd-Unternehmen logo
1 von 7
Downloaden Sie, um offline zu lesen
www.jntuworld.com                                                                                         www.jwjobs.net




                Code No. M0523                    R07                                    Set No.1
                             IV B.Tech I Semester Supplementary Examinations, February, 2012
                                 ADVANCED COMPUTER ARCHITECTURE
                                             (Computer Science and Engineering)
            Time: 3 hours                                                             Max. Marks: 80
                                                Answer any FIVE Questions
                                               All Questions carry equal marks
                                                            *****
               1. a) What are the rapidly changing technologies that may shape the design of a computer?
                  b) What are the major factors that influence the cost of a computer and how these factors
                      are changing over time?
                  c ) Define Amdahl’s law? How much speed can be enhanced by replacing the system
                      with a new processor that is 100 times faster than the old. Assume the original
                      processor is busy with computation 50% of the time and the remaining time is waiting
                      for I/O devices.



                                                                                   L D
               2. a) What are the data addressing modes that are considered to be very popular?


                                                                      R
                     Explain Auto increment and Auto decrement addressing with examples.
                  b) Name four important features where the register indirect jumps are useful.


                                                                    O
                  c) What is the impact of compiler technology on the computer architect’s decisions?




                                                 W
               3. What is the major hurdle of pipelining? How do they reduce the performance? What
                  are the techniques to be used to improve the performance?



                                               U
               4. What are the five primary approaches, in use, for multiple issue processors? Give the




                               N T
                  primary characteristics that distinguish them.

               5. a) What are the parameters used to describe the performance of cache? Explain.


                            J
                  b) Summarize the techniques used for cache optimizations and estimate the impact on
                     the parameters that characterizes its performance.

               6. a) What is multiprocessor cache coherence?
                  b) What are the limitations in symmetric shared multiprocessors?
                  c) Explain the basic synchronization mechanism for multi processors.

               7. a) Give the different characteristics of transaction processing benchmarks for I/O
                     systems.
                  b) Describe cluster architecture.

               8. Write short notes on the following.
                         a) RAID and its performance
                         b) Practical issues in interconnection networks.

                                                           1 of 1



                                                  www.jntuworld.com
www.jntuworld.com                                                                                           www.jwjobs.net




                Code No. M0523                       R07                                   Set No.2
                                IV B.Tech I Semester Supplementary Examinations, February, 2012
                                   ADVANCED COMPUTER ARCHITECTURE
                                               (Computer Science and Engineering)
            Time: 3 hours                                                               Max. Marks: 80
                                                  Answer any FIVE Questions
                                                 All Questions carry equal marks
                                                              *****
               1 a) What are the relative improvements in bandwidth and latency in technology
                     milestones for microprocessors, memory, networks, and disks?
                  b) What is dependability? What are the factors that influence the system to be very
                     dependable?
                 c) What are the parameters that dictate the processor performance? Explain.

               2
                                                                                       D
                    a) How instruction set architectures are classified? Give their relative merits and
                       demerits?

                                                                                     L
                                                                      R
                    b) How to encode the addressing modes with operations? What are the factors to be
                       considered in decoding mechanism ?



                                                                    O
                    c) What are the guidelines that make the design of compiler to be easy and efficient?




                                                   W
               3 a) What are control hazards? How advanced branch production reduces the branch
                    costs?



                                                 U
                 b) What are limitations of instruction level parallelism?
                 c) What are the features of hardware based speculation to overcome the control
                    dependences?



                                 N T
               4 a) How VLIW approach improves the performance of pipelines?


                            J
                 b) Name three primary dynamic approaches, that are hardware based, for hazard
                    detection to instruction level parallelism? Give their primary characteristics. How
                    do you differentiate among them?

               5 How use of virtual machine has gained popularity? How the processes are protected
                 from each other through virtual machines?

               6 a) Differentiate between centralized shared memory multiprocessors and distributed
                    memory multiprocessors.
                 b) What is multi threading? How do you define thread level parallelism? How spin
                    locks be implemented using coherence mechanism?


                                                        1 of 2




                                                    www.jntuworld.com
www.jntuworld.com                                                                          www.jwjobs.net




                Code No. M0523                    R07                           Set No.2

               7 a) How an I/O system is designed and evaluated?
                 b) Discuss performance issues related to I/O systems.

               8 Write short notes on the following.
                         a) Hardware multithreading and its performance.
                         b) Role of compiler in encoding an instruction set.




                                                                               L D
                                                                  O R
                                               U W
                               N T
                         J
                                                        2 of 2




                                                 www.jntuworld.com
www.jntuworld.com                                                                                            www.jwjobs.net




                Code No. M0523                    R07                                   Set No.3
                             IV B.Tech I Semester Supplementary Examinations, February, 2012
                                 ADVANCED COMPUTER ARCHITECTURE
                                             (Computer Science and Engineering)
            Time: 3 hours                                                             Max. Marks: 80
                                                Answer any FIVE Questions
                                               All Questions carry equal marks
                                                            *****
               1. a) Describe the performance milestones of microprocessors, memory, networks and
                     disks.
                  b) How the performance of a system can be measured and reported?
                  c) How speed up can be achieved by making an enhancement to a computer?




                                                                                     D
               2. a) Explain the displacement addressing mode with an example and give its usefulness.
                  b) What are the major methods for evaluating branch conditions? Give three advantages
                     and disadvantages.

                                                                                   L
                                                                    R
                  c) What are the optimizations that can be performed by modern compilers ?




                                                                  O
               3. a) What are data hazards that are noticed in instructing level parallelism? Explain dynamic
                      scheduling for overcoming these hazards.



                                                 W
                  b) How high performance instruction delivery without hazards, is possible in instruction
                     level parallelism?




                                 T             U
               4. a) Explain static branch prediction? What is the advantage of using this?
                  b) What are the relative merits and demerits of adapting software and hardware supports
                     for improving the performance of pipelines?




                            J  N
               5. a) What are the causes for high miss rates in cache organization? What are the six basic
                     cache optimizations?
                  b) How architecture supports for protecting processes from each other via virtual
                      memory?

               6. a) Describe Flynn classification of parallel architectures.
                  b) What is multi threading? How does it improve the performance of multiprocessors?
                  c) What is cache coherence? Name the methods used to take care of coherence problems.




                                                        1 of 2




                                                 www.jntuworld.com
www.jntuworld.com                                                                                      www.jwjobs.net




                Code No. M0523                   R07                                   Set No.3

               7. a) Name any three I/O benchmarks along with their throughput metrics and time
                     restrictions.
                  b) How the performance and reliability of I/O systems are improved with the use of
                     RAID?

               8. Write short notes on the following.
                         a) Message passing multiprocessors.
                         b) Quantities measures for performance of computers.




                                                                                 L D
                                                                 O R
                                              U W
                               N T
                         J
                                                     2 of 2




                                                 www.jntuworld.com
www.jntuworld.com                                                                                          www.jwjobs.net




                Code No. M0523                    R07                                   Set No.4
                             IV B.Tech I Semester Supplementary Examinations, February, 2012
                                 ADVANCED COMPUTER ARCHITECTURE
                                             (Computer Science and Engineering)
            Time: 3 hours                                                            Max. Marks: 80
                                               Answer any FIVE Questions
                                              All Questions carry equal marks
                                                           *****
               1. a) What are trends in power in the integrated circuits for exploration of better
                     computing machines?
                  b) What are benchmarks? What is the role of benchmarks in measuring performance
                     of computer systems?
                  c) What are the guidelines and principles that are useful in the design and analysis
                      of computers?



                                                                                  L D
               2. a) What are the data addressing modes that are found to be very efficient for dealing
                     control flow instruction? Explain.




                                                                  O R
                  b) How instructions are encoded into a binary representation? Does this representation
                     has any bearing on the performance of the computer? What is the competing forces
                     when encoding a instruction set?




                                               U W
               3. a) What is a pipeline? What are data dependences and hazards? Explain
                  b) What are the key ideas of hardware based speculation? What is the purpose of
                     using recorder buffers?




                               N T
               4. a) Differentiate between software verses hardware solutions for hazard detection.
                  b) How the hardware support improves the instruction level parallelism at compiler
                     time?

                            J
               5. Name ten advanced optimizations of cache performance and explain each of the techniques.

               6. a) What are multiprocessors? How they are connected using an interconnection network?
                  b) Differentiate between instruction level parallelism and thread level parallelism.
                  c )What is synchronization? Why synchronization mechanism is needed for multiprocessor
                     systems?
                  d) What are the possible messages sent among the processors to maintain coherence in
                     multiprocessors?


                                                         1 of 2




                                                 www.jntuworld.com
www.jntuworld.com                                                                                         www.jwjobs.net




                Code No. M0523                     R07                                    Set No.4

               7. a) What is the general approach to design an I/O system?
                  b) What are the errors and types of failures that are usually noticed in I/O systems?
                  c) What are the practical issues in designing interconnection networks?

               8. Write short notes on
                         a) Designing a cluster.
                         b) Amdahl’s law and its limitations.




                                                                                    L D
                                                                   O R
                                               U W
                               N T
                         J
                                                         2 of 2




                                                  www.jntuworld.com

Weitere ähnliche Inhalte

Was ist angesagt?

Design & Simulation of RISC Processor using Hyper Pipelining Technique
Design & Simulation of RISC Processor using Hyper Pipelining TechniqueDesign & Simulation of RISC Processor using Hyper Pipelining Technique
Design & Simulation of RISC Processor using Hyper Pipelining TechniqueIOSR Journals
 
Computer organisation -morris mano
Computer organisation  -morris manoComputer organisation  -morris mano
Computer organisation -morris manovishnu murthy
 
Computer organiztion6
Computer organiztion6Computer organiztion6
Computer organiztion6Umang Gupta
 
RISC Vs CISC, Harvard v/s Van Neumann
RISC Vs CISC, Harvard v/s Van NeumannRISC Vs CISC, Harvard v/s Van Neumann
RISC Vs CISC, Harvard v/s Van NeumannRavikumar Tiwari
 
Hardware Software Codesign
Hardware Software CodesignHardware Software Codesign
Hardware Software Codesigndestruck
 
Instruction Level Parallelism Compiler optimization Techniques Anna Universit...
Instruction Level Parallelism Compiler optimization Techniques Anna Universit...Instruction Level Parallelism Compiler optimization Techniques Anna Universit...
Instruction Level Parallelism Compiler optimization Techniques Anna Universit...Dr.K. Thirunadana Sikamani
 
Computer architecture
Computer architectureComputer architecture
Computer architectureneclinux
 
introduction to computers
 introduction to computers introduction to computers
introduction to computersDeepak John
 
Central processing unit
Central processing unitCentral processing unit
Central processing unitKamal Acharya
 
Introducing Embedded Systems and the Microcontrollers
Introducing Embedded Systems and the MicrocontrollersIntroducing Embedded Systems and the Microcontrollers
Introducing Embedded Systems and the MicrocontrollersRavikumar Tiwari
 
Risc cisc Difference
Risc cisc DifferenceRisc cisc Difference
Risc cisc DifferenceSehrish Asif
 
Topic 5 Digital Technique basic computer structure
Topic 5 Digital Technique basic computer structureTopic 5 Digital Technique basic computer structure
Topic 5 Digital Technique basic computer structureBai Haqi
 
Computer organuzaton & architecture
Computer organuzaton & architectureComputer organuzaton & architecture
Computer organuzaton & architectureSubhankar Bisoyi
 
Instruction Set Architecture – II
Instruction Set Architecture – IIInstruction Set Architecture – II
Instruction Set Architecture – IIDilum Bandara
 
pipeline and vector processing
pipeline and vector processingpipeline and vector processing
pipeline and vector processingAcad
 

Was ist angesagt? (20)

21PSP13
21PSP1321PSP13
21PSP13
 
Computer architecture
Computer architectureComputer architecture
Computer architecture
 
Design & Simulation of RISC Processor using Hyper Pipelining Technique
Design & Simulation of RISC Processor using Hyper Pipelining TechniqueDesign & Simulation of RISC Processor using Hyper Pipelining Technique
Design & Simulation of RISC Processor using Hyper Pipelining Technique
 
Computer organisation -morris mano
Computer organisation  -morris manoComputer organisation  -morris mano
Computer organisation -morris mano
 
Computer organiztion6
Computer organiztion6Computer organiztion6
Computer organiztion6
 
RISC Vs CISC, Harvard v/s Van Neumann
RISC Vs CISC, Harvard v/s Van NeumannRISC Vs CISC, Harvard v/s Van Neumann
RISC Vs CISC, Harvard v/s Van Neumann
 
Hardware Software Codesign
Hardware Software CodesignHardware Software Codesign
Hardware Software Codesign
 
Instruction Level Parallelism Compiler optimization Techniques Anna Universit...
Instruction Level Parallelism Compiler optimization Techniques Anna Universit...Instruction Level Parallelism Compiler optimization Techniques Anna Universit...
Instruction Level Parallelism Compiler optimization Techniques Anna Universit...
 
Chapter03 number system
Chapter03   number systemChapter03   number system
Chapter03 number system
 
Computer architecture
Computer architectureComputer architecture
Computer architecture
 
introduction to computers
 introduction to computers introduction to computers
introduction to computers
 
Central processing unit
Central processing unitCentral processing unit
Central processing unit
 
Introducing Embedded Systems and the Microcontrollers
Introducing Embedded Systems and the MicrocontrollersIntroducing Embedded Systems and the Microcontrollers
Introducing Embedded Systems and the Microcontrollers
 
RISC AND CISC PROCESSOR
RISC AND CISC PROCESSORRISC AND CISC PROCESSOR
RISC AND CISC PROCESSOR
 
Risc cisc Difference
Risc cisc DifferenceRisc cisc Difference
Risc cisc Difference
 
Topic 5 Digital Technique basic computer structure
Topic 5 Digital Technique basic computer structureTopic 5 Digital Technique basic computer structure
Topic 5 Digital Technique basic computer structure
 
Computer organuzaton & architecture
Computer organuzaton & architectureComputer organuzaton & architecture
Computer organuzaton & architecture
 
Instruction Set Architecture – II
Instruction Set Architecture – IIInstruction Set Architecture – II
Instruction Set Architecture – II
 
pipeline and vector processing
pipeline and vector processingpipeline and vector processing
pipeline and vector processing
 
Lecture 46
Lecture 46Lecture 46
Lecture 46
 

Andere mochten auch

Lecture 1
Lecture 1Lecture 1
Lecture 1Mr SMAK
 
Computer architecture kai hwang
Computer architecture   kai hwangComputer architecture   kai hwang
Computer architecture kai hwangSumedha
 
Advanced computer architecture
Advanced computer architectureAdvanced computer architecture
Advanced computer architectureMd. Mahedi Mahfuj
 
Lecture 3
Lecture 3Lecture 3
Lecture 3Mr SMAK
 
Advanced Comuter Architecture Ch6 Problem Solutions
Advanced Comuter Architecture Ch6 Problem SolutionsAdvanced Comuter Architecture Ch6 Problem Solutions
Advanced Comuter Architecture Ch6 Problem SolutionsJoe Christensen
 
Advanced Computer Architecture chapter 5 problem solutions
Advanced Computer  Architecture  chapter 5 problem solutionsAdvanced Computer  Architecture  chapter 5 problem solutions
Advanced Computer Architecture chapter 5 problem solutionsJoe Christensen
 
Advanced Computer Architecture Chapter 123 Problems Solution
Advanced Computer Architecture Chapter 123 Problems SolutionAdvanced Computer Architecture Chapter 123 Problems Solution
Advanced Computer Architecture Chapter 123 Problems SolutionJoe Christensen
 
Computer Architecture – An Introduction
Computer Architecture – An IntroductionComputer Architecture – An Introduction
Computer Architecture – An IntroductionDilum Bandara
 
Presentation on flynn’s classification
Presentation on flynn’s classificationPresentation on flynn’s classification
Presentation on flynn’s classificationvani gupta
 
Computer architecture
Computer architectureComputer architecture
Computer architectureRishabha Garg
 
Multiprocessor Architecture for Image Processing
Multiprocessor Architecture for Image ProcessingMultiprocessor Architecture for Image Processing
Multiprocessor Architecture for Image Processingmayank.grd
 
Lecture24 Multiprocessor
Lecture24 MultiprocessorLecture24 Multiprocessor
Lecture24 Multiprocessorallankliu
 
SYNCHRONIZATION IN MULTIPROCESSING
SYNCHRONIZATION IN MULTIPROCESSINGSYNCHRONIZATION IN MULTIPROCESSING
SYNCHRONIZATION IN MULTIPROCESSINGAparna Bhadran
 
Memory technology and optimization in Advance Computer Architechture
Memory technology and optimization in Advance Computer ArchitechtureMemory technology and optimization in Advance Computer Architechture
Memory technology and optimization in Advance Computer ArchitechtureShweta Ghate
 
The Flynn Effect
The Flynn EffectThe Flynn Effect
The Flynn EffectBhatt83
 
Multithreading
MultithreadingMultithreading
Multithreadingsagsharma
 
Interconnection Network
Interconnection NetworkInterconnection Network
Interconnection NetworkAli A Jalil
 

Andere mochten auch (20)

Lecture 1
Lecture 1Lecture 1
Lecture 1
 
Computer architecture kai hwang
Computer architecture   kai hwangComputer architecture   kai hwang
Computer architecture kai hwang
 
Advanced computer architecture
Advanced computer architectureAdvanced computer architecture
Advanced computer architecture
 
Lecture 3
Lecture 3Lecture 3
Lecture 3
 
Advanced Comuter Architecture Ch6 Problem Solutions
Advanced Comuter Architecture Ch6 Problem SolutionsAdvanced Comuter Architecture Ch6 Problem Solutions
Advanced Comuter Architecture Ch6 Problem Solutions
 
Advanced Computer Architecture chapter 5 problem solutions
Advanced Computer  Architecture  chapter 5 problem solutionsAdvanced Computer  Architecture  chapter 5 problem solutions
Advanced Computer Architecture chapter 5 problem solutions
 
Advanced Computer Architecture Chapter 123 Problems Solution
Advanced Computer Architecture Chapter 123 Problems SolutionAdvanced Computer Architecture Chapter 123 Problems Solution
Advanced Computer Architecture Chapter 123 Problems Solution
 
Multiprocessor
MultiprocessorMultiprocessor
Multiprocessor
 
Computer Architecture – An Introduction
Computer Architecture – An IntroductionComputer Architecture – An Introduction
Computer Architecture – An Introduction
 
Presentation on flynn’s classification
Presentation on flynn’s classificationPresentation on flynn’s classification
Presentation on flynn’s classification
 
Computer architecture
Computer architectureComputer architecture
Computer architecture
 
Multiprocessor Architecture for Image Processing
Multiprocessor Architecture for Image ProcessingMultiprocessor Architecture for Image Processing
Multiprocessor Architecture for Image Processing
 
Lecture24 Multiprocessor
Lecture24 MultiprocessorLecture24 Multiprocessor
Lecture24 Multiprocessor
 
SYNCHRONIZATION IN MULTIPROCESSING
SYNCHRONIZATION IN MULTIPROCESSINGSYNCHRONIZATION IN MULTIPROCESSING
SYNCHRONIZATION IN MULTIPROCESSING
 
Aca2 09 new
Aca2 09 newAca2 09 new
Aca2 09 new
 
Memory technology and optimization in Advance Computer Architechture
Memory technology and optimization in Advance Computer ArchitechtureMemory technology and optimization in Advance Computer Architechture
Memory technology and optimization in Advance Computer Architechture
 
Aca2 10 11
Aca2 10 11Aca2 10 11
Aca2 10 11
 
The Flynn Effect
The Flynn EffectThe Flynn Effect
The Flynn Effect
 
Multithreading
MultithreadingMultithreading
Multithreading
 
Interconnection Network
Interconnection NetworkInterconnection Network
Interconnection Network
 

Ähnlich wie Advanced computer architecture

Computer Networks Jntu Model Paper{Www.Studentyogi.Com}
Computer Networks Jntu Model Paper{Www.Studentyogi.Com}Computer Networks Jntu Model Paper{Www.Studentyogi.Com}
Computer Networks Jntu Model Paper{Www.Studentyogi.Com}guest3f9c6b
 
C O M P U T E R N E T W O R K S J N T U M O D E L P A P E R{Www
C O M P U T E R  N E T W O R K S  J N T U  M O D E L  P A P E R{WwwC O M P U T E R  N E T W O R K S  J N T U  M O D E L  P A P E R{Www
C O M P U T E R N E T W O R K S J N T U M O D E L P A P E R{Wwwguest3f9c6b
 
Decision Support Systems Jntu Model Paper{Www.Studentyogi.Com}
Decision Support Systems Jntu Model Paper{Www.Studentyogi.Com}Decision Support Systems Jntu Model Paper{Www.Studentyogi.Com}
Decision Support Systems Jntu Model Paper{Www.Studentyogi.Com}guest3f9c6b
 
D E C I S I O N S U P P O R T S Y S T E M S J N T U M O D E L P A P E R{Www
D E C I S I O N  S U P P O R T  S Y S T E M S  J N T U  M O D E L  P A P E R{WwwD E C I S I O N  S U P P O R T  S Y S T E M S  J N T U  M O D E L  P A P E R{Www
D E C I S I O N S U P P O R T S Y S T E M S J N T U M O D E L P A P E R{Wwwguest3f9c6b
 
R09 advanced computer architecture
R09 advanced computer architectureR09 advanced computer architecture
R09 advanced computer architecturesriniefs
 
Data warehousing and data mining
Data warehousing and data miningData warehousing and data mining
Data warehousing and data miningvamsi krishna
 
Embedded Systems Jntu Model Paper{Www.Studentyogi.Com}
Embedded Systems Jntu Model Paper{Www.Studentyogi.Com}Embedded Systems Jntu Model Paper{Www.Studentyogi.Com}
Embedded Systems Jntu Model Paper{Www.Studentyogi.Com}guest3f9c6b
 
Embedded Systems Jntu Model Paper{Www.Studentyogi.Com}
Embedded Systems Jntu Model Paper{Www.Studentyogi.Com}Embedded Systems Jntu Model Paper{Www.Studentyogi.Com}
Embedded Systems Jntu Model Paper{Www.Studentyogi.Com}guest3f9c6b
 
BPSC Previous Year Question for AP, ANE, AME, ADA, AE
BPSC Previous Year Question for AP, ANE, AME, ADA, AE BPSC Previous Year Question for AP, ANE, AME, ADA, AE
BPSC Previous Year Question for AP, ANE, AME, ADA, AE Engr. Md. Jamal Uddin Rayhan
 
C L I E N T S E R V E R C O M P U T I N G J N T U M O D E L P A P E R{Www
C L I E N T   S E R V E R  C O M P U T I N G  J N T U  M O D E L  P A P E R{WwwC L I E N T   S E R V E R  C O M P U T I N G  J N T U  M O D E L  P A P E R{Www
C L I E N T S E R V E R C O M P U T I N G J N T U M O D E L P A P E R{Wwwguest3f9c6b
 
Client Server Computing Jntu Model Paper{Www.Studentyogi.Com}
Client  Server Computing Jntu Model Paper{Www.Studentyogi.Com}Client  Server Computing Jntu Model Paper{Www.Studentyogi.Com}
Client Server Computing Jntu Model Paper{Www.Studentyogi.Com}guest3f9c6b
 
Cs ep-sample jan2012-final
Cs ep-sample jan2012-finalCs ep-sample jan2012-final
Cs ep-sample jan2012-finalIrfaan Bahadoor
 
M E T R O L O G Y A N D Q U A L I T Y C O N T R O L J N T U M O D E L P A ...
M E T R O L O G Y A N D Q U A L I T Y C O N T R O L  J N T U  M O D E L  P A ...M E T R O L O G Y A N D Q U A L I T Y C O N T R O L  J N T U  M O D E L  P A ...
M E T R O L O G Y A N D Q U A L I T Y C O N T R O L J N T U M O D E L P A ...guest3f9c6b
 
Computer Programming Jntu Model Paper{Www.Studentyogi.Com}
Computer Programming Jntu Model Paper{Www.Studentyogi.Com}Computer Programming Jntu Model Paper{Www.Studentyogi.Com}
Computer Programming Jntu Model Paper{Www.Studentyogi.Com}guest3f9c6b
 
C O M P U T E R P R O G R A M M I N G J N T U M O D E L P A P E R{Www
C O M P U T E R  P R O G R A M M I N G  J N T U  M O D E L  P A P E R{WwwC O M P U T E R  P R O G R A M M I N G  J N T U  M O D E L  P A P E R{Www
C O M P U T E R P R O G R A M M I N G J N T U M O D E L P A P E R{Wwwguest3f9c6b
 

Ähnlich wie Advanced computer architecture (20)

Computer Networks Jntu Model Paper{Www.Studentyogi.Com}
Computer Networks Jntu Model Paper{Www.Studentyogi.Com}Computer Networks Jntu Model Paper{Www.Studentyogi.Com}
Computer Networks Jntu Model Paper{Www.Studentyogi.Com}
 
C O M P U T E R N E T W O R K S J N T U M O D E L P A P E R{Www
C O M P U T E R  N E T W O R K S  J N T U  M O D E L  P A P E R{WwwC O M P U T E R  N E T W O R K S  J N T U  M O D E L  P A P E R{Www
C O M P U T E R N E T W O R K S J N T U M O D E L P A P E R{Www
 
Embedded system
Embedded systemEmbedded system
Embedded system
 
Network programming
Network programmingNetwork programming
Network programming
 
Decision Support Systems Jntu Model Paper{Www.Studentyogi.Com}
Decision Support Systems Jntu Model Paper{Www.Studentyogi.Com}Decision Support Systems Jntu Model Paper{Www.Studentyogi.Com}
Decision Support Systems Jntu Model Paper{Www.Studentyogi.Com}
 
D E C I S I O N S U P P O R T S Y S T E M S J N T U M O D E L P A P E R{Www
D E C I S I O N  S U P P O R T  S Y S T E M S  J N T U  M O D E L  P A P E R{WwwD E C I S I O N  S U P P O R T  S Y S T E M S  J N T U  M O D E L  P A P E R{Www
D E C I S I O N S U P P O R T S Y S T E M S J N T U M O D E L P A P E R{Www
 
R09 advanced computer architecture
R09 advanced computer architectureR09 advanced computer architecture
R09 advanced computer architecture
 
Data warehousing and data mining
Data warehousing and data miningData warehousing and data mining
Data warehousing and data mining
 
Higher Homework
Higher HomeworkHigher Homework
Higher Homework
 
Mobile computing
Mobile computingMobile computing
Mobile computing
 
Embedded Systems Jntu Model Paper{Www.Studentyogi.Com}
Embedded Systems Jntu Model Paper{Www.Studentyogi.Com}Embedded Systems Jntu Model Paper{Www.Studentyogi.Com}
Embedded Systems Jntu Model Paper{Www.Studentyogi.Com}
 
Embedded Systems Jntu Model Paper{Www.Studentyogi.Com}
Embedded Systems Jntu Model Paper{Www.Studentyogi.Com}Embedded Systems Jntu Model Paper{Www.Studentyogi.Com}
Embedded Systems Jntu Model Paper{Www.Studentyogi.Com}
 
BPSC Previous Year Question for AP, ANE, AME, ADA, AE
BPSC Previous Year Question for AP, ANE, AME, ADA, AE BPSC Previous Year Question for AP, ANE, AME, ADA, AE
BPSC Previous Year Question for AP, ANE, AME, ADA, AE
 
C L I E N T S E R V E R C O M P U T I N G J N T U M O D E L P A P E R{Www
C L I E N T   S E R V E R  C O M P U T I N G  J N T U  M O D E L  P A P E R{WwwC L I E N T   S E R V E R  C O M P U T I N G  J N T U  M O D E L  P A P E R{Www
C L I E N T S E R V E R C O M P U T I N G J N T U M O D E L P A P E R{Www
 
Client Server Computing Jntu Model Paper{Www.Studentyogi.Com}
Client  Server Computing Jntu Model Paper{Www.Studentyogi.Com}Client  Server Computing Jntu Model Paper{Www.Studentyogi.Com}
Client Server Computing Jntu Model Paper{Www.Studentyogi.Com}
 
Cs ep-sample jan2012-final
Cs ep-sample jan2012-finalCs ep-sample jan2012-final
Cs ep-sample jan2012-final
 
M E T R O L O G Y A N D Q U A L I T Y C O N T R O L J N T U M O D E L P A ...
M E T R O L O G Y A N D Q U A L I T Y C O N T R O L  J N T U  M O D E L  P A ...M E T R O L O G Y A N D Q U A L I T Y C O N T R O L  J N T U  M O D E L  P A ...
M E T R O L O G Y A N D Q U A L I T Y C O N T R O L J N T U M O D E L P A ...
 
Computer Programming Jntu Model Paper{Www.Studentyogi.Com}
Computer Programming Jntu Model Paper{Www.Studentyogi.Com}Computer Programming Jntu Model Paper{Www.Studentyogi.Com}
Computer Programming Jntu Model Paper{Www.Studentyogi.Com}
 
C O M P U T E R P R O G R A M M I N G J N T U M O D E L P A P E R{Www
C O M P U T E R  P R O G R A M M I N G  J N T U  M O D E L  P A P E R{WwwC O M P U T E R  P R O G R A M M I N G  J N T U  M O D E L  P A P E R{Www
C O M P U T E R P R O G R A M M I N G J N T U M O D E L P A P E R{Www
 
Grid _cluster_computing
Grid  _cluster_computingGrid  _cluster_computing
Grid _cluster_computing
 

Mehr von vamsi krishna

Mehr von vamsi krishna (11)

Software project management
Software project managementSoftware project management
Software project management
 
Web technologies
Web technologiesWeb technologies
Web technologies
 
Xml
XmlXml
Xml
 
Servletarchitecture,lifecycle,get,post
Servletarchitecture,lifecycle,get,postServletarchitecture,lifecycle,get,post
Servletarchitecture,lifecycle,get,post
 
Javax.servlet,http packages
Javax.servlet,http packagesJavax.servlet,http packages
Javax.servlet,http packages
 
Cookies
CookiesCookies
Cookies
 
Servletand sessiontracking
Servletand sessiontrackingServletand sessiontracking
Servletand sessiontracking
 
Unit4wt
Unit4wtUnit4wt
Unit4wt
 
Unit3wt
Unit3wtUnit3wt
Unit3wt
 
Unit2wt
Unit2wtUnit2wt
Unit2wt
 
Unit 1wt
Unit 1wtUnit 1wt
Unit 1wt
 

Advanced computer architecture

  • 1. www.jntuworld.com www.jwjobs.net Code No. M0523 R07 Set No.1 IV B.Tech I Semester Supplementary Examinations, February, 2012 ADVANCED COMPUTER ARCHITECTURE (Computer Science and Engineering) Time: 3 hours Max. Marks: 80 Answer any FIVE Questions All Questions carry equal marks ***** 1. a) What are the rapidly changing technologies that may shape the design of a computer? b) What are the major factors that influence the cost of a computer and how these factors are changing over time? c ) Define Amdahl’s law? How much speed can be enhanced by replacing the system with a new processor that is 100 times faster than the old. Assume the original processor is busy with computation 50% of the time and the remaining time is waiting for I/O devices. L D 2. a) What are the data addressing modes that are considered to be very popular? R Explain Auto increment and Auto decrement addressing with examples. b) Name four important features where the register indirect jumps are useful. O c) What is the impact of compiler technology on the computer architect’s decisions? W 3. What is the major hurdle of pipelining? How do they reduce the performance? What are the techniques to be used to improve the performance? U 4. What are the five primary approaches, in use, for multiple issue processors? Give the N T primary characteristics that distinguish them. 5. a) What are the parameters used to describe the performance of cache? Explain. J b) Summarize the techniques used for cache optimizations and estimate the impact on the parameters that characterizes its performance. 6. a) What is multiprocessor cache coherence? b) What are the limitations in symmetric shared multiprocessors? c) Explain the basic synchronization mechanism for multi processors. 7. a) Give the different characteristics of transaction processing benchmarks for I/O systems. b) Describe cluster architecture. 8. Write short notes on the following. a) RAID and its performance b) Practical issues in interconnection networks. 1 of 1 www.jntuworld.com
  • 2. www.jntuworld.com www.jwjobs.net Code No. M0523 R07 Set No.2 IV B.Tech I Semester Supplementary Examinations, February, 2012 ADVANCED COMPUTER ARCHITECTURE (Computer Science and Engineering) Time: 3 hours Max. Marks: 80 Answer any FIVE Questions All Questions carry equal marks ***** 1 a) What are the relative improvements in bandwidth and latency in technology milestones for microprocessors, memory, networks, and disks? b) What is dependability? What are the factors that influence the system to be very dependable? c) What are the parameters that dictate the processor performance? Explain. 2 D a) How instruction set architectures are classified? Give their relative merits and demerits? L R b) How to encode the addressing modes with operations? What are the factors to be considered in decoding mechanism ? O c) What are the guidelines that make the design of compiler to be easy and efficient? W 3 a) What are control hazards? How advanced branch production reduces the branch costs? U b) What are limitations of instruction level parallelism? c) What are the features of hardware based speculation to overcome the control dependences? N T 4 a) How VLIW approach improves the performance of pipelines? J b) Name three primary dynamic approaches, that are hardware based, for hazard detection to instruction level parallelism? Give their primary characteristics. How do you differentiate among them? 5 How use of virtual machine has gained popularity? How the processes are protected from each other through virtual machines? 6 a) Differentiate between centralized shared memory multiprocessors and distributed memory multiprocessors. b) What is multi threading? How do you define thread level parallelism? How spin locks be implemented using coherence mechanism? 1 of 2 www.jntuworld.com
  • 3. www.jntuworld.com www.jwjobs.net Code No. M0523 R07 Set No.2 7 a) How an I/O system is designed and evaluated? b) Discuss performance issues related to I/O systems. 8 Write short notes on the following. a) Hardware multithreading and its performance. b) Role of compiler in encoding an instruction set. L D O R U W N T J 2 of 2 www.jntuworld.com
  • 4. www.jntuworld.com www.jwjobs.net Code No. M0523 R07 Set No.3 IV B.Tech I Semester Supplementary Examinations, February, 2012 ADVANCED COMPUTER ARCHITECTURE (Computer Science and Engineering) Time: 3 hours Max. Marks: 80 Answer any FIVE Questions All Questions carry equal marks ***** 1. a) Describe the performance milestones of microprocessors, memory, networks and disks. b) How the performance of a system can be measured and reported? c) How speed up can be achieved by making an enhancement to a computer? D 2. a) Explain the displacement addressing mode with an example and give its usefulness. b) What are the major methods for evaluating branch conditions? Give three advantages and disadvantages. L R c) What are the optimizations that can be performed by modern compilers ? O 3. a) What are data hazards that are noticed in instructing level parallelism? Explain dynamic scheduling for overcoming these hazards. W b) How high performance instruction delivery without hazards, is possible in instruction level parallelism? T U 4. a) Explain static branch prediction? What is the advantage of using this? b) What are the relative merits and demerits of adapting software and hardware supports for improving the performance of pipelines? J N 5. a) What are the causes for high miss rates in cache organization? What are the six basic cache optimizations? b) How architecture supports for protecting processes from each other via virtual memory? 6. a) Describe Flynn classification of parallel architectures. b) What is multi threading? How does it improve the performance of multiprocessors? c) What is cache coherence? Name the methods used to take care of coherence problems. 1 of 2 www.jntuworld.com
  • 5. www.jntuworld.com www.jwjobs.net Code No. M0523 R07 Set No.3 7. a) Name any three I/O benchmarks along with their throughput metrics and time restrictions. b) How the performance and reliability of I/O systems are improved with the use of RAID? 8. Write short notes on the following. a) Message passing multiprocessors. b) Quantities measures for performance of computers. L D O R U W N T J 2 of 2 www.jntuworld.com
  • 6. www.jntuworld.com www.jwjobs.net Code No. M0523 R07 Set No.4 IV B.Tech I Semester Supplementary Examinations, February, 2012 ADVANCED COMPUTER ARCHITECTURE (Computer Science and Engineering) Time: 3 hours Max. Marks: 80 Answer any FIVE Questions All Questions carry equal marks ***** 1. a) What are trends in power in the integrated circuits for exploration of better computing machines? b) What are benchmarks? What is the role of benchmarks in measuring performance of computer systems? c) What are the guidelines and principles that are useful in the design and analysis of computers? L D 2. a) What are the data addressing modes that are found to be very efficient for dealing control flow instruction? Explain. O R b) How instructions are encoded into a binary representation? Does this representation has any bearing on the performance of the computer? What is the competing forces when encoding a instruction set? U W 3. a) What is a pipeline? What are data dependences and hazards? Explain b) What are the key ideas of hardware based speculation? What is the purpose of using recorder buffers? N T 4. a) Differentiate between software verses hardware solutions for hazard detection. b) How the hardware support improves the instruction level parallelism at compiler time? J 5. Name ten advanced optimizations of cache performance and explain each of the techniques. 6. a) What are multiprocessors? How they are connected using an interconnection network? b) Differentiate between instruction level parallelism and thread level parallelism. c )What is synchronization? Why synchronization mechanism is needed for multiprocessor systems? d) What are the possible messages sent among the processors to maintain coherence in multiprocessors? 1 of 2 www.jntuworld.com
  • 7. www.jntuworld.com www.jwjobs.net Code No. M0523 R07 Set No.4 7. a) What is the general approach to design an I/O system? b) What are the errors and types of failures that are usually noticed in I/O systems? c) What are the practical issues in designing interconnection networks? 8. Write short notes on a) Designing a cluster. b) Amdahl’s law and its limitations. L D O R U W N T J 2 of 2 www.jntuworld.com