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RCIM 2008 - - hArtes_Ferrara

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Marco Santambrogio
Marco Santambrogio

The document discusses an hardware application platform developed for the hArtes project. It provides heterogeneous computing resources like DSPs, CPUs and FPGAs. Demonstrator applications focus on advanced audio processing for car infotainment and teleconferencing. The platform supports these applications by integrating different components, scaling computational power, and accommodating future additions. It also provides adequate I/O channels for audio signal processing.

Technologie
1 von 15
The hardware application platform of the hArtes project Università degli Studi di Ferrara - Dipartimento di Fisica RCIM - Milano – December 19th, 2008
[object Object],[object Object],[object Object],[object Object],The hardware application platform of the hArtes project
[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],Application requirements
Main Board architecture hArtes hardware platform overview
Xilinx XC4VFX100
Main board with all daughter boards BACK FRONT
Main board layout BACK FRONT
(320) Floorplan of the XC4VFX100 device (320, not used ) (128) Fixed function IPs area Re-programmable area Internal organization of the BCE FPGA
Actual internal organization Re-programmable area Fixed function IPs area
(Preliminary) MOLEN architecture support in the BCE For a description of the MOLEN architecture, please visit the TU-Delft CE website: http://ce.et.tudelft.nl/MOLEN
The plaftorm @ work: the audio demo developed for the 2nd hArtes review
The plaftorm @ work: the audio demo developed for the 2nd hArtes review MOTU ADAT interface PC optical fibres
The plaftorm @ work: the audio demo developed for the 2nd hArtes review audio streaming support (64 audio channels in + 64 out)
The plaftorm @ work: the audio demo developed for the 2nd hArtes review audio streaming support (64 audio channels in + 64 out) Audio streaming (input push, output pull) Audio buffering Interrupts for all 64+64 channels Fully performed at hard(firm)-ware level Soft-configurable
Conclusions ,[object Object],[object Object],[object Object],[object Object]

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RCIM 2008 - - hArtes_Ferrara

  • 1. The hardware application platform of the hArtes project Università degli Studi di Ferrara - Dipartimento di Fisica RCIM - Milano – December 19th, 2008
  • 2.
  • 3.
  • 4. Main Board architecture hArtes hardware platform overview
  • 6. Main board with all daughter boards BACK FRONT
  • 7. Main board layout BACK FRONT
  • 8. (320) Floorplan of the XC4VFX100 device (320, not used ) (128) Fixed function IPs area Re-programmable area Internal organization of the BCE FPGA
  • 9. Actual internal organization Re-programmable area Fixed function IPs area
  • 10. (Preliminary) MOLEN architecture support in the BCE For a description of the MOLEN architecture, please visit the TU-Delft CE website: http://ce.et.tudelft.nl/MOLEN
  • 11. The plaftorm @ work: the audio demo developed for the 2nd hArtes review
  • 12. The plaftorm @ work: the audio demo developed for the 2nd hArtes review MOTU ADAT interface PC optical fibres
  • 13. The plaftorm @ work: the audio demo developed for the 2nd hArtes review audio streaming support (64 audio channels in + 64 out)
  • 14. The plaftorm @ work: the audio demo developed for the 2nd hArtes review audio streaming support (64 audio channels in + 64 out) Audio streaming (input push, output pull) Audio buffering Interrupts for all 64+64 channels Fully performed at hard(firm)-ware level Soft-configurable
  • 15.