According to AMD, it's got a roadmap to deliver a 25x improvement in performance-per-watt over the n...

1. AMD claims it can deliver 25x energy efficiency
improvement in the next six years
According to AMD, it's got a roadmap to deliver a 25x improvement in performance-per-watt over
the next six years -- and it's going to deliver this platform by 2020. That's the pitch that arrived in my
inbox today -- and I'll admit, my first response was to blink, read it again, and fire back a polite "No
you won't" at my hapless PR contact. This kicked off a bit of email back-and-forth, and led to a
conversation with Senior AMD Fellow, Sam Naffizger. Could AMD actually pull this off?
Why 25x is hard to believe
I was dubious about AMD's 25x claim because Dennard scaling stopped functioning back in 2005,
while Moore's law no longer provides the cost scaling it once offered. Even if we're generous with
timelines, 2020 is only two full nodes away -- nobody has ever delivered a 25x improvement in that
short span of time, not even during the golden age of CPU scaling. Furthermore, as we've previously
discussed, supercomputer vendors are concerned about the exascale ramp precisely because CPU
and even GPU power efficiency aren't improving anywhere near as quickly as they need to be for
exascale by 2020.

2. Naffizger actually agreed on both these points. The company actually put together a few slides that
illustrate the problem. The orange line above shows where we would be today if manufacturing had
allowed Dennard scaling to continue functioning;Â the turquoise line shows where we actually are
based on 2000-2009 improvements. AMD, of course, wants to improve the situation and put us up on

3. that light green line -- skyrocketing even faster than any other platform.
Difficult to swallow? You bet. But AMD doesn't want to rely on smaller process nodes -- they've got
other things in mind.
How AMD intends to pull this off
First things first -- AMD isn't trying to reduce power consumption by 25x in a no-holds-barred
scenario, and it's not trying to cut idle power by 25x either. Its goal is to reduce the power
consumption of "typical" workloads by a factor of 25 -- and that's somewhat more achievable.
According to AMD, GPU acceleration and HSA are just the beginning -- long term the company
wants to explore using new specialized cores for particular workloads. The performance of HSA
should also improve in further generations, as graphics cores become more powerful and the links
between CPU and GPU accelerate. Â There's also talk of adding new specialized cores for other
tasks, and of continued improvements to the hardware video decode blocks to reduce power
consumption in those workloads as well.
One point Naffziger made in our discussion is that the operating system still takes a very coarse-
grained approach to OS power management. AMD has already built a 32-bit controller on its modern
APUs to better manage power frequency according to the needs of the software running on-chip, and
the company plans to further expand this effort. It's all part of the race to idle -- the more time a
CPU spends not running, the more its performance-per-watt improves.
Of course, improving idle and active power consumption through lower leakage current is still
important, as this research paper from Tirias shows.

4. As process nodes shrink, the slope of the yellow area gets steeper every generation. Even idle power
comes up as the voltage gradient changes. AMD's central argument is that a combination of smart
scheduling, intelligent throttling, fine-grained power management, and specialized heterogeneous
cores can deliver an efficiency improvement that's far larger than what we'll see from smaller
process nodes over the same time frame. It was also interesting to note Intel's announcement
yesterday of its own move into heterogeneous chips, with an FPGA integrated into a Xeon CPU. We
are seeing a fairly definite shift towards specialized hardware blocks for specialized workloads.
An excellent starting point (for an ironic reason)
When Intel launched its first Core 2-based Xeons, it circulated some PDFs claiming truly enormous
efficiency gains. Anyone familiar with the previous generation of Xeon hardware, which relied on
Prescott-based dual cores, would scarcely have found this surprising -- Intel's previous chips had
been so terribly inefficient that the next generation allowed it to claim enormous improvements right
off the bat.

5. AMD's current APUs are in a similar position, if not quite to the same degree. Kaveri has improved
notably on this front, particularly its mobile form factor, but no one argues that AMD could achieve
much more with a more efficient processor design. We already know that the company is working on
new ARM and x86 cores, with the first project iterations due in 2016. AMD's current position, in
other words, gives it a heck of a boost off the starting block.
But that boost is only going to take so far -- past there, it'll need an enormous level of expertise to
continue pushing towards that 25x goal. What AMD wants to do is give end-users dramatic battery
improvements when using a system for everyday tasks and in the modes where it spends most of its
time. If the company can continue pushing for its heterogeneous processors and roll out a new,
dramatically more efficient CPU core, it'll be well on the way to pulling this off.