3. Fabricating one transistor
UV light
Mask
oxygen
exposed
Silicon dioxide photoresist photoresist
oxide
Silicon substrate
Oxidation Photoresist Mask-Wafer Exposed Photoresist
(Field oxide) Coating Alignment and Exposure Photoresist Develop
RF
RF
RF
RF
Po
Po
Po
we
we
Po
we
rr
we
Dopant gas
r
Ionized CCl4 gas
r
Ionized oxygen gas
Ionized CF4 gas Silane gas
photoresist oxygen
e
oxide oxide
at
oxide polysilicon
g
ly
gate oxide
po
Oxide Photoresist Oxidation Polysilicon Polysilicon
Etch Remove (Gate oxide) Deposition Mask and Etch
Scanning
ion beam
Contact Metal
silicon nitride holes contacts
t
sis
top nitride
G
drain
re
G G G
ox
S D S D S D S G D S D
Ion Active Nitride Contact Metal
Implantation Regions Deposition Etch Deposition and
Etch
4. Top view
Source Gate Drain
Polysilicon Source Gate Drain
Polysilicon
SiO2
SiO2
p+ p+ n+ n+
n bulk Si p bulk Si
30. The printer
Illuminator optics Excimer laser
(193 nm ArF )
Reticle library
(SMIF pod interface) Beam line
Wafer transport
Operator system
console
Reticle stage
Wafer stage
Auto-alignment system
4:1 Reduction lens
NA = 0.45 to 0.6
31. Photolithography is used to print
desired patterns on the wafer
UV light
Reticle field size
20 mm 2 15mm,
4 die per field
masks
5:1 reduction lens
Image exposure on
Serpentine wafer 1/5 of reticle
stepping field
pattern 4 mm 4 3 mm,
4 die per exposure
Wafer
The feature size directly depends on the wavelength of your
lithographic system
32. Cross section of a 7-metal layer IC
Next time:
How to print different gates?