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Ch8
1.
Chapter 8:
Main Memory
2.
3.
4.
5.
6.
7.
Multistep Processing of
a User Program
8.
9.
10.
Dynamic relocation using
a relocation register
11.
12.
13.
14.
Schematic View of
Swapping
15.
16.
HW address protection
with base and limit registers
17.
18.
19.
20.
21.
22.
23.
Paging Hardware
24.
Paging Model of
Logical and Physical Memory
25.
Paging Example 32-byte
memory and 4-byte pages
26.
Free Frames Before
allocation After allocation
27.
28.
29.
Paging Hardware With
TLB
30.
31.
32.
Valid (v) or
Invalid (i) Bit In A Page Table
33.
34.
Shared Pages Example
35.
36.
User’s View of
a Program
37.
Logical View of
Segmentation 1 3 2 4 user space physical memory space 1 4 2 3
38.
39.
40.
41.
Segmentation Hardware
42.
Example of Segmentation
43.
Sharing of Segments
44.
45.
46.
47.
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