SlideShare ist ein Scribd-Unternehmen logo
1 von 25
TOPICS:-
Instruction and Instruction Sequencing
  •Register Transfer Notation(RTN)
  •Assembly Language Notation(APN)
  •Basic instruction type
  •Instruction execution & straight line sequencing
  •Branching
  •Condition codes
  •Generating memory address
Addressing   modes
  •Types  of addressing modes
  •Implementation of variables and constants
  •Indirection and pointer
  •Indexing and array
  •Relative addressing
  •Additional modes
Computer   program consist of sequence of small steps,
such as adding two numbers, testing for a particular
condition , reading a character from the keyword

Four   types of operation.

1)   Data transfers between the memory and the
     processor registers.
2)   Arithmetic and logical operations on data.
3)   Program sequencing and control.
4)   I/O Transfers
•Transfer of information from one location in the
computer to another.
•Possible locations that may be involved in such transfers
are memory locations, processor registers and registers
in the I/O subsystem.
•Example –

•   Add the contents of the register R1 and R2 and then
places their sum into register R3.
              R3[R1]+[R2]
   Right side denoted the value.
   Left side denoted the name of the location where the
value is to be placed.
•It   represent machine instructions and program.

•For   this, we use assembly language format.

•Example   :-
  1)     Move LOC ,R1
• The contents of LOC are unchanged by the execution of
this instruction but the old contents of register R1 are
overwritten.

2)        Add R1,R2,R3
Three types of basic instruction:-
1) 3 –Address instruction:-
       • Add A,B,C
       • A &B are called Source operands.
       • C is called Destination operand.
                  Operation Source1,Source2,Destination


         • 3-address instruction is too large to fit
           in one word for a reasonable word
           length.
2) 2-Address Instruction:-
        • Add A,B
        • [B][A]+[B]
        • A is source operand and B is destination
           operand
                 Operation Source, Destination



        •   A single 2-address instruction cannot be
            used to solve original problem A and B ,
            without destroying either of them ,and to
            place the sum in location C.
        •   Move B,C
                C[B]
3) 1-Adress Instruction:-
        • Add A
        • Accumulator[A]+Accumulator
                 Operation Destination


       •   Using 1-address instructions , the operation
           [C][A]+[B] can be performed by execution
           the sequence the instruction:-
       •      Load A
       •      Add B
       •      Store C
•Executing   a given instruction is a two-phase procedure:-

• 1) Instruction fetch:-
•Instruction fetched from the main memory location whose
address in the PC.
•This instruction placed in the IR in the processor.



•2)Instruction execute:-
•The instruction in IR is examined to determine which
operation is to be performed.
•The specified operation is performed by processor.

•Perform arithmetic and logic operation.

•Store the result in destination location.
•PC holds the address of the instruction to be execute
next.

•The   address of 1st instruction placed into PC, then

•The processor control circuits use the information in the
PC to fetch and execute instruction ,one at a time , in the
order of increasing addresses . It is called straight line
sequencing.

•During  each instruction PC incremented by 4 to point to
the next instruction
• It is loads a new value into the PC.
•Processor fetch and executes the instruction at the new
address , called branch target.
•It follows the branch instruction in sequential address
order .
•A conditional branch instruction causes a branch only if
a specified condition is satisfied.
•If the condition is not specified ,the PC is incremented.

•And the next instruction in sequential order is fetched
and executed.
•         Branch>0 LOOP
•The processor keep the track of information about the
result of various operation for use by subsequent
conditional branch instructions.

•This  is accomplished by recording the required
information in individual bits, often called condition code
flags.

•These  flags are usually grouped together in a special
processor register called condition code register or status
register.
•Four commonly used flags are:-
•N(negative):-Set to 1 if the result is negative; otherwise
cleared to 0

•Z(zero):-Set   to 1 if the result is 0;othrrwise cleared to 0

•V(overflow):-Setto 1 if the arithmetic overflow occurs ;
otherwise cleared to 0

•C(carry):-Setto 1 if a carry-out results from the
operation ; otherwise cleared to 0
•The N and Z flags are affected by instructions that
transfer data such as Move ,Load , or Store.

•TheInstruction Branch>0 tests one or more condition
codes.

•Insome computers ,the condition code flags are affected
automatically by instruction that perform arithmetic or
logic operation
•Theinstruction set of a computer typically provides a
number of such method, called addressing modes.
•Types of addressing modes:-        EA=effective address
        Name                  Assembler syntax   Addressing function
        Immediate             # value            Operand=value
        Register              Ri                 EA=Ri
        Absolute(Direct)      LOC                EA=LOC
        Indirect              (Ri) , (LOC)       EA=[Ri] ,EA=[LOC]
        Index                 X(Ri)              EA=[Ri]+X
        Base with Index       (Ri,Rj)            EA=[Ri]+[Rj]
        Base with Index and   X(Ri,Rj)           EA=[Ri]+[Rj]+X
        offset
        Relative              X(PC)              EA=[PC]+X
        Auto increment        (Ri+)              EA=[Ri] ;Increment Ri
        Auto decrement        -(Ri)              Decrement Ri
                                                 EA=[Ri];
•A  variable is represented by allocating a register or a
memory location to hold its value.
•Two addressing modes to access variables:-

   1) Register mode:-The operand is the contents of a
processor register .
•Operand is held in register named in address file

•EA = R

•Limited number of registers

•Very small address field needed

                     Shorter instructions
                     Faster instruction fetch
•Move   LOC,R1
2) Absolute mode:-

•The    operand is in a memory location.

•The address of this location is given explicitly in the
instruction .

•It   is also called Direct mode.

•Declaration    such as
•            Integer A,B
Address and data constants can be represented in
assembly level language using Immediate mode

•Immediate     mode:- The operand is given explicitly in the
instruction.

•Example   –    Move 200immediate ,Ro

•The common convention is to be used the sharp sign(#)
in front of the value of the use as in immediate operand.
•             Move #200, Ro
•The register or memory location that contains the
address of an operand is called a pointer.
•Indirection is the ability to reference something using a
name, reference, or container instead of the value itself.

•The most common form of indirection is the act of
manipulating a value through its memory address.

•For example, accessing a variable through the use of a
pointer.

•Indirection
           and use of pointers are important and
powerful concepts in programming.
•Indirectmode:-
• The effective address of the operand is the contents of
register or memory location whose address appears in
the instruction.

•Memory  cell pointed to by address field contains the
address of (pointer to) the operand.

•e.g.  ADD (A)
        Add contents of cell pointed to by contents of A
                     to accumulator
• Add (R2),R1
•Indexing provide the different kind of flexibility for
accessing operands.

•It   is useful in dealing with lists and array.

•IndexMode:-
•The effective address of the operand is generated by
adding a constant value to the contents of a register.
•The  register used may be special register provided for
this purpose or general –purpose register called index
register.
• X(Ri)



•   EA=X+[Ri]

•Where  X denoted the constant value contained in the
instruction,
•And Ri is the name of the register involved.
•Relative Mode:-
•The effective address is determined by the index mode using
the PC in the place of general purpose register Ri.

•           EA=[Ri]+PC
•i.e. get operand from Ri cells from current location pointed to
by PC
•The mode can be used access data operands.

•Most common used in to specify the target address in branch
instruction.
•          Branch>0 LOOP
•   Auto increment mode:- (Ri)+
•   The effective address of the operand is the contents of a
    register specified in the instruction.
•   After accessing the operand ,the contents of this register
    are automatically incremented to point to the next item.

•   Auto Decrement mode:- -(Ri)
•   The contents of a register specified in the instruction are
    first automatically decremented.
•   After that used as the effective address of the operand.
Instruction Sequencing & Addressing Modes

Weitere ähnliche Inhalte

Was ist angesagt?

Computer instructions
Computer instructionsComputer instructions
Computer instructionsAnuj Modi
 
Types of Instruction Format
Types of Instruction FormatTypes of Instruction Format
Types of Instruction FormatDhrumil Panchal
 
Registers and-common-bus
Registers and-common-busRegisters and-common-bus
Registers and-common-busAnuj Modi
 
instruction cycle ppt
instruction cycle pptinstruction cycle ppt
instruction cycle pptsheetal singh
 
Basic ops concept of comp
Basic ops  concept of compBasic ops  concept of comp
Basic ops concept of compgaurav jain
 
Memory Reference Instructions
Memory Reference InstructionsMemory Reference Instructions
Memory Reference InstructionsRabin BK
 
Memory organization (Computer architecture)
Memory organization (Computer architecture)Memory organization (Computer architecture)
Memory organization (Computer architecture)Sandesh Jonchhe
 
Processor Organization and Architecture
Processor Organization and ArchitectureProcessor Organization and Architecture
Processor Organization and ArchitectureVinit Raut
 
Addressing mode Computer Architecture
Addressing mode  Computer ArchitectureAddressing mode  Computer Architecture
Addressing mode Computer ArchitectureHaris456
 
Computer architecture pipelining
Computer architecture pipeliningComputer architecture pipelining
Computer architecture pipeliningMazin Alwaaly
 
Instruction codes and computer registers
Instruction codes and computer registersInstruction codes and computer registers
Instruction codes and computer registersSanjeev Patel
 
Register transfer language & its micro operations
Register transfer language & its micro operationsRegister transfer language & its micro operations
Register transfer language & its micro operationsLakshya Sharma
 
Unit 3-pipelining & vector processing
Unit 3-pipelining & vector processingUnit 3-pipelining & vector processing
Unit 3-pipelining & vector processingvishal choudhary
 

Was ist angesagt? (20)

Computer instructions
Computer instructionsComputer instructions
Computer instructions
 
Types of Instruction Format
Types of Instruction FormatTypes of Instruction Format
Types of Instruction Format
 
Instruction format
Instruction formatInstruction format
Instruction format
 
06. thumb instructions
06. thumb instructions06. thumb instructions
06. thumb instructions
 
Registers and-common-bus
Registers and-common-busRegisters and-common-bus
Registers and-common-bus
 
instruction cycle ppt
instruction cycle pptinstruction cycle ppt
instruction cycle ppt
 
Instruction codes
Instruction codesInstruction codes
Instruction codes
 
Basic Computer Organization and Design
Basic  Computer  Organization  and  DesignBasic  Computer  Organization  and  Design
Basic Computer Organization and Design
 
Basic ops concept of comp
Basic ops  concept of compBasic ops  concept of comp
Basic ops concept of comp
 
Memory Reference Instructions
Memory Reference InstructionsMemory Reference Instructions
Memory Reference Instructions
 
Memory organization (Computer architecture)
Memory organization (Computer architecture)Memory organization (Computer architecture)
Memory organization (Computer architecture)
 
Processor Organization and Architecture
Processor Organization and ArchitectureProcessor Organization and Architecture
Processor Organization and Architecture
 
Addressing mode Computer Architecture
Addressing mode  Computer ArchitectureAddressing mode  Computer Architecture
Addressing mode Computer Architecture
 
Addressing sequencing
Addressing sequencingAddressing sequencing
Addressing sequencing
 
design of accumlator
design of accumlatordesign of accumlator
design of accumlator
 
Computer architecture pipelining
Computer architecture pipeliningComputer architecture pipelining
Computer architecture pipelining
 
Instruction codes and computer registers
Instruction codes and computer registersInstruction codes and computer registers
Instruction codes and computer registers
 
Register transfer language & its micro operations
Register transfer language & its micro operationsRegister transfer language & its micro operations
Register transfer language & its micro operations
 
Arm instruction set
Arm instruction setArm instruction set
Arm instruction set
 
Unit 3-pipelining & vector processing
Unit 3-pipelining & vector processingUnit 3-pipelining & vector processing
Unit 3-pipelining & vector processing
 

Ähnlich wie Instruction Sequencing & Addressing Modes

Lec3 instructions branch carl hamcher
Lec3 instructions branch carl hamcher Lec3 instructions branch carl hamcher
Lec3 instructions branch carl hamcher Venkata Krishnakanth P
 
Program execution, straight line sequence and branching
Program execution, straight line sequence and branchingProgram execution, straight line sequence and branching
Program execution, straight line sequence and branchingJyotiprakashMishra18
 
LU3- 4 Instructions and Sequencing.pptx
LU3- 4 Instructions and Sequencing.pptxLU3- 4 Instructions and Sequencing.pptx
LU3- 4 Instructions and Sequencing.pptxAKumaraGuru
 
11 instruction sets addressing modes
11  instruction sets addressing modes 11  instruction sets addressing modes
11 instruction sets addressing modes Sher Shah Merkhel
 
11 instruction sets addressing modes
11  instruction sets addressing modes 11  instruction sets addressing modes
11 instruction sets addressing modes Kanika Thakur
 
11 instruction sets addressing modes
11  instruction sets addressing modes 11  instruction sets addressing modes
11 instruction sets addressing modes Seshu Chakravarthy
 
11 instruction sets addressing modes
11  instruction sets addressing modes 11  instruction sets addressing modes
11 instruction sets addressing modes Anwal Mirza
 
11 instruction sets addressing modes
11  instruction sets addressing modes 11  instruction sets addressing modes
11 instruction sets addressing modes Wasif Naeem
 
11_ Instruction Sets addressing modes .ppt
11_ Instruction Sets addressing modes .ppt11_ Instruction Sets addressing modes .ppt
11_ Instruction Sets addressing modes .pptSwarajKumarPradhan
 
11_ Instruction Sets addressing modes -1.ppt
11_ Instruction Sets addressing modes -1.ppt11_ Instruction Sets addressing modes -1.ppt
11_ Instruction Sets addressing modes -1.pptSuchikage
 
11 instruction sets addressing modes
11  instruction sets addressing modes 11  instruction sets addressing modes
11 instruction sets addressing modes dilip kumar
 
Presentation of addressing mode presentation
Presentation of addressing mode presentationPresentation of addressing mode presentation
Presentation of addressing mode presentationkiranrawkey2912
 
Computer Architecture and organization ppt.
Computer Architecture and organization ppt.Computer Architecture and organization ppt.
Computer Architecture and organization ppt.mali yogesh kumar
 
Ch13- Inst Addressing Modes & Formats.pdf
Ch13- Inst Addressing Modes & Formats.pdfCh13- Inst Addressing Modes & Formats.pdf
Ch13- Inst Addressing Modes & Formats.pdfsaimawarsi
 
instruction sets (1).pptx
instruction sets (1).pptxinstruction sets (1).pptx
instruction sets (1).pptxAmanMomin9
 

Ähnlich wie Instruction Sequencing & Addressing Modes (20)

Lec3 instructions branch carl hamcher
Lec3 instructions branch carl hamcher Lec3 instructions branch carl hamcher
Lec3 instructions branch carl hamcher
 
Program execution, straight line sequence and branching
Program execution, straight line sequence and branchingProgram execution, straight line sequence and branching
Program execution, straight line sequence and branching
 
LU3- 4 Instructions and Sequencing.pptx
LU3- 4 Instructions and Sequencing.pptxLU3- 4 Instructions and Sequencing.pptx
LU3- 4 Instructions and Sequencing.pptx
 
11 instruction sets addressing modes
11  instruction sets addressing modes 11  instruction sets addressing modes
11 instruction sets addressing modes
 
11 instruction sets addressing modes
11  instruction sets addressing modes 11  instruction sets addressing modes
11 instruction sets addressing modes
 
Anshika 1111.pptx
Anshika 1111.pptxAnshika 1111.pptx
Anshika 1111.pptx
 
11 instruction sets addressing modes
11  instruction sets addressing modes 11  instruction sets addressing modes
11 instruction sets addressing modes
 
11 instruction sets addressing modes
11  instruction sets addressing modes 11  instruction sets addressing modes
11 instruction sets addressing modes
 
11 instruction sets addressing modes
11  instruction sets addressing modes 11  instruction sets addressing modes
11 instruction sets addressing modes
 
11_ Instruction Sets addressing modes .ppt
11_ Instruction Sets addressing modes .ppt11_ Instruction Sets addressing modes .ppt
11_ Instruction Sets addressing modes .ppt
 
11_ Instruction Sets addressing modes -1.ppt
11_ Instruction Sets addressing modes -1.ppt11_ Instruction Sets addressing modes -1.ppt
11_ Instruction Sets addressing modes -1.ppt
 
CO_Chapter2.ppt
CO_Chapter2.pptCO_Chapter2.ppt
CO_Chapter2.ppt
 
11 instruction sets addressing modes
11  instruction sets addressing modes 11  instruction sets addressing modes
11 instruction sets addressing modes
 
Presentation of addressing mode presentation
Presentation of addressing mode presentationPresentation of addressing mode presentation
Presentation of addressing mode presentation
 
Ch 11
Ch 11Ch 11
Ch 11
 
Computer Architecture and organization ppt.
Computer Architecture and organization ppt.Computer Architecture and organization ppt.
Computer Architecture and organization ppt.
 
Ch13- Inst Addressing Modes & Formats.pdf
Ch13- Inst Addressing Modes & Formats.pdfCh13- Inst Addressing Modes & Formats.pdf
Ch13- Inst Addressing Modes & Formats.pdf
 
module-3.pptx
module-3.pptxmodule-3.pptx
module-3.pptx
 
UNIT-3.pptx
UNIT-3.pptxUNIT-3.pptx
UNIT-3.pptx
 
instruction sets (1).pptx
instruction sets (1).pptxinstruction sets (1).pptx
instruction sets (1).pptx
 

Kürzlich hochgeladen

Measures of Central Tendency: Mean, Median and Mode
Measures of Central Tendency: Mean, Median and ModeMeasures of Central Tendency: Mean, Median and Mode
Measures of Central Tendency: Mean, Median and ModeThiyagu K
 
BASLIQ CURRENT LOOKBOOK LOOKBOOK(1) (1).pdf
BASLIQ CURRENT LOOKBOOK  LOOKBOOK(1) (1).pdfBASLIQ CURRENT LOOKBOOK  LOOKBOOK(1) (1).pdf
BASLIQ CURRENT LOOKBOOK LOOKBOOK(1) (1).pdfSoniaTolstoy
 
Nutritional Needs Presentation - HLTH 104
Nutritional Needs Presentation - HLTH 104Nutritional Needs Presentation - HLTH 104
Nutritional Needs Presentation - HLTH 104misteraugie
 
Explore beautiful and ugly buildings. Mathematics helps us create beautiful d...
Explore beautiful and ugly buildings. Mathematics helps us create beautiful d...Explore beautiful and ugly buildings. Mathematics helps us create beautiful d...
Explore beautiful and ugly buildings. Mathematics helps us create beautiful d...christianmathematics
 
Key note speaker Neum_Admir Softic_ENG.pdf
Key note speaker Neum_Admir Softic_ENG.pdfKey note speaker Neum_Admir Softic_ENG.pdf
Key note speaker Neum_Admir Softic_ENG.pdfAdmir Softic
 
Q4-W6-Restating Informational Text Grade 3
Q4-W6-Restating Informational Text Grade 3Q4-W6-Restating Informational Text Grade 3
Q4-W6-Restating Informational Text Grade 3JemimahLaneBuaron
 
The Most Excellent Way | 1 Corinthians 13
The Most Excellent Way | 1 Corinthians 13The Most Excellent Way | 1 Corinthians 13
The Most Excellent Way | 1 Corinthians 13Steve Thomason
 
Russian Escort Service in Delhi 11k Hotel Foreigner Russian Call Girls in Delhi
Russian Escort Service in Delhi 11k Hotel Foreigner Russian Call Girls in DelhiRussian Escort Service in Delhi 11k Hotel Foreigner Russian Call Girls in Delhi
Russian Escort Service in Delhi 11k Hotel Foreigner Russian Call Girls in Delhikauryashika82
 
Introduction to Nonprofit Accounting: The Basics
Introduction to Nonprofit Accounting: The BasicsIntroduction to Nonprofit Accounting: The Basics
Introduction to Nonprofit Accounting: The BasicsTechSoup
 
SOCIAL AND HISTORICAL CONTEXT - LFTVD.pptx
SOCIAL AND HISTORICAL CONTEXT - LFTVD.pptxSOCIAL AND HISTORICAL CONTEXT - LFTVD.pptx
SOCIAL AND HISTORICAL CONTEXT - LFTVD.pptxiammrhaywood
 
Paris 2024 Olympic Geographies - an activity
Paris 2024 Olympic Geographies - an activityParis 2024 Olympic Geographies - an activity
Paris 2024 Olympic Geographies - an activityGeoBlogs
 
Advanced Views - Calendar View in Odoo 17
Advanced Views - Calendar View in Odoo 17Advanced Views - Calendar View in Odoo 17
Advanced Views - Calendar View in Odoo 17Celine George
 
Grant Readiness 101 TechSoup and Remy Consulting
Grant Readiness 101 TechSoup and Remy ConsultingGrant Readiness 101 TechSoup and Remy Consulting
Grant Readiness 101 TechSoup and Remy ConsultingTechSoup
 
Class 11th Physics NEET formula sheet pdf
Class 11th Physics NEET formula sheet pdfClass 11th Physics NEET formula sheet pdf
Class 11th Physics NEET formula sheet pdfAyushMahapatra5
 
1029-Danh muc Sach Giao Khoa khoi 6.pdf
1029-Danh muc Sach Giao Khoa khoi  6.pdf1029-Danh muc Sach Giao Khoa khoi  6.pdf
1029-Danh muc Sach Giao Khoa khoi 6.pdfQucHHunhnh
 
The basics of sentences session 2pptx copy.pptx
The basics of sentences session 2pptx copy.pptxThe basics of sentences session 2pptx copy.pptx
The basics of sentences session 2pptx copy.pptxheathfieldcps1
 
Web & Social Media Analytics Previous Year Question Paper.pdf
Web & Social Media Analytics Previous Year Question Paper.pdfWeb & Social Media Analytics Previous Year Question Paper.pdf
Web & Social Media Analytics Previous Year Question Paper.pdfJayanti Pande
 

Kürzlich hochgeladen (20)

Measures of Central Tendency: Mean, Median and Mode
Measures of Central Tendency: Mean, Median and ModeMeasures of Central Tendency: Mean, Median and Mode
Measures of Central Tendency: Mean, Median and Mode
 
BASLIQ CURRENT LOOKBOOK LOOKBOOK(1) (1).pdf
BASLIQ CURRENT LOOKBOOK  LOOKBOOK(1) (1).pdfBASLIQ CURRENT LOOKBOOK  LOOKBOOK(1) (1).pdf
BASLIQ CURRENT LOOKBOOK LOOKBOOK(1) (1).pdf
 
Nutritional Needs Presentation - HLTH 104
Nutritional Needs Presentation - HLTH 104Nutritional Needs Presentation - HLTH 104
Nutritional Needs Presentation - HLTH 104
 
Explore beautiful and ugly buildings. Mathematics helps us create beautiful d...
Explore beautiful and ugly buildings. Mathematics helps us create beautiful d...Explore beautiful and ugly buildings. Mathematics helps us create beautiful d...
Explore beautiful and ugly buildings. Mathematics helps us create beautiful d...
 
Key note speaker Neum_Admir Softic_ENG.pdf
Key note speaker Neum_Admir Softic_ENG.pdfKey note speaker Neum_Admir Softic_ENG.pdf
Key note speaker Neum_Admir Softic_ENG.pdf
 
Q4-W6-Restating Informational Text Grade 3
Q4-W6-Restating Informational Text Grade 3Q4-W6-Restating Informational Text Grade 3
Q4-W6-Restating Informational Text Grade 3
 
The Most Excellent Way | 1 Corinthians 13
The Most Excellent Way | 1 Corinthians 13The Most Excellent Way | 1 Corinthians 13
The Most Excellent Way | 1 Corinthians 13
 
INDIA QUIZ 2024 RLAC DELHI UNIVERSITY.pptx
INDIA QUIZ 2024 RLAC DELHI UNIVERSITY.pptxINDIA QUIZ 2024 RLAC DELHI UNIVERSITY.pptx
INDIA QUIZ 2024 RLAC DELHI UNIVERSITY.pptx
 
Russian Escort Service in Delhi 11k Hotel Foreigner Russian Call Girls in Delhi
Russian Escort Service in Delhi 11k Hotel Foreigner Russian Call Girls in DelhiRussian Escort Service in Delhi 11k Hotel Foreigner Russian Call Girls in Delhi
Russian Escort Service in Delhi 11k Hotel Foreigner Russian Call Girls in Delhi
 
Mattingly "AI & Prompt Design: Structured Data, Assistants, & RAG"
Mattingly "AI & Prompt Design: Structured Data, Assistants, & RAG"Mattingly "AI & Prompt Design: Structured Data, Assistants, & RAG"
Mattingly "AI & Prompt Design: Structured Data, Assistants, & RAG"
 
Introduction to Nonprofit Accounting: The Basics
Introduction to Nonprofit Accounting: The BasicsIntroduction to Nonprofit Accounting: The Basics
Introduction to Nonprofit Accounting: The Basics
 
SOCIAL AND HISTORICAL CONTEXT - LFTVD.pptx
SOCIAL AND HISTORICAL CONTEXT - LFTVD.pptxSOCIAL AND HISTORICAL CONTEXT - LFTVD.pptx
SOCIAL AND HISTORICAL CONTEXT - LFTVD.pptx
 
Paris 2024 Olympic Geographies - an activity
Paris 2024 Olympic Geographies - an activityParis 2024 Olympic Geographies - an activity
Paris 2024 Olympic Geographies - an activity
 
Advanced Views - Calendar View in Odoo 17
Advanced Views - Calendar View in Odoo 17Advanced Views - Calendar View in Odoo 17
Advanced Views - Calendar View in Odoo 17
 
Grant Readiness 101 TechSoup and Remy Consulting
Grant Readiness 101 TechSoup and Remy ConsultingGrant Readiness 101 TechSoup and Remy Consulting
Grant Readiness 101 TechSoup and Remy Consulting
 
Class 11th Physics NEET formula sheet pdf
Class 11th Physics NEET formula sheet pdfClass 11th Physics NEET formula sheet pdf
Class 11th Physics NEET formula sheet pdf
 
1029-Danh muc Sach Giao Khoa khoi 6.pdf
1029-Danh muc Sach Giao Khoa khoi  6.pdf1029-Danh muc Sach Giao Khoa khoi  6.pdf
1029-Danh muc Sach Giao Khoa khoi 6.pdf
 
Mattingly "AI & Prompt Design: The Basics of Prompt Design"
Mattingly "AI & Prompt Design: The Basics of Prompt Design"Mattingly "AI & Prompt Design: The Basics of Prompt Design"
Mattingly "AI & Prompt Design: The Basics of Prompt Design"
 
The basics of sentences session 2pptx copy.pptx
The basics of sentences session 2pptx copy.pptxThe basics of sentences session 2pptx copy.pptx
The basics of sentences session 2pptx copy.pptx
 
Web & Social Media Analytics Previous Year Question Paper.pdf
Web & Social Media Analytics Previous Year Question Paper.pdfWeb & Social Media Analytics Previous Year Question Paper.pdf
Web & Social Media Analytics Previous Year Question Paper.pdf
 

Instruction Sequencing & Addressing Modes

  • 1. TOPICS:- Instruction and Instruction Sequencing •Register Transfer Notation(RTN) •Assembly Language Notation(APN) •Basic instruction type •Instruction execution & straight line sequencing •Branching •Condition codes •Generating memory address
  • 2. Addressing modes •Types of addressing modes •Implementation of variables and constants •Indirection and pointer •Indexing and array •Relative addressing •Additional modes
  • 3. Computer program consist of sequence of small steps, such as adding two numbers, testing for a particular condition , reading a character from the keyword Four types of operation. 1) Data transfers between the memory and the processor registers. 2) Arithmetic and logical operations on data. 3) Program sequencing and control. 4) I/O Transfers
  • 4. •Transfer of information from one location in the computer to another. •Possible locations that may be involved in such transfers are memory locations, processor registers and registers in the I/O subsystem. •Example – • Add the contents of the register R1 and R2 and then places their sum into register R3. R3[R1]+[R2]  Right side denoted the value.  Left side denoted the name of the location where the value is to be placed.
  • 5. •It represent machine instructions and program. •For this, we use assembly language format. •Example :- 1) Move LOC ,R1 • The contents of LOC are unchanged by the execution of this instruction but the old contents of register R1 are overwritten. 2) Add R1,R2,R3
  • 6. Three types of basic instruction:- 1) 3 –Address instruction:- • Add A,B,C • A &B are called Source operands. • C is called Destination operand. Operation Source1,Source2,Destination • 3-address instruction is too large to fit in one word for a reasonable word length.
  • 7. 2) 2-Address Instruction:- • Add A,B • [B][A]+[B] • A is source operand and B is destination operand Operation Source, Destination • A single 2-address instruction cannot be used to solve original problem A and B , without destroying either of them ,and to place the sum in location C. • Move B,C C[B]
  • 8. 3) 1-Adress Instruction:- • Add A • Accumulator[A]+Accumulator Operation Destination • Using 1-address instructions , the operation [C][A]+[B] can be performed by execution the sequence the instruction:- • Load A • Add B • Store C
  • 9. •Executing a given instruction is a two-phase procedure:- • 1) Instruction fetch:- •Instruction fetched from the main memory location whose address in the PC. •This instruction placed in the IR in the processor. •2)Instruction execute:- •The instruction in IR is examined to determine which operation is to be performed. •The specified operation is performed by processor. •Perform arithmetic and logic operation. •Store the result in destination location.
  • 10. •PC holds the address of the instruction to be execute next. •The address of 1st instruction placed into PC, then •The processor control circuits use the information in the PC to fetch and execute instruction ,one at a time , in the order of increasing addresses . It is called straight line sequencing. •During each instruction PC incremented by 4 to point to the next instruction
  • 11. • It is loads a new value into the PC. •Processor fetch and executes the instruction at the new address , called branch target. •It follows the branch instruction in sequential address order . •A conditional branch instruction causes a branch only if a specified condition is satisfied. •If the condition is not specified ,the PC is incremented. •And the next instruction in sequential order is fetched and executed. • Branch>0 LOOP
  • 12. •The processor keep the track of information about the result of various operation for use by subsequent conditional branch instructions. •This is accomplished by recording the required information in individual bits, often called condition code flags. •These flags are usually grouped together in a special processor register called condition code register or status register.
  • 13. •Four commonly used flags are:- •N(negative):-Set to 1 if the result is negative; otherwise cleared to 0 •Z(zero):-Set to 1 if the result is 0;othrrwise cleared to 0 •V(overflow):-Setto 1 if the arithmetic overflow occurs ; otherwise cleared to 0 •C(carry):-Setto 1 if a carry-out results from the operation ; otherwise cleared to 0
  • 14. •The N and Z flags are affected by instructions that transfer data such as Move ,Load , or Store. •TheInstruction Branch>0 tests one or more condition codes. •Insome computers ,the condition code flags are affected automatically by instruction that perform arithmetic or logic operation
  • 15. •Theinstruction set of a computer typically provides a number of such method, called addressing modes. •Types of addressing modes:- EA=effective address Name Assembler syntax Addressing function Immediate # value Operand=value Register Ri EA=Ri Absolute(Direct) LOC EA=LOC Indirect (Ri) , (LOC) EA=[Ri] ,EA=[LOC] Index X(Ri) EA=[Ri]+X Base with Index (Ri,Rj) EA=[Ri]+[Rj] Base with Index and X(Ri,Rj) EA=[Ri]+[Rj]+X offset Relative X(PC) EA=[PC]+X Auto increment (Ri+) EA=[Ri] ;Increment Ri Auto decrement -(Ri) Decrement Ri EA=[Ri];
  • 16. •A variable is represented by allocating a register or a memory location to hold its value. •Two addressing modes to access variables:- 1) Register mode:-The operand is the contents of a processor register . •Operand is held in register named in address file •EA = R •Limited number of registers •Very small address field needed Shorter instructions Faster instruction fetch •Move LOC,R1
  • 17. 2) Absolute mode:- •The operand is in a memory location. •The address of this location is given explicitly in the instruction . •It is also called Direct mode. •Declaration such as • Integer A,B
  • 18. Address and data constants can be represented in assembly level language using Immediate mode •Immediate mode:- The operand is given explicitly in the instruction. •Example – Move 200immediate ,Ro •The common convention is to be used the sharp sign(#) in front of the value of the use as in immediate operand. • Move #200, Ro
  • 19. •The register or memory location that contains the address of an operand is called a pointer. •Indirection is the ability to reference something using a name, reference, or container instead of the value itself. •The most common form of indirection is the act of manipulating a value through its memory address. •For example, accessing a variable through the use of a pointer. •Indirection and use of pointers are important and powerful concepts in programming.
  • 20. •Indirectmode:- • The effective address of the operand is the contents of register or memory location whose address appears in the instruction. •Memory cell pointed to by address field contains the address of (pointer to) the operand. •e.g. ADD (A) Add contents of cell pointed to by contents of A to accumulator • Add (R2),R1
  • 21. •Indexing provide the different kind of flexibility for accessing operands. •It is useful in dealing with lists and array. •IndexMode:- •The effective address of the operand is generated by adding a constant value to the contents of a register.
  • 22. •The register used may be special register provided for this purpose or general –purpose register called index register. • X(Ri) • EA=X+[Ri] •Where X denoted the constant value contained in the instruction, •And Ri is the name of the register involved.
  • 23. •Relative Mode:- •The effective address is determined by the index mode using the PC in the place of general purpose register Ri. • EA=[Ri]+PC •i.e. get operand from Ri cells from current location pointed to by PC •The mode can be used access data operands. •Most common used in to specify the target address in branch instruction. • Branch>0 LOOP
  • 24. Auto increment mode:- (Ri)+ • The effective address of the operand is the contents of a register specified in the instruction. • After accessing the operand ,the contents of this register are automatically incremented to point to the next item. • Auto Decrement mode:- -(Ri) • The contents of a register specified in the instruction are first automatically decremented. • After that used as the effective address of the operand.