This is the patent that started it all, and for which I am eternally grateful to Ellen Domb for 1st teaching me TRIZ in 1999. Thank you Ellen, you Rock

1. Integrated System Level Solution:
Embedded Silicon
within Rigid Core with Heat-pipe
Technology
By Richard Platt
(Former) Technology Development Program
Manager Server Board & System
Technology

2. Why the Need for this Concept?
Inventor’s Comment: Intel has many researchers,
engineers & Intel Fellows working on evolving the
technologies for the silicon device and component level.
However I did not see the same amount and level of
investment of R&D resources being allocated at the
board or system level.
• This is especially of concern to the inventor since coming to
understand TRIZ (Theory of Inventive Problem Solving) that
evolving the technology in the super-system direction is just as an
important technology vector to pursue as the sub-system level
(where the primary focus is occurring within Intel today[1999]).
This concept is one of many potential concepts that
attempts to address evolvement of the technology to
the super-system. (Hopefully to block our competitors
from potentially outmaneuvering Intel in the
marketplace.)

3. Technology Trends Driving the Market
(1999)
#1 TREND: The Increasing # of I/O in IA; according to Moore’s Law*
states that # of transistors doubles on silicon devices every 18-24
months.
This trend is driving the need for a enabling technologies to be
developed for the individual device, (i.e. wafer level), as well as at the
component level, board level and system levels to address the scaling
challenges.
– INVENTIVE SOLUTION NEEDED TO ADDRESS:
• Increasing complexity & decrease in size vs. Thermal management and Manufacturability
– [(I): Device Complexity vs. (W): Use of energy by stationary Object].
And/Or combinations
– [(I): Area of Stationary Object vs. (W): Object Generated Harmful Factors].
‘Moore’s Law’ correlates to the ‘Law of Ideality’ in TRIZ;
Law of Ideality = All engineering systems, evolve over time,
providing greater performance, functionality and benefit at lower
cost and have less detrimental aspects as a part of their design
and manufacture.

4. Technology Trends Driving the Market
#2 TREND: With the increase in the # of I/O in IA; there are
greater demands for more power for supporting the devices,
especially in the Server and Desktop product spaces (inventor’s
background), as well as in the mobile and networking product
spaces.
– INVENTIVE SOLUTION NEEDED TO ADDRESS:
• Increase in speed vs. Increased need to dissipate thermal energy
– [(I): Speed vs. (W): Temperature]
• Increase in thermal energy dissipation vs. small volumetric area.
– [(I): Use of energy by a Stationary Object vs. (W): Area of Stationary Object]
#3 TREND: With the increase in the # of I/O in IA; the pitch of I/O
balls both from die-to-package and package-to-board is shrinking
– INVENTIVE SOLUTION NEEDED TO ADDRESS:
• Decrease in size vs. Manufacturability
– [(I): Area of Stationary Object vs. (W): Manufacturing Precision or Ease of
Manufacture].
– [(I): Quantity of a substance vs. (W): Ease of Manufacture or Manufacturing
Precision]

5. Double-Sided Silicon Devices-In-Board (DSSDIB) –
Embedded processors (current component designs
using gold bumps or gold wire) in Imprinted Circuit
Boards w/ rigid cores.
MLB: Multi-Layer Board
Bump contact pads
Std Via (10mil drill/ 13mil fin)
Embedded Thermal
µ-Via (4-6mil buried & blind) Heat-pipe
Cu thermal transfer plate
Silicon Device (Processor)
Silicon Device (Processor)
Rigid
Core
– Al ?
Silicon device Thermal conductive Adhesive/Grease
Conductive Adhesive
Silver filled Resin or Epoxy
Standard trace for routing on outer layer
Intel Patent Holder: Richard Platt
Technology Development
Intel Program Manager

6. Double-Sided Silicon Devices-In-Board (DSSDIB)
1. The processor is embedded w/in the PCB through the machining/molding process of the
rigid core and then imprinting the underside of the multi layer substrate to create a
routing cavity.
2. Silver filled epoxy is used on the top side of the component between the rigid core
material lining, (likely nickel plated copper for the lining due to thermal transfer
capabilities and aluminum for the rigid core).
3. The bottom of the imprinted cavity with the trace connections and the metal contact
pads come in contact with the gold bumps of the silicon device is coated with a
electrically conductive adhesive.
3. The heat-pipe running through the rigid core, essentially acts as a radiator close to the
processor thermally heat-sinking the thermal energy into the liquid w/in the heat-pipe.
Then through osmotic process of the thermal heat-pipe itself it transfers the heated
liquid/gas to an external cooling source, (i.e. fan) that vents the thermal energy out of
the system. This technology is already in use on laptops today.
4. This approach integrates all those technologies together along w/ the rigid core which
provides additional rigidity and strength to already heavy and dense PCBs. The rigid
core acts as stabilizer.
5. Traces (I/O), can then route out on the same layer as where the ball pads connect, and
then using μ-vias the design engineer can then route to the primary side, (top surface),
of the PCB.
6. Instead of needing the package to manage the environment, now the PCB can be the
protective package around the silicon.
7. Cost savings are significant w/ integrating the silicon directly into the substrate &/or
the rigid core.
8. The rigid core is coated w/ a non-conductive film to prevent electrical shorts.
9. Opportunity to do side access fiber optics integrated into silicon and edge of substrate.
(not shown).

7. Rigid Core
2 Plates A & B > Aligned with Pins > R.C. Through Holes Drilled or molded
> Heat Pipe Cavity > Retainer Rails > Silicon Device Cavity
Through Holes Drilled into
Rigid Core
Silicon Cavity
Alignment Pins
Retainer Rails
Heat Pipe Cavity
Note: NOT TO SCALE -- R.C. Thickness TBD
Cutaway Drawing Set—Not a manufacturing Flow!

8. Embedded Components
Cu Thermal Plate > Silver Epoxy > Silicon Device
Silicon Device
(Gold Bumped)
Silver Epoxy
Cu Thermal

9. High Density Interconnect Printed
Circuit Board (HDI PCB)
PCB Constructed > PCB mounted to respective half of Rigid Core via alignment
Pins and PCB registration holes
Note: Surface Mount Components Only (includes I/O Connectors)
Bare HDI Foil PCB mounts to
Rigid Core

10. Final Assembly
All Components are S.M.T. > Heat Pipe & Condenser > Side A/B Joined
S.M. Connectors w/
Attachment into R.C.
Side A/B Join
(Registration Apparatus TBD)
Heat Pipe / Condenser
Assembled into core
S.M. I/O Connectors

11. Final Assembled Unit
Enhanced electrical performance
Efficient thermal solution
Increased reliability
Low Profile
Lowest Total Cost product
Total Solution space =
70% Mfg & Assy process technologies + 30% product technology

12. Risk Assessment of Technology Effort
Technology Evaluation
Criteria Metric Multiplier Ranking Notes / Comments
need to bring in New Processes, such as
HDI-PCB capability, rigid core technology
w/ integrated heat pipes, all SMT solutions
Ease of Manufacturability
for connectors would need to be developed.
Specialty Manufacturing (I have new IP I am generating for that.)
Process Yes = 1; No = 10 1 1
would need to develop a prototype line 1st
Materials stage: lab,
lab = 1, prototype = 3, in house to get the capability up and
prototype, development or
development = 5, production = determine what the costs and issues would
production?
7 1 1 be to develop into a HVM line.
HDI is standard technology readily available
Is material specialty or today. Aluminum rigid core can be done
commodity? specialty = 5, commodity = outside --outsourced in the short term.
10 1 10
Comaparitive against one Do not personnaly know of any other
project versus another. approach that attempts a higher level of
Practical (least amount of
Multiplier of other metrics w/in integration with the exception of Sun and
effort for gain achieved)
the technology evaluation IBM as comparitive systems
criteria 1 1
Vendor known yes = 10, no = Grohmann Engineering
known vendor - sole supplier 5. Sole supplier = 5, multiple
suppliers = 10 1 10
Intel IP Y = 10; N = 1. Have IDF's already submitted last year
to x-license from someone
licensing or legal issues
else = 5 Ability to x-license to
others = 10 1 20
Total system cost would be lower and
POR cost = 5, more than enables a more efficient thermal x-fer
cost
POR cost = 1, less than POR mechanism than what is used today. No
cost = 10 1 10 need to entertain refrigeration as a solution
Grohmann Engineering, Fraunhofer Insititute
availability of engineering and others have seen this and believe that it
know-how (internal /external / is a viable approach with the manufacturing
none availale) internal = 10, external = 5, capabilities that exist today.
none available = 0 1 5
This would have to be a path pursued for a
integration w/ VF
Y = 10, No = 5 1 10 FOF model
R&D resources available Extremely controversial approach, and
(internal/external/none internal = 10, external = 5, requires an new perspective on architecture
available) none available = 0 1 0 and business model
Characteristics of Disruptive
Technology are: simpler,
Is it disruptive technology? cheaper & lower perfoming.
(Will this provide signifcant Yes = 1; No = 0, Generally
competitive promise lower margins, not
advantage/compelling value higher profits. Yes = 1; No =
add to feature set) 0, Intel's main customer's
can't use the technology and
don't want it Yes = 1; No = 0, 5 X 5 25
IDF submitted Yes = 10; No = 1 1 10

13. Technology Evaluation
Criteria Metric Multiplier Ranking Notes / Comments
No cost benefit to BOM,
process, test, silicon or
platform costs = 1 Potential
Unit Cost Impact cost reduction to BOM,
process, test, silicon or
platform costs = 5 Clear cost
benefit to BOM, process, test,
silicon or platform costs = 10 1 10
Technology dramtically
changes the way Intel does
business or introduces more
business risk = 1
Implication to Business Manageable risks and
Model changes to business model =
5 Technology leverage or
improves business model or
represetns low / mitigateable
business risk =10 1 1
Technology does not Unknown. Would need a full in depth
demonstrate a return on finance analyst to investigate this. No
investment = 1 Technology resources currently allocated to support
demonstrates a potential
Return on Investment
return on investment = 5
Technology demonstrates a
clear return on investment =
10
Yes, since you would develop this in-house
and only select one of your customersw to
work with on this to develop the prototypes
Reasonable business risk to prove out the business model and the
technology. Business model now moves to
entire PCB being delivered to OEM, end-
Yes = 10; No = 1 1 10 user,
Technology is limited to 1 or
2 products and/or market
segments = 1 ; Technology
can be applied across market
Applicability
segments but is limited to
either cpu or non cpu.= 5
Technology can be applied
across market segments and
cpu and non cpu.= 10 1 10
Technology is limited to 1
generation = 1 ; Technology
can be applied across multiple
generations but limited
Scaleability
segments = 5 ; Technology
can be applied across multiple
generations and segments =
10 1 10
Intel has very little control of
I/P = 1 Intel will share
I/P control
technology I/P with supplier =
5 Intel owns I/P = 10 1 10

14. Technology Evaluation
Criteria Metric Multiplier Ranking Notes / Comments
Technology will take 3 to 5
years to develop = 1
Technology maturity/ Time to Technology will take 2 to 4
development years to develop = 5
Technology will take 1 to 3
years to develop = 10 1 1
Technology will have limited
benefit and is really an
extension of existing
technology =1 Technology
Potential benefit
will provide performance or
cost benefit = 5 Technology
will provide performance and
cost benefit = 10 1 10
Technology may have
significant reliable issues.
Will require significant effort
and >4 years develop = 1
Technology may have some
Risk
reliable issues. Will require
moderate effort and 2 to 4
years to develop = 5
Technology may has no
apparent reliable 1 1
52

15. (Quick) Patent Strength Analysis
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Citations Citations
Cooling device with thermally 6292366 7294529 Method for embedding a component in a base
5793611 separated electronic parts on a
monolithic substrate
Printed circuit 7286359 Use of thermally conductive vias to extract heat from
board with microelectronic chips and method of manufacturing
Cooling multi-chip modules using
5355942 embedded
embedded heat pipes
integrated circuit
7176382 Electrical circuit board and method for making the
5306866 Module for electronic package
same
Heat pipe-electrical interconnect 7165321 Method for manufacturing printed wiring board with
5199165 embedded electric device
integration method for chip modules
Apparatus for mounting a 6991966 Method for embedding a component in a base and
4774630 semiconductor chip and making forming a contact
electrical connections thereto
4739443 Thermally conductive module 6788537 Heat pipe circuit board
6680441 Printed wiring board with embedded electric device
4734315 Low power circuitry components and method for manufacturing printed wiring board
with embedded electric device
High density packaging technique for 6490159 Electrical circuit board and method for making the
4631636 electronic systems same
4327399 Heat pipe cooling arrangement for
integrated circuit chips