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LOGIC FRUIT TECHNOLOGIES
   July 2012




Your Partner in System Design
                                © 2010 Logic Fruit Technologies All
COMPANY OVERVIEW
About

    • Since the time of establishment in Nov 2009, Logic Fruit Technologies has been providing System Design Services, with
      Expertise in High Speed Serial Protocol Design. The services included FPGA Development, Board Bring up, Embedded and
      Host level SW development and Validation. We have expertise in DSP Development .
    • The team comprises of Highly Skilled and Experienced Engineers from reputed Institutes like IIT and NIT.


                                                                        FPGA Development


                                                                     Software Embedded/Middle
                                                                             Layer/GUI


                                                                      Integration & Validation



Core Competence                                                           Business Models
EXPERTISE ON STANDARDS / DSP
        Have years of experience on working serial protocols like
    PCIe, HDMI,DigRFv4, OBSAI, MIPI – Dphy, Mphy etc.
        WiMAX (802.16e), LTE (4G), and Wi-FI (802.11n                     •   Our Engineers     •   Completely         •   Milestone based
                                                                               work for you          managed by             payment
                                                                               onsite and            Logic-Fruit team   •   Royalty based
SOFTWARE DEVELOPMENT EXPERIENCE                                                offshore and in       based on fixed         payments
                                                                               a mix of              cost.
         With >100 years of combined development experience                   onsite/offshore
    spread over Embedded software and desktop based                            model, we
    applications                                                               charge them by
                                                                               the Time and
                                                                               Materials
FPGA DEVELOPMENT EXPERIENCE                                                                                             Flexible
                                                                           Consulting            Fixed Price
          Have owned complete cycles of FPGA development from             Model                 Project
                                                                                                                        payment
specification to Board.                                                                                                 option

          >75 Years of experience with High density FPGA

DEBUGGING/ TROUBLE SHOOTING
        Have expertise in using debugging tool like Chip-
CORE VALUES
Vision                                                      Mission
• To be known as the exclusive system design partner for    Our Mission can be summarized as below:
  engineering space.                                        • Strengthen ourselves as a preferred partner for Test and
                                                              Measurement industry.
                                                            • Provide expert domain knowledge and leading technical
                                                              consultancy to achieve clients’ business results in the
                                                              embedded/Semiconductors domain.




Values                                                      Ethics
The greatest potentials for the growth of any company are   We believe in a core set of ethics to promote high standards
generated by a commitment to high corporate values. The     of practice at workplace:
values that we firmly believe in and that drive us:         •Integrity and Transparency
•Client focus                                               •Fair employment practices
•Leadership by Example                                      •Diversity and inclusion
•Excellence                                                 •Health and safety
•Respect                                                    •Environmental protection
•Communication
SERVICES
                                       Execution Experience


PCIE GEN3 ANALYZER (AXIE                 PCIE-GEN3 PROTOCOL TEST                DPHY EXERCISER SOLUTION
Based) -                                 COMPLIANCE –Royalty based              (FOR DSI AND CSI-2) -
• FPGA consultant to                     complete project execution             • Contributed as FPGA and Software
• FPGA/ SW Integrations efforts          • Test case implementation in FPGA       consultant
• FPGA development for additional        • Test case implantation in software   • FPGA/ SW Integrations efforts
  features                               • Validation/debugging the test case   • FPGA development for additional
                                           behavior with customer’s Device        features
                                           under test                           • Creating verification and validation
PCIE GEN3 EXERCISER -                    • Discussion with PCI-SIG members        environment
                                           for various test cases
• Software and FPGA consultants to
• Firmware, host software design and
  development                                                                   DPHY ANALYZER SOLUTION (FOR
• Initial board turn on                  DIGRFV4 PROTOCOL                       DSI AND CSI-2) -
                                           COMPLIANCE SUIT -                    • Contribution as FPGA and Software
• Supported Hardware-FPGA-
  software Integration                   • Formulated the test cases from         consultants
                                           DigRFV4 specification                • Firmware, host software design and
• Implemented PCIe LTSSM test
  case for Automated testing             • Implementation of the test case in     development
                                           software                             • Supported Initial board turn on
                                         • Validation of the test cases on      • Hardware-FPGA-software
                                           different devices under test           Integration
HDMI PROTOCOL
ANALYZER/GENERATOR -                                                            • Created verification and validation
                                                                                  environment
• Development of HDMI protocol
  analyzer/generator
                                                                                CPRI PROTOCOL FPGA
• Ported a HDMI ASIC on                                                         PROTOTYPING –
  FPGA, doing HDMI processing of                                                Porting of CPRI protocol from ASIC
  digital data                                                                  to FPGA
• Integrated the old HDMI compliance                                            • Working at 10Gbps
  tool into new solution                                                        • Providing Expertise solutions in
• Supported all 64 VIC + 4 4k2k                                                   FPGA and DDR interface
  formats
DSP RELATED EXPERIENCE
DSP related experience

 Implementation of PHY layer of wireless standards that include WiMAX (802.16e), LTE (4G), and Wi-FI (802.11n).
Language: MATLAB, C++, Verilog . Tools: ModelSim 6.4, Xilinx (XST 10.3), Plan-Ahead. Target Device: Virtex5
Responsibilities:
Algorithm development, Fixed Point Implementation and Architecture definition using MATLAB and C++.
Algorithm Design and RTL implementation of IPs including,
               -Signal Processing Blocks like DFT, FFT, and Filters.
               -Forward Error Correction Blocks like Viterbi Decoder, LDPC Encoder/Decoder, and Inter-leaver.
               -Matrix Processing Blocks like Matrix Inverse, QR/SVD Decomposition.
               -Video Compression and De-Compression blocks like DCT, AES, Entropy encoding.
               -RTL Implementation, Functional Verification and Code Coverage using Modelsim and Cygwin
Synthesis and timing analysis/simulation using Xilinx XST.
Placement/Routing on FPGA using Plan Ahead.
Porting, Debugging and Testing of entire design on FPGA.

 Ultra High Data Rate Wireless Video Transfer Device
Outline: In this project an FPGA prototype for wireless transfer of uncompressed video using UWB (Ultra Wide Band) and Wi-Fi
(802.11n) MIMO-OFDM technologies was designed
Language: MATLAB, C++, Verilog. Tools: Cygwin, ModelSim, ISE. Target Device: Virtex5
Responsibilities:
Wireless frequency planning, standardization and testing.
Defining system level architecture for the baseband.
Designing of different signal processing algorithms for wireless communication like AGC, Packet Acquisition, IQ
mismatch, Time Synchronization, Frequency Synchronization, Channel Estimation, PAPR reduction etc.
Performing System level BER simulation and fixed-point simulations.
Defining RF specifications like ADC/DAC bit width LO phase noise, LNA noise floor, receiver sensitivity, etc.
Preparing hardware specification document and generating test-vector for Verilog blocks.
Co-verification of RTL using test-vector generated by MATLAB.
Debugging of RF and Digital boards.
Successful demonstration of wireless video transfer at a distance of 10 feet.
KEY DIFFERENTIATORS
FPGA                                                                            Software




  •Experts in Implementing high speed standards on                                             •Expertise on concept to product development
   FPGA based platform                                                                         •Experts with system design involving HW & SW
  •Experts in Synthesizable Protocol IP Development.                                            integration
  •Experts working with Xilinx Virtex series and Altera                                        •Experts in desktop applications/tools for protocol
   Stratix series                                                                               analysis
  •Handled High-Speed design running at 250Mhz, 80%                                            •Expertise on VS-2008 with C++, C#, WPF etc.
   of FPGA full.                                                                               •Software engineering with expertise on protocols
  •Handled multiple clocks domain in FPGA, Multi-Gigabit                                       •Expertise on reverse engineering/ platform porting
   Transceivers
  •Experts in DDR IP’s like DDR2 and DDR3
  •Experts in debugging with ChipScopes, Signal Tap and
   LA
  •Experts in Strategy
Developmentsynthesis, Place & Route and achieving
   Timing closure

                      Efficiently                                                                    Custome
                        Meet                                  speedy                                     r
                                                            customizatio                             Satisfacti
                      Customer                                   n
                      Requireme Compact, lean                                                           on        Effective EMS
                         nt     operation size                                                                    management
                                                                           Efficient product
                                                                           engineering
                                                                           capability


                                    Experienced, skillful
                                                                                                                  Competitive Cost
                                    production Team
TEAM
Management Bios

SANJEEV KUMAR, Co-Founder
• Sanjeev Kumar started his first venture in his school days and extended the same passion for entrepreneurship as well. Sanjeev, an
  hardware engineer from heart is driving innovation and exploring new business and technology. His role is to develop and promote
  company’s future technology leadership.
ROHIT JOSHI, Co-Founder
• Rohit Joshi takes care of global delivery. He has overseen the operations from the inception of Logic Fruit. He is involved in policies and
  strategy formulation, projecting company’s capabilities to external stakeholders, business community and society. Rohit is a embedded
  software expert. Rohit has lots of experience and passion for using technology for empowering businesses
ANIL NIKHRA, Co-Founder
• Anil Nikhra is responsible for the formation, monitoring, and management of Logic Fruit policies and strategies, negotiating and assisting
  with management turnaround, and solving legal related issues with advice to Board on matters of function and operation. Anil has earned
  ample technical experience in embedded and desktop application . Anil is a leading thinker and practitioner helping clients recognize the
  impact of new technologies on their business models.




 Technical Team

35

30          Q1        Q2
            Q3        Q4
25
                                                                                                  Others
20                                                                                                 25%

15

10                                                                                                                IIT/NIT/DCE
                                                                                                                      75%
 5

 0
              FY 10                   FY 11                   FY 12
CLIENTS & PARTNERS
Clients




            1)   Agilent Technologies (US and Europe)
            2)   BitIfEye Digital Solutions (Europe)
            3)   Freescale India
            4)   Questtech (US)




Strategic Partners




            1) DByDx (India)
            2) IP-Nest (Europe)
            3) InStryde (US)
CONTACT
                                Logic Fruit Technologies appreciates your partnership!




                                                                                       Rohit Joshi
                                                                         Rohit.joshi@logic-fruit.com
                                                                          Phone: +91 9910 357 158

                                                                         Logic Fruit Technologies
                                                                                      806, 8th floor,
                                                                                BPTP Park Centra,
                                                                               Sector 30, Gurgaon,
                                                                                     Haryana, India
                                                                                     PIN – 122 001
                                                                               www.logic-fruit.com
Your Partner in System Design

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Logic Fruit Technologies

  • 1. LOGIC FRUIT TECHNOLOGIES July 2012 Your Partner in System Design © 2010 Logic Fruit Technologies All
  • 2. COMPANY OVERVIEW About • Since the time of establishment in Nov 2009, Logic Fruit Technologies has been providing System Design Services, with Expertise in High Speed Serial Protocol Design. The services included FPGA Development, Board Bring up, Embedded and Host level SW development and Validation. We have expertise in DSP Development . • The team comprises of Highly Skilled and Experienced Engineers from reputed Institutes like IIT and NIT. FPGA Development Software Embedded/Middle Layer/GUI Integration & Validation Core Competence Business Models EXPERTISE ON STANDARDS / DSP  Have years of experience on working serial protocols like PCIe, HDMI,DigRFv4, OBSAI, MIPI – Dphy, Mphy etc.  WiMAX (802.16e), LTE (4G), and Wi-FI (802.11n • Our Engineers • Completely • Milestone based work for you managed by payment onsite and Logic-Fruit team • Royalty based SOFTWARE DEVELOPMENT EXPERIENCE offshore and in based on fixed payments a mix of cost.  With >100 years of combined development experience onsite/offshore spread over Embedded software and desktop based model, we applications charge them by the Time and Materials FPGA DEVELOPMENT EXPERIENCE Flexible Consulting Fixed Price  Have owned complete cycles of FPGA development from Model Project payment specification to Board. option  >75 Years of experience with High density FPGA DEBUGGING/ TROUBLE SHOOTING  Have expertise in using debugging tool like Chip-
  • 3. CORE VALUES Vision Mission • To be known as the exclusive system design partner for Our Mission can be summarized as below: engineering space. • Strengthen ourselves as a preferred partner for Test and Measurement industry. • Provide expert domain knowledge and leading technical consultancy to achieve clients’ business results in the embedded/Semiconductors domain. Values Ethics The greatest potentials for the growth of any company are We believe in a core set of ethics to promote high standards generated by a commitment to high corporate values. The of practice at workplace: values that we firmly believe in and that drive us: •Integrity and Transparency •Client focus •Fair employment practices •Leadership by Example •Diversity and inclusion •Excellence •Health and safety •Respect •Environmental protection •Communication
  • 4. SERVICES Execution Experience PCIE GEN3 ANALYZER (AXIE PCIE-GEN3 PROTOCOL TEST DPHY EXERCISER SOLUTION Based) - COMPLIANCE –Royalty based (FOR DSI AND CSI-2) - • FPGA consultant to complete project execution • Contributed as FPGA and Software • FPGA/ SW Integrations efforts • Test case implementation in FPGA consultant • FPGA development for additional • Test case implantation in software • FPGA/ SW Integrations efforts features • Validation/debugging the test case • FPGA development for additional behavior with customer’s Device features under test • Creating verification and validation PCIE GEN3 EXERCISER - • Discussion with PCI-SIG members environment for various test cases • Software and FPGA consultants to • Firmware, host software design and development DPHY ANALYZER SOLUTION (FOR • Initial board turn on DIGRFV4 PROTOCOL DSI AND CSI-2) - COMPLIANCE SUIT - • Contribution as FPGA and Software • Supported Hardware-FPGA- software Integration • Formulated the test cases from consultants DigRFV4 specification • Firmware, host software design and • Implemented PCIe LTSSM test case for Automated testing • Implementation of the test case in development software • Supported Initial board turn on • Validation of the test cases on • Hardware-FPGA-software different devices under test Integration HDMI PROTOCOL ANALYZER/GENERATOR - • Created verification and validation environment • Development of HDMI protocol analyzer/generator CPRI PROTOCOL FPGA • Ported a HDMI ASIC on PROTOTYPING – FPGA, doing HDMI processing of Porting of CPRI protocol from ASIC digital data to FPGA • Integrated the old HDMI compliance • Working at 10Gbps tool into new solution • Providing Expertise solutions in • Supported all 64 VIC + 4 4k2k FPGA and DDR interface formats
  • 5. DSP RELATED EXPERIENCE DSP related experience  Implementation of PHY layer of wireless standards that include WiMAX (802.16e), LTE (4G), and Wi-FI (802.11n). Language: MATLAB, C++, Verilog . Tools: ModelSim 6.4, Xilinx (XST 10.3), Plan-Ahead. Target Device: Virtex5 Responsibilities: Algorithm development, Fixed Point Implementation and Architecture definition using MATLAB and C++. Algorithm Design and RTL implementation of IPs including, -Signal Processing Blocks like DFT, FFT, and Filters. -Forward Error Correction Blocks like Viterbi Decoder, LDPC Encoder/Decoder, and Inter-leaver. -Matrix Processing Blocks like Matrix Inverse, QR/SVD Decomposition. -Video Compression and De-Compression blocks like DCT, AES, Entropy encoding. -RTL Implementation, Functional Verification and Code Coverage using Modelsim and Cygwin Synthesis and timing analysis/simulation using Xilinx XST. Placement/Routing on FPGA using Plan Ahead. Porting, Debugging and Testing of entire design on FPGA.  Ultra High Data Rate Wireless Video Transfer Device Outline: In this project an FPGA prototype for wireless transfer of uncompressed video using UWB (Ultra Wide Band) and Wi-Fi (802.11n) MIMO-OFDM technologies was designed Language: MATLAB, C++, Verilog. Tools: Cygwin, ModelSim, ISE. Target Device: Virtex5 Responsibilities: Wireless frequency planning, standardization and testing. Defining system level architecture for the baseband. Designing of different signal processing algorithms for wireless communication like AGC, Packet Acquisition, IQ mismatch, Time Synchronization, Frequency Synchronization, Channel Estimation, PAPR reduction etc. Performing System level BER simulation and fixed-point simulations. Defining RF specifications like ADC/DAC bit width LO phase noise, LNA noise floor, receiver sensitivity, etc. Preparing hardware specification document and generating test-vector for Verilog blocks. Co-verification of RTL using test-vector generated by MATLAB. Debugging of RF and Digital boards. Successful demonstration of wireless video transfer at a distance of 10 feet.
  • 6. KEY DIFFERENTIATORS FPGA Software •Experts in Implementing high speed standards on •Expertise on concept to product development FPGA based platform •Experts with system design involving HW & SW •Experts in Synthesizable Protocol IP Development. integration •Experts working with Xilinx Virtex series and Altera •Experts in desktop applications/tools for protocol Stratix series analysis •Handled High-Speed design running at 250Mhz, 80% •Expertise on VS-2008 with C++, C#, WPF etc. of FPGA full. •Software engineering with expertise on protocols •Handled multiple clocks domain in FPGA, Multi-Gigabit •Expertise on reverse engineering/ platform porting Transceivers •Experts in DDR IP’s like DDR2 and DDR3 •Experts in debugging with ChipScopes, Signal Tap and LA •Experts in Strategy Developmentsynthesis, Place & Route and achieving Timing closure Efficiently Custome Meet speedy r customizatio Satisfacti Customer n Requireme Compact, lean on Effective EMS nt operation size management Efficient product engineering capability Experienced, skillful Competitive Cost production Team
  • 7. TEAM Management Bios SANJEEV KUMAR, Co-Founder • Sanjeev Kumar started his first venture in his school days and extended the same passion for entrepreneurship as well. Sanjeev, an hardware engineer from heart is driving innovation and exploring new business and technology. His role is to develop and promote company’s future technology leadership. ROHIT JOSHI, Co-Founder • Rohit Joshi takes care of global delivery. He has overseen the operations from the inception of Logic Fruit. He is involved in policies and strategy formulation, projecting company’s capabilities to external stakeholders, business community and society. Rohit is a embedded software expert. Rohit has lots of experience and passion for using technology for empowering businesses ANIL NIKHRA, Co-Founder • Anil Nikhra is responsible for the formation, monitoring, and management of Logic Fruit policies and strategies, negotiating and assisting with management turnaround, and solving legal related issues with advice to Board on matters of function and operation. Anil has earned ample technical experience in embedded and desktop application . Anil is a leading thinker and practitioner helping clients recognize the impact of new technologies on their business models. Technical Team 35 30 Q1 Q2 Q3 Q4 25 Others 20 25% 15 10 IIT/NIT/DCE 75% 5 0 FY 10 FY 11 FY 12
  • 8. CLIENTS & PARTNERS Clients 1) Agilent Technologies (US and Europe) 2) BitIfEye Digital Solutions (Europe) 3) Freescale India 4) Questtech (US) Strategic Partners 1) DByDx (India) 2) IP-Nest (Europe) 3) InStryde (US)
  • 9. CONTACT Logic Fruit Technologies appreciates your partnership! Rohit Joshi Rohit.joshi@logic-fruit.com Phone: +91 9910 357 158 Logic Fruit Technologies 806, 8th floor, BPTP Park Centra, Sector 30, Gurgaon, Haryana, India PIN – 122 001 www.logic-fruit.com Your Partner in System Design