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Modeling and Simulation Of Three Phase-Four Wire Compensated
   System Using The H-Bridge VSI Topology-Based DSTATCOM
        INDRANIL SAAKI1, N UDAY BHANU2, CHALLA KRISHNA RAO3, D.SHANKAR PRASAD4
                      1
                        Student, Department of EEE, Gitam University, Visakhapatnam- 530 045
                     2
                       student, Department of EEE,St.Theressa college, Visakhapatnam- 530 045
                     3
                       student, Department of EEE,St.Theressa college, Visakhapatnam- 530 045
          4
           Assistance Professor,HOD, Department of EEE, St.Theressa college, Visakhapatnam- 530 045
  1
    Email: indranil.saaki@gmail.com ,2 Email : neelauday@gmail.com ,3Email : krishnarao.challa@gmail.com ,
                                        4
                                         Email : dshankarprasad@gmail.com

Abstract—The Transient response of the distribution static compensator (DSTATCOM) is very important while
compensating rapidly varying unbalanced and nonlinear loads. Any change in the load affects the dc link voltage
directly. The sudden removal of load would result in an increase in the dc link voltage above the reference value
where as a sudden increase in the load would reduce the dc link voltage below its reference value. The proper
operation of DSTATCOM requires variation of the DC link voltage within the prescribed limits. Conventionally, a
proportional-integral (PI) controller is used to maintain the dc-link voltage to the reference value. It uses the
deviation of the capacitor voltage from its reference value as its input. However, the transient response of the
conventional PI dc-link voltage controller is slow. In this paper, a fast acting dc-link voltage controller based on the
energy of the dc-link capacitor is proposed and proposed shunt controller method by using PQ-Theory.
Mathematical equations are given to compute the gains of the conventional controller based on the fast-acting dc-
link controllers to achieve similar fast transient response. The detailed simulation studies are carried out to validate
the proposed controller.
Index Terms—DC-link voltage controller, distribution static compensator (DSTATCOM), fast transient response,
harmonics, load compensation, power factor, power quality, unbalance and voltage-source inverter (VSI) , PQ-
Theory.
I. INTRODUCTION
          The proliferation of the power electronics-based equipment, nonlinear and unbalanced loads, has
aggravated the power quality (PQ) problems in the power distribution network. They cause excessive neutral
currents, over heating of electrical apparatus, poor power factor, voltage distortion, and high levels of neutral –to-
ground voltage, and inference with communication systems. The literature records the evolution of different custom
power devices to mitigate the power-quality problems by injecting the voltages/currents or both in to the system.
          The shunt connected custom power device, called the distribution static compensator (DSTATCOM),
injects current at the point of common coupling (PCC) so that harmonic filtering, power factor correction, and load
balancing can be achieved. The DSTATCOM consists of a current-controlled voltage source inverter (VSI) which
injects current at the PCC through the interface inductor. The operation of VSI is supported by a dc storage capacitor
with proper dc voltage across it.
          One important aspect of the compensation is the extraction of reference currents. Various control
algorithms are available in literature to compute the reference compensator currents. However, due to simplicity in
formulation and no confusion regarding the definition of powers, the control algorithm based on instantaneous
symmetrical component theory is preferred. Based on algorithm, compensator reference currents (                    are
given as follows:

                                      (              )/(          +    )}
    =                                        +                                                       (1)
            {(                                       /(    +
Where =tanφ/√3 and φ is the desired phase angle between the supply voltages and compensated source currents in
the respective phases. For unity power factor operation, φ=0, thus =0. The term           is the dc or average value of
the load power. The term        in the above equations accounts for the losses in the VSI without any dc loads in its dc
link. To generate     , a suitable closed loop dc link voltage controller should be used, which will regulate the dc
voltage to the reference value.
For the DSTATCOM compensating unbalanced and nonlinear loads, the transient performance of the
compensator is decided by the computation time of average load power and losses in the compensator. In most
DSTATCOM applications, losses in the VSI are a fraction of average load power. Therefore, the transient
performance of the compensator mostly depends on the computation of        . In this paper,      is computed by
using a moving average filter (MAF) to ensure fast dynamic response. The settling time of the MAF is a half-cycle
period in case of odd harmonics and one cycle period in case of even harmonics present in voltages and currents.
Although the computation of       is generally slow and updated once or twice in a cycle, being a small value
compared to           it does not play a significant role in transient performance of the compensator.
          In some of the electric power consumers, such as the telecommunication industry, power electronic drive
applications there is a requirement for ac as well as dc loads. The telecommunication industry uses several parallel-
connected switch-mode rectifiers to support dc bus voltage. Such an arrangement draws nonlinear load currents
from the utility. This causes poor power factor and hence more losses and less efficiency. Clearly, there are PQ
issues, such as unbalance, poor power factor, and harmonics produced by telecom equipment in power distribution
networks. Therefore, the functionalities of the conventional DSTATCOM should be increased to mitigate
aforementioned PQ problems and to supply the dc loads from its dc link as well. The load sharing by the ac and dc
bus depends up on the design and rating of VSI. This DSTATCOM differs from the conventional one in the sense
that its dc link not only supports instantaneous compensation but also supplies dc loads.
          However, when the dc link of the DSTATCOM supplies the dc load as well, the corresponding dc power is
comparable to the average load power and hence plays a major role in the transient response of the compensator.
Hence there are two important issues. The first one is the regulation of the dc link voltage with prescribed limits
under transient load conditions. The second one is the settling time of the dc link voltage controller. Conventionally,
a PI controller is used to maintain the dc link voltage. It uses the deviation of the capacitor voltage from its reference
value as its input. However, the transient response of the conventional dc-link voltage controllers is slow especially
in the applications where the load changes rapidly. Some work related to the dc link voltage controllers and their
stability is reported in [16]-[20]. However work is limited to rectifier units where switching patterns are well defined
and analysis can be easily carried out. In this paper, a fast acting dc link voltage controller based on dc link capacitor
energy is proposed. The detailed modeling, simulation and experimental verifications are given to prove the efficacy
of this fast acting dc link voltage controller. There is no systematic procedure to design the gains of the conventional
PI controller used to regulate the dc link voltage of the DSTATCOM. Herewith, mathematical equations are given to
design the gains of the conventional controller based on the fast acting dc link voltage controller to achieve similar
fast transient response.

II. DSTATCOM FOR COMPENSATING AC AND DC LOADS
        Various VSI topologies are described in the literature for realizing the DSTATCOM to compensate
unbalanced and nonlinear loads [21]-[29]. Due to the simplicity, the absence of the unbalance in the dc link voltage
and independent current tracking with respect to other phases, a three phase H-Bridge VSI topology is chosen. The
following figure.1: shows a three phase-four-wire-compensated system using H-bridge VSI topology-based
DSTATCOM compensating unbalanced and nonlinear ac load.
(Figure.1: showing a three phase-four wire compensated system using the H-bridge VSI topology-based
DSTATCOM)

          A dc load (     ) is connected across the dc link. The DSTATCOM consists of 12 insulated-gate bipolar
transistor(IGBT) switches each with an antiparallel diode, dc strorage capacitor, three isolation transformers and
three interface conductors.The statr point of the isolation transformers( ) is connected to the neutral of load( ) and
source (N). The H-bridge VSIs are connected to the PCC through interface inductors. The isolation transformers
prevent a short circuit of the dc capacitor for various combinations of switching states of the VSI. The inductance
and resistance of the isolation transformers are also included in     and    . The source voltages are assumed to be
balanced and sinusoidal. With this supply being considered as a stiff source, the feeder impedance( - ) shown in
the above figure.1: is negligible and hence it is not accounted in state-space modelling. To track the desired
compensator currents, the VSIs operate under the hysterisis band current control mode due to their simplicity, fast
response, and being independent of the load parameters [30]. The DSTATCOM injects currents in to the PCC in
such a way as to cancel unbalance and harmonics in the load currents. The VSI operation is supported by the dc
storage capacitor      with voltage       across it. The dc bus voltage has two functions, that is, to support the
compensator operationand to supply dc load. While compensating, the DSTATCOM mantains the balanced
sinusoidal source currents with unity power factor and supplies the dc load through its dc bus.

III. STATE-SPACE MODEL OF THE DSTATCOM
         For the DSTATCOM topology shown in the above Figure.1: the pairs of switches            -     and     -
are always ON and OFF in complimentary mode. The ON and OFF states of these switches are represented by a
binary logic variable    and its complement . Thus when switches          -   are ON, it implies that switches     -
     are OFF. This is represented by      =1, =0, and vice-versa. In a similar way , and             &     represent
gating signals for switches       -   ,   -    , -      ,    - , respectively. Using the notations for the system
shown in the above figure the state-space equations are written as follows:
   = Ax + Bu                                                                                      (2)
Where state vector x and input vector u are given by
x =[                      ]T                                                                      (3)
                       T
u=[                                                                                               (4)
here T is the transpose operator.
System matrix [A] and input matrix [B] are given as follows:
A=                                                                                                 (5)




B=                                                                                                 (6)



Using the above state-space model, the system state variables (x) are computed at every instant.

IV. DC-LINK VOLTAGE CONTROLLERS
         As mentioned before, the source supplies an unbalanced nonlinear ac load directly and a dc load through
the dc link of the DSTATCOM, as shown in figure.1. Due to transients on the load side, the dc bus voltage is
significantly affected. To regulate this dc link voltage, closed-loop controllers are used. The proportional-integral-
derivative (PID) control provides a generic and efficient solution to many control problems. The control signal from
PID controller to regulate dc link voltage is expressed as

   =    (                +    ∫(                    +     d(                                        (7)
    In (7),               are proportional, integral and derivative gains of the PID controller, respectively. The
proportional term provides overall control action proportional to the error signal. An increase in proportional
controller gain ( ) reduces rise time and steady-state error but increase the overshoot and settling time. An
increase in integral gain ( ) reduces steady-state error but increases overshoot and settling time. Increasing
derivative gain ( ) will lead to improved stability. However practitioners have often found that the derivative term
can behave against anticipatory action in case of transport delay. A cumbersome trail-and-error to tune its
parameters made many practitioners switch-off or even exclude the derivative term [31], [32]. Therefore, the
description of conventional and the proposed fast-acting dc-link voltage controllers using PI controllers are given in
the following sections.

A. Conventional DC- Link Voltage Controller
     The conventional PI controller used for maintaining the dc-link voltage is shown in figure.2. To maintain the dc
link voltage at the reference value, the dc link capacitor needs a certain amount of real power, which is proportional
to the difference between actual and reference voltages. The power required by the capacitor can be expressed as
follows:
            (                + ∫(                      .                                            (8)




Figure.2. Schematic diagram of the conventional           Figure.3. Schematic diagram of the fast-acting
dc-link voltage controller                                             dc-link voltage controller
The dc-link capacitor has slow dynamics compared to the compensator, since the capacitor voltage is sampled
at every zero crossing of phase a supply voltage. The sampling can also be performed at a quarter-cycle depending
up on the symmetry of the dc link voltage wave form. The drawback of this conventional controller is that its
transient response is slow, especially for fast changing loads. Also, the design of PI controller parameters is quite
difficult for a complex system and hence, these parameters are chosen by trial and error. Moreover, the dynamic
response during the transients is totally dependent on the values of   and     when      is comparable to      .
B. Fast-Acting DC Link Voltage Controller
    To overcome the disadvantages of the aforementioned controller, an energy-based dc-link voltage controller is
proposed. The energy required by the dc link capacitor (  ) to charge from actual voltage (   ) to the reference
value (           ) can be computed as

     =½       (                                                                                      (9)
In general, the dc link capacitor voltage has ripples with double frequency, that of the supply frequency. The dc
power (     ) required by the dc link capacitor is given as

       =      /   = (1/2 )     (                                                                           (10)
Where     is the ripple period of the dc link capacitor voltage, some control schemes have been reported in [33] and
[34].However, due to the lack of integral term, there is a steady-state error while compensating the combined ac and
dc loads. This is eliminated by including the integral term. The input to this controller is the error between the
squares of reference and the actual capacitor voltages. This controller is shown in figure.3 and the total dc power
required by the dc link capacitor is computed by the following equation:

       =                                 ∫(                dt.                                             (11)
The coefficients        and       are proportional and integral gains of the proposed energy-based dc-link voltage
controller. Energy based controller gives fast response compared to the conventional PI controller. Thus, it can be
called a fast acting dc link voltage controller. The ease in the calculation of the proportional and integral gains is an
additional advantage. The value of the proportional controller gain        can be given as

                                                                                                           (12)
For example, if the value of dc link capacitor is 2200µF and the capacitor voltage ripple period is 0.01 s, then              is
computed as 0.11 by using (12). The selection of     depends up on the tradeoff between the transient response and
overshoot in the compensated source current. Once this proportional gain is selected, integral gain is changed around
and chosen to be 0.5. It is found that if      is greater than        , the response tends to be oscillatory and if      is less

than       , then response tends to be sluggish. Hence,          is chosen to be   .


V. DESIGN OF CONVENTIONAL CONTROLLER BASED ON THE FAST-
    ACTING DC-LINK VOLTAGE CONTROLLER
The conventional dc-link voltage controller can be designed based on equations given for the fast-acting dc-link
voltage controller as in (11) and can be written as

       =     (                                            ∫(                                                          (13)

It can also be written as
     =                              ∫                                                                                 (14)
Where
     =      (             )                                                                                           (15)
=                                                                                                       (16)
It is observed from the aforementioned equations that the gains of proportional and integral controllers vary with
respect to time. However, for small ripples in the dc-link voltage,    ≈
Therefore, we can approximate the above gains to the following:

                  (          )                                                                                 (17)
                     )                                                                                    (18)
The relations (17) – (18) give approximate gains for a conventional PI controller. This is due to the fact that
                 is not really equal to 2     until variation of   is small during transients. Hence, the designed
conventional PI controller works only on approximation. The open-loop gains for the two cases are given by

    /     =           (s +        ))/s                                                                          (19)
Where         =                  and

    /     =                                                                                                     (20)

Where         =                   . Since   is same as           and the higher gain in the conventional PI controller
renders less stability than that of the proposed energy-based dc-link controller. For the same performance, the
conventional PI controller has gains which are 364(40/0.11 from table 1) times larger than that of the proposed one.
Also, the amplifier units used to realize these gains need more design considerations and are likely to saturate when
used with higher gains.

TABLE 1
SIMULATION PARAMETERS:

                       System Parameters                                                Values
Supply voltage                                                400 V (L-L), 50 Hz
Unbalanced Load                                                  = 25 Ω,     = 44 + j25.5 Ω and     = 50 + j86.6 Ω
Nonlinear Load                                                Three-phase full wave rectifier drawing a dc current of 5
                                                              A
DC Load                                                            = 100 Ω
DC capacitor                                                       = 2000 µF
Interface Inductor                                               = 26 mH,       = 0.25 Ω
Reference dc link voltage                                            = 520 V
Hysteresis band                                               ±h = 1.0 A
Gains of conventional dc link voltage controller                  = 40,     = 20
Gains of fast-acting dc link voltage controller                   = 0.11,    = 0.055


VI. SELECTION OF THE DC-LINK CAPACITOR
          The value of the dc-link capacitor can be selected based on its ability to regulate the voltage under transient
conditions. Let us assume that the compensator in figure.1 is connected to a system with the rating of X kilovolt
amperes. The energy of the system is given by X × 1000J/s. Let us further assume that the compensator deals with
half (that is X/2) and twice (that is 2X) capacity under the transient conditions for n cycles with the system voltage
period of T s. Then, the change in energy to be with by the dc capacitor is given as

ΔE = (2X – X/2)nT                                                                                      (21)
Now this change in energy (21) should be supported by the energy stored in the dc capacitor. Let us allow the dc
capacitor to change its total dc-link voltage from 1.4 to 1.8   during the transient conditions where      is the
peak value of the phase voltage. Hence we can write

½     [           –          ] = (2X-X/2)nT                                                        (22)


             = 3XnT/[           –            ]                                                    (23)

For example, consider a 10-KVA system (with X = 10 KVA), peak voltage           = 352.2 V, n = 0.5, and T = 0.02s.
The value of      computed using (23) is 2216 µF. In practical 2000 µF is readily available and the same value has
been for simulation and experimental studies.

VII.PROPOSED SHUNT CONTROLLER METHOD USING PQ-THEORY
          The control algorithm for series active power filter (APF) is based on unit vector template generation
scheme , where as the control strategy for shunt APF is discussed in this section. Based on the load on the 3P4W
system, the current drawn from the utility can be unbalanced. In this paper a new control strategy is proposed to
compensate the current unbalance present in the load currents by expanding the concept of single phase p—q theory
(28), (29). According to this theory, a signal phase system can be defined as a pseudo two-phase system giving π/2
lead or π/2 lag, that is each phase voltage and current of the original three-phase system can be considered as three
independent two phase systems. These resultant two phase systems can be represented in α—β coordinates, and
thus, the p—q theory applied for balanced three phase system can also be used for each phase of unbalanced system
independently. The actual load voltages and load currents are considered as α—axis quantities where as the π/2 lead
load or π/2 lag voltages and π/2 lead or π/2 lag load currents are considered as β—axis quantities. In this paper π/2
lead is considered to achieve a two phase system for each phase. The major advantage of p—q theory is that it gives
poor results under distorted and/or unbalanced input/utility voltages . In order to eliminate these limitations, the
reference load voltage signals extracted for series APF are used instead of actual load voltages.

For phase a, the load voltage and current in α—β coordinates can be represented by π/2 lead as


                                                                                                             (24)


                                                                                                             (25)


Where             represents the reference load voltage and        represents the desired load voltage magnitude.
Similarly for phase b, the load voltage and current in α—β coordinates can be represented by π/2 lead as,


                                                                                                             (26)


          =                                                                                                  (27)

In addition for phase c, the load voltage and current in α—β coordinates can be represented by π/2 lead as


                                                                                                             (28)


          =                                                                                                  (29)
By using the definition of three phase p—q theory, for balanced three-phase system (3), the instantaneous power
components can be represented as
Instantaneous active power

       =                     +            .          .                                                      (30)
Instantaneous reactive power
       =           .          -                      .                                                      (31)

Considering the phase a, the phase-a instantaneous load active and instantaneous load reactive powers can be
represented by


                                                                                                            (32)
Where
   =            +                                                                                           (33)
   =            +                                                                                           (34)

In (33) and (34),      and      represent the DC components that are responsible for fundamental load active and
reactive powers, whereas        and      represent the ac components that are responsible for harmonic powers. The
phase-a fundamental instantaneous load active and reactive power components can be extracted from         and     ,
respectively by using a low pass filter.
Therefore, the instantaneous fundamental load active power for phase-a is given by

     =                                                                                                      (35)
And Instantaneous fundamental load reactive power for phase-a is given by
     =                                                                                                      (36)

Similarly the fundamental instantaneous load active and the fundamental instantaneous load reactive powers for
phases-b and c can be calculated as
Instantaneous fundamental load active power for phase b

      =                                                                                                     (37)
Instantaneous fundamental load reactive power for phase b
      =                                                                                                     (38)
Instantaneous fundamental load active power for phase c
      =                                                                                                     (39)
Instantaneous fundamental load reactive power for phase c
      =                                                                                                     (40)

          Since the load current drawn by each phase may be different due to different loads that may be present
inside plant, therefore the instantaneous fundamental load active power and the instantaneous fundamental load
reactive power demand for each phase may not be the same. In order to make this load unbalanced power demand,
seen from the utility side, as a perfectly balanced fundamental three phase active power, the unbalanced load power
should be properly redistributed between utility, UPQC and load such that the total load seen by the utility would be
linear and balanced load. The unbalanced or balanced reactive power demanded by the load should be handled by a
shunt APF. The aforementioned task can be achieved by summing instantaneous load active power demands of all
the three phases and redistributing it again on each utility phase that is from equations (35), (37) and (39).

            =       +        +                                                                              (41)
        =               /3                                                                                  (42)
Equation (42) gives the distributed per phase fundamental active power demand that each phase of utility should
supply in order to achieve perfectly balanced source currents. From (42) it is evident that under all the conditions the
total fundamental active power demand by the loads would be equal to the total power drawn from the utility but
with perfectly balanced way even though the load currents are unbalanced. Thus the reference compensating
currents representing a perfectly balanced three-phase system can be extracted by taking the inverse of (32).


           =                       .                                                                           (43)

In (43),          is the precise amount of per-phase active power that should be taken from the source in order to
maintain the dc-link voltage at a constant level and to overcome the losses associated with UPQC, The oscillating
instantaneous active power        should be exchanged between the load ad shunt APF. The reactive power term
in (43) is considered as zero since the utility should not supply load reactive power demand. In the above matrix, the
α-axis reference compensating current represents the current that is at lead with respect to the original system.

Therefore,          =             /(                                         (t) }                            (44)
Similarly the reference source currents for phases b and can be estimated as

       =             /(                                         (t) }                                         (45)

       =            /(                                         (t) }                                          (46)
The reference neutral current signal can be extracted by simply adding all the sensed load currents without actual
neutral current sensing as
     (t) =                                                                                               (47)
      (t) =        (t).                                                                                  (48)
The proposed balanced per-phase fundamental active power estimation, dc link voltage control based on PI
regulator, the reference neutral current generation are shown in
figures A:(a) and (d) respectively.




Figure.A. Shunt active filter control block diagram. (a) Proposed balanced per-phase fundamental active power
estimation. (b) DC-link voltage control loop. (c) Reference source current generation. (d) Neutral current
compensation.
VIII. SIMULATION STUDIES
         The load compensator with H-bridge VSI topology as shown in figure.1 is realized by digital simulation by
using MATLAB. The load and the compensator are connected at the PCC. The ac load consists of a three phase
unbalanced load and a three phase diode bridge rectifier feeding a highly inductive R-L load. A dc load is realized
by an equivalent resistance (       ) as shown in the figure. The dc load forms 50% of the total power requirement.
The system and compensator parameters are given in table1.
By monitoring the load currents and PCC voltages, the average load power is computed. At every zero crossing of
phase a voltage,        is generated by using the dc-link voltage controller. The state space equations are solved to
compute the actual compensator currents and dc-link voltage. These actual currents are compared with the reference
currents given by (1) using hysteresis current control. Based on the comparison, switching signals are generated to
compute the actual state-variables by solving the state-space model given in (2). The source voltages and load
currents are plotted in figure 4(a) and (b).
The load currents have total harmonic distortions of 8.9%, 14.3%, and 21.5% in phases a, b and c, respectively. The
unbalance in load currents results in neutral current as illustrated in the figure.
The compensator currents and compensated source currents are shown in Figure 4© and (d). As seen from figure
4(d), the source currents are balanced sinusoids; however, the switching frequency components are superimposed
over the reference currents due to the switching action of VSI. The currents have a unity power factor relationship
with voltages in the respective phases. The THDs in




Figure 4 (a) supply voltages (b) Load currents (c) Compensator currents (d) Compensated source currents.

These currents are 3.6%, 3.7% and 3.9% in phases a, b and c respectively. There are notches in the source currents
due to finite bandwidth of VSI. The transient performance of the conventional and fast acting dc link voltage
controllers are studied by making sudden changes in the ac load supplied by the ac load bus as well as the dc load
supplied by the dc link. In the simulation study, the load is halved at the instant t = 0.4s and brought back to full load
at t = 0.8s. The transient performance is explained in the subsections.
A. Transient Performance of Conventional DC-Link Voltage Controller
     The conventional dc-link voltage controller as given in (8) is used to generate the dc load power           which is
inclusive of losses in the inverter. The transient performance of the compensator is shown in figure 5(a) and (b). The
total load, which is a combination of linear unbalanced and nonlinear load (as given in table 1), is halved at the
instant t = 0.4s. Due to a sudden reduction in the load, the dc link capacitor absorbs surplus power from the source.
Therefore, there is an increase in dc link capacitor voltage above the reference value. Based on the values of PI
controller will be brought back to the reference value after a few cycles.
Similarly, when the load is switched back to the full load at instant t = 0.8s, the dc capacitor supplies power to the
load momentarily and hence the dc link voltage falls below the reference value. Due to the PI controller action, the
capacitor voltage will gradually build up and reach its reference value. If gains of the conventional dc link voltage
would have undesirable overshoot and considerably large settling time. Consequently, the performance of the load
connected to the dc link also gets affected due to the above factors. It can be observed from figure 5(a) and (b) that
the conventional dc link voltage controller takes about a ten cycle period to reach the reference voltage during load
transient. This is indicated by time duration in these figures
.
B. Transient Performance of Fast-Acting DC-Link Voltage Controller
     The dc load power            is computed by using the fast acting dc link voltage controller as given in (11).
Transients in the load are considered the same as in the above simulation study. Figure 6(a) and (b) illustrates the
phase a source current and dc link capacitor voltage during the load transients.
At the instant t = 0.4s, the capacitor voltage increases due to the sudden removal of the load. The fast acting dc link
voltage controller takes action at instant t = 0.41s. This is because the controller output is updated at every half-
cycle. It computes the dc load power         needed to bring the capacitor voltage to the reference value in a half-cycle.
Therefore, the dc link voltage reaches its reference voltage at the instant t = 0.42s. When the dc link voltage is more
than the reference value,       is less. Therefore, the source currents are less in magnitude.
At the instant t = 0.8s, the dc link voltage falls below the reference voltage due to a sudden increase in load. As
explained earlier, the fast acting controller brings the dc link voltage to its reference value at t = 0.82s with almost
the same rise in voltages as that of the conventional dc link voltage controller. A close observation of the figure
would reveal that the fast acting dc link voltage controller can regulate the capacitor voltage with in half-cycle
period which is indicated by . Owing to its good transient performance, it is preferred over the conventional dc link
voltage controller.




Figure5: Transient response of the conventional controller. (a) Compensated source current in phase a. (b) DC-Link
voltage.
Figure 6: Transient response of the fast-acting controller. (a) Compensated source current in phase a. (b) DC-Link
voltage.

IX.PROPOSED METHOD SIMULATION RESULTS:
         The average load power is computed by taking samples of the load currents and PCC voltages. The dc load
power (      ) is generated by using the conventional dc link voltage controller and fast acting dc link voltage
controllers. Based on these values, reference compensator currents are obtained by using (1). The VSI is then
operated in the hysteresis band current control mode to synthesize the actual compensator currents. Accordingly, the
switching commands are issued to control IGBT switches through proper interfacing circuits.
The source voltages and load currents are shown in figure 8(a) and (b), respectively. The source voltages are
balanced and sinusoidal but the load currents have both unbalance and distortions. The unbalance in load currents
results in neutral current. The THDs of the load currents are 11.6%, 16.7% and 24.2% in phases a, b and c
respectively. Compensator and compensated source currents are shown in figure 8 (c) and (d) respectively. The
source currents are balanced sinusoids with the THDs of 5.2%, 4.8% and 4.7% in phases a, b and c respectively.

A.Transient Performance of the Conventional DC-Link Voltage Controller
          The transient performance with the conventional dc link voltage controller is shown in figure.9. At the
instant t = , the unbalanced linear R-L load and a half dc load are removed. At t =             the load is brought to its
original value. The power (        ) required by the dc link is computed by using (8). Figure 9 illustrates the
compensated source currents and dc link voltage. From this figure, it can be understood that the usage of the
conventional controller with an improper value of controller gains cannot bring the actual dc link voltage to its
reference value quickly. It takes around 40 cycles to regulate the dc link voltage to its reference voltage.

B.Transient Performance of the Fast-Acting DC-Link Voltage Controller
          The performance of the fast acting dc link voltage controller is tested by using the trandsient load used in
the previous section. Figure 10 shows the source currents during the transients in load by using this fast acting dc
link voltage controller as given in (11). From the close observatoion of the figure, it is found that the response time
is very less compared to that of the conventional dc link voltage controller. Though, in simulation studies, the fast
acting voltage controller corrects the actual dc link voltage in a half cycle, the experimental results do not fully
validate the same. This is due to the use of the mechanical switch for the change of load, which can not
connect/disconnect the load in all three phases simultaneously at the instants and and due to other nonidealities
in the system.
Figure 8 (a) Supply Voltages. (b) Load currents (c) Compensator currents. (d) Source currents after compensation
(e) injection current :-
Figure 9:-Source currents and dc-link voltage with a conventional dc-link voltage controller.




Figure 10:- Source currents and dc-link voltage with a fast-acting dc-link voltage controller
Fig.11. source currents and DC-link voltage with a fast Acting DC-link voltage controller and proposed VSI
controller using PQ-theory

X. CONCLUSION
A VSI topology for DSTATCOM compensating ac unbalanced and nonlinear loads and a dc load supplied by the dc
link of the compensator is presented. The state-space modeling of the DSTATCOM is discussed for carrying out the
simulation studies. The energy based fast acting dc link voltage controller is suggested to ensure the fast transient
response of the compensator. Mathematical equations are developed to compute the gains of this controller. The
efficacy of the proposed controller over the conventional dc link voltage controller and PQ-theory are established
through the digital simulation studies. It is observed from these studies that the proposed dc link voltage controller
gives fast transient response under load transients and PQ-theory.

XI. REFERENCES
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Indraneel perfect paper on dstatcom using pq theory

  • 1. Modeling and Simulation Of Three Phase-Four Wire Compensated System Using The H-Bridge VSI Topology-Based DSTATCOM INDRANIL SAAKI1, N UDAY BHANU2, CHALLA KRISHNA RAO3, D.SHANKAR PRASAD4 1 Student, Department of EEE, Gitam University, Visakhapatnam- 530 045 2 student, Department of EEE,St.Theressa college, Visakhapatnam- 530 045 3 student, Department of EEE,St.Theressa college, Visakhapatnam- 530 045 4 Assistance Professor,HOD, Department of EEE, St.Theressa college, Visakhapatnam- 530 045 1 Email: indranil.saaki@gmail.com ,2 Email : neelauday@gmail.com ,3Email : krishnarao.challa@gmail.com , 4 Email : dshankarprasad@gmail.com Abstract—The Transient response of the distribution static compensator (DSTATCOM) is very important while compensating rapidly varying unbalanced and nonlinear loads. Any change in the load affects the dc link voltage directly. The sudden removal of load would result in an increase in the dc link voltage above the reference value where as a sudden increase in the load would reduce the dc link voltage below its reference value. The proper operation of DSTATCOM requires variation of the DC link voltage within the prescribed limits. Conventionally, a proportional-integral (PI) controller is used to maintain the dc-link voltage to the reference value. It uses the deviation of the capacitor voltage from its reference value as its input. However, the transient response of the conventional PI dc-link voltage controller is slow. In this paper, a fast acting dc-link voltage controller based on the energy of the dc-link capacitor is proposed and proposed shunt controller method by using PQ-Theory. Mathematical equations are given to compute the gains of the conventional controller based on the fast-acting dc- link controllers to achieve similar fast transient response. The detailed simulation studies are carried out to validate the proposed controller. Index Terms—DC-link voltage controller, distribution static compensator (DSTATCOM), fast transient response, harmonics, load compensation, power factor, power quality, unbalance and voltage-source inverter (VSI) , PQ- Theory. I. INTRODUCTION The proliferation of the power electronics-based equipment, nonlinear and unbalanced loads, has aggravated the power quality (PQ) problems in the power distribution network. They cause excessive neutral currents, over heating of electrical apparatus, poor power factor, voltage distortion, and high levels of neutral –to- ground voltage, and inference with communication systems. The literature records the evolution of different custom power devices to mitigate the power-quality problems by injecting the voltages/currents or both in to the system. The shunt connected custom power device, called the distribution static compensator (DSTATCOM), injects current at the point of common coupling (PCC) so that harmonic filtering, power factor correction, and load balancing can be achieved. The DSTATCOM consists of a current-controlled voltage source inverter (VSI) which injects current at the PCC through the interface inductor. The operation of VSI is supported by a dc storage capacitor with proper dc voltage across it. One important aspect of the compensation is the extraction of reference currents. Various control algorithms are available in literature to compute the reference compensator currents. However, due to simplicity in formulation and no confusion regarding the definition of powers, the control algorithm based on instantaneous symmetrical component theory is preferred. Based on algorithm, compensator reference currents ( are given as follows: ( )/( + )} = + (1) {( /( + Where =tanφ/√3 and φ is the desired phase angle between the supply voltages and compensated source currents in the respective phases. For unity power factor operation, φ=0, thus =0. The term is the dc or average value of the load power. The term in the above equations accounts for the losses in the VSI without any dc loads in its dc link. To generate , a suitable closed loop dc link voltage controller should be used, which will regulate the dc voltage to the reference value.
  • 2. For the DSTATCOM compensating unbalanced and nonlinear loads, the transient performance of the compensator is decided by the computation time of average load power and losses in the compensator. In most DSTATCOM applications, losses in the VSI are a fraction of average load power. Therefore, the transient performance of the compensator mostly depends on the computation of . In this paper, is computed by using a moving average filter (MAF) to ensure fast dynamic response. The settling time of the MAF is a half-cycle period in case of odd harmonics and one cycle period in case of even harmonics present in voltages and currents. Although the computation of is generally slow and updated once or twice in a cycle, being a small value compared to it does not play a significant role in transient performance of the compensator. In some of the electric power consumers, such as the telecommunication industry, power electronic drive applications there is a requirement for ac as well as dc loads. The telecommunication industry uses several parallel- connected switch-mode rectifiers to support dc bus voltage. Such an arrangement draws nonlinear load currents from the utility. This causes poor power factor and hence more losses and less efficiency. Clearly, there are PQ issues, such as unbalance, poor power factor, and harmonics produced by telecom equipment in power distribution networks. Therefore, the functionalities of the conventional DSTATCOM should be increased to mitigate aforementioned PQ problems and to supply the dc loads from its dc link as well. The load sharing by the ac and dc bus depends up on the design and rating of VSI. This DSTATCOM differs from the conventional one in the sense that its dc link not only supports instantaneous compensation but also supplies dc loads. However, when the dc link of the DSTATCOM supplies the dc load as well, the corresponding dc power is comparable to the average load power and hence plays a major role in the transient response of the compensator. Hence there are two important issues. The first one is the regulation of the dc link voltage with prescribed limits under transient load conditions. The second one is the settling time of the dc link voltage controller. Conventionally, a PI controller is used to maintain the dc link voltage. It uses the deviation of the capacitor voltage from its reference value as its input. However, the transient response of the conventional dc-link voltage controllers is slow especially in the applications where the load changes rapidly. Some work related to the dc link voltage controllers and their stability is reported in [16]-[20]. However work is limited to rectifier units where switching patterns are well defined and analysis can be easily carried out. In this paper, a fast acting dc link voltage controller based on dc link capacitor energy is proposed. The detailed modeling, simulation and experimental verifications are given to prove the efficacy of this fast acting dc link voltage controller. There is no systematic procedure to design the gains of the conventional PI controller used to regulate the dc link voltage of the DSTATCOM. Herewith, mathematical equations are given to design the gains of the conventional controller based on the fast acting dc link voltage controller to achieve similar fast transient response. II. DSTATCOM FOR COMPENSATING AC AND DC LOADS Various VSI topologies are described in the literature for realizing the DSTATCOM to compensate unbalanced and nonlinear loads [21]-[29]. Due to the simplicity, the absence of the unbalance in the dc link voltage and independent current tracking with respect to other phases, a three phase H-Bridge VSI topology is chosen. The following figure.1: shows a three phase-four-wire-compensated system using H-bridge VSI topology-based DSTATCOM compensating unbalanced and nonlinear ac load.
  • 3. (Figure.1: showing a three phase-four wire compensated system using the H-bridge VSI topology-based DSTATCOM) A dc load ( ) is connected across the dc link. The DSTATCOM consists of 12 insulated-gate bipolar transistor(IGBT) switches each with an antiparallel diode, dc strorage capacitor, three isolation transformers and three interface conductors.The statr point of the isolation transformers( ) is connected to the neutral of load( ) and source (N). The H-bridge VSIs are connected to the PCC through interface inductors. The isolation transformers prevent a short circuit of the dc capacitor for various combinations of switching states of the VSI. The inductance and resistance of the isolation transformers are also included in and . The source voltages are assumed to be balanced and sinusoidal. With this supply being considered as a stiff source, the feeder impedance( - ) shown in the above figure.1: is negligible and hence it is not accounted in state-space modelling. To track the desired compensator currents, the VSIs operate under the hysterisis band current control mode due to their simplicity, fast response, and being independent of the load parameters [30]. The DSTATCOM injects currents in to the PCC in such a way as to cancel unbalance and harmonics in the load currents. The VSI operation is supported by the dc storage capacitor with voltage across it. The dc bus voltage has two functions, that is, to support the compensator operationand to supply dc load. While compensating, the DSTATCOM mantains the balanced sinusoidal source currents with unity power factor and supplies the dc load through its dc bus. III. STATE-SPACE MODEL OF THE DSTATCOM For the DSTATCOM topology shown in the above Figure.1: the pairs of switches - and - are always ON and OFF in complimentary mode. The ON and OFF states of these switches are represented by a binary logic variable and its complement . Thus when switches - are ON, it implies that switches - are OFF. This is represented by =1, =0, and vice-versa. In a similar way , and & represent gating signals for switches - , - , - , - , respectively. Using the notations for the system shown in the above figure the state-space equations are written as follows: = Ax + Bu (2) Where state vector x and input vector u are given by x =[ ]T (3) T u=[ (4) here T is the transpose operator. System matrix [A] and input matrix [B] are given as follows:
  • 4. A= (5) B= (6) Using the above state-space model, the system state variables (x) are computed at every instant. IV. DC-LINK VOLTAGE CONTROLLERS As mentioned before, the source supplies an unbalanced nonlinear ac load directly and a dc load through the dc link of the DSTATCOM, as shown in figure.1. Due to transients on the load side, the dc bus voltage is significantly affected. To regulate this dc link voltage, closed-loop controllers are used. The proportional-integral- derivative (PID) control provides a generic and efficient solution to many control problems. The control signal from PID controller to regulate dc link voltage is expressed as = ( + ∫( + d( (7) In (7), are proportional, integral and derivative gains of the PID controller, respectively. The proportional term provides overall control action proportional to the error signal. An increase in proportional controller gain ( ) reduces rise time and steady-state error but increase the overshoot and settling time. An increase in integral gain ( ) reduces steady-state error but increases overshoot and settling time. Increasing derivative gain ( ) will lead to improved stability. However practitioners have often found that the derivative term can behave against anticipatory action in case of transport delay. A cumbersome trail-and-error to tune its parameters made many practitioners switch-off or even exclude the derivative term [31], [32]. Therefore, the description of conventional and the proposed fast-acting dc-link voltage controllers using PI controllers are given in the following sections. A. Conventional DC- Link Voltage Controller The conventional PI controller used for maintaining the dc-link voltage is shown in figure.2. To maintain the dc link voltage at the reference value, the dc link capacitor needs a certain amount of real power, which is proportional to the difference between actual and reference voltages. The power required by the capacitor can be expressed as follows: ( + ∫( . (8) Figure.2. Schematic diagram of the conventional Figure.3. Schematic diagram of the fast-acting dc-link voltage controller dc-link voltage controller
  • 5. The dc-link capacitor has slow dynamics compared to the compensator, since the capacitor voltage is sampled at every zero crossing of phase a supply voltage. The sampling can also be performed at a quarter-cycle depending up on the symmetry of the dc link voltage wave form. The drawback of this conventional controller is that its transient response is slow, especially for fast changing loads. Also, the design of PI controller parameters is quite difficult for a complex system and hence, these parameters are chosen by trial and error. Moreover, the dynamic response during the transients is totally dependent on the values of and when is comparable to . B. Fast-Acting DC Link Voltage Controller To overcome the disadvantages of the aforementioned controller, an energy-based dc-link voltage controller is proposed. The energy required by the dc link capacitor ( ) to charge from actual voltage ( ) to the reference value ( ) can be computed as =½ ( (9) In general, the dc link capacitor voltage has ripples with double frequency, that of the supply frequency. The dc power ( ) required by the dc link capacitor is given as = / = (1/2 ) ( (10) Where is the ripple period of the dc link capacitor voltage, some control schemes have been reported in [33] and [34].However, due to the lack of integral term, there is a steady-state error while compensating the combined ac and dc loads. This is eliminated by including the integral term. The input to this controller is the error between the squares of reference and the actual capacitor voltages. This controller is shown in figure.3 and the total dc power required by the dc link capacitor is computed by the following equation: = ∫( dt. (11) The coefficients and are proportional and integral gains of the proposed energy-based dc-link voltage controller. Energy based controller gives fast response compared to the conventional PI controller. Thus, it can be called a fast acting dc link voltage controller. The ease in the calculation of the proportional and integral gains is an additional advantage. The value of the proportional controller gain can be given as (12) For example, if the value of dc link capacitor is 2200µF and the capacitor voltage ripple period is 0.01 s, then is computed as 0.11 by using (12). The selection of depends up on the tradeoff between the transient response and overshoot in the compensated source current. Once this proportional gain is selected, integral gain is changed around and chosen to be 0.5. It is found that if is greater than , the response tends to be oscillatory and if is less than , then response tends to be sluggish. Hence, is chosen to be . V. DESIGN OF CONVENTIONAL CONTROLLER BASED ON THE FAST- ACTING DC-LINK VOLTAGE CONTROLLER The conventional dc-link voltage controller can be designed based on equations given for the fast-acting dc-link voltage controller as in (11) and can be written as = ( ∫( (13) It can also be written as = ∫ (14) Where = ( ) (15)
  • 6. = (16) It is observed from the aforementioned equations that the gains of proportional and integral controllers vary with respect to time. However, for small ripples in the dc-link voltage, ≈ Therefore, we can approximate the above gains to the following: ( ) (17) ) (18) The relations (17) – (18) give approximate gains for a conventional PI controller. This is due to the fact that is not really equal to 2 until variation of is small during transients. Hence, the designed conventional PI controller works only on approximation. The open-loop gains for the two cases are given by / = (s + ))/s (19) Where = and / = (20) Where = . Since is same as and the higher gain in the conventional PI controller renders less stability than that of the proposed energy-based dc-link controller. For the same performance, the conventional PI controller has gains which are 364(40/0.11 from table 1) times larger than that of the proposed one. Also, the amplifier units used to realize these gains need more design considerations and are likely to saturate when used with higher gains. TABLE 1 SIMULATION PARAMETERS: System Parameters Values Supply voltage 400 V (L-L), 50 Hz Unbalanced Load = 25 Ω, = 44 + j25.5 Ω and = 50 + j86.6 Ω Nonlinear Load Three-phase full wave rectifier drawing a dc current of 5 A DC Load = 100 Ω DC capacitor = 2000 µF Interface Inductor = 26 mH, = 0.25 Ω Reference dc link voltage = 520 V Hysteresis band ±h = 1.0 A Gains of conventional dc link voltage controller = 40, = 20 Gains of fast-acting dc link voltage controller = 0.11, = 0.055 VI. SELECTION OF THE DC-LINK CAPACITOR The value of the dc-link capacitor can be selected based on its ability to regulate the voltage under transient conditions. Let us assume that the compensator in figure.1 is connected to a system with the rating of X kilovolt amperes. The energy of the system is given by X × 1000J/s. Let us further assume that the compensator deals with half (that is X/2) and twice (that is 2X) capacity under the transient conditions for n cycles with the system voltage period of T s. Then, the change in energy to be with by the dc capacitor is given as ΔE = (2X – X/2)nT (21)
  • 7. Now this change in energy (21) should be supported by the energy stored in the dc capacitor. Let us allow the dc capacitor to change its total dc-link voltage from 1.4 to 1.8 during the transient conditions where is the peak value of the phase voltage. Hence we can write ½ [ – ] = (2X-X/2)nT (22)  = 3XnT/[ – ] (23) For example, consider a 10-KVA system (with X = 10 KVA), peak voltage = 352.2 V, n = 0.5, and T = 0.02s. The value of computed using (23) is 2216 µF. In practical 2000 µF is readily available and the same value has been for simulation and experimental studies. VII.PROPOSED SHUNT CONTROLLER METHOD USING PQ-THEORY The control algorithm for series active power filter (APF) is based on unit vector template generation scheme , where as the control strategy for shunt APF is discussed in this section. Based on the load on the 3P4W system, the current drawn from the utility can be unbalanced. In this paper a new control strategy is proposed to compensate the current unbalance present in the load currents by expanding the concept of single phase p—q theory (28), (29). According to this theory, a signal phase system can be defined as a pseudo two-phase system giving π/2 lead or π/2 lag, that is each phase voltage and current of the original three-phase system can be considered as three independent two phase systems. These resultant two phase systems can be represented in α—β coordinates, and thus, the p—q theory applied for balanced three phase system can also be used for each phase of unbalanced system independently. The actual load voltages and load currents are considered as α—axis quantities where as the π/2 lead load or π/2 lag voltages and π/2 lead or π/2 lag load currents are considered as β—axis quantities. In this paper π/2 lead is considered to achieve a two phase system for each phase. The major advantage of p—q theory is that it gives poor results under distorted and/or unbalanced input/utility voltages . In order to eliminate these limitations, the reference load voltage signals extracted for series APF are used instead of actual load voltages. For phase a, the load voltage and current in α—β coordinates can be represented by π/2 lead as (24) (25) Where represents the reference load voltage and represents the desired load voltage magnitude. Similarly for phase b, the load voltage and current in α—β coordinates can be represented by π/2 lead as, (26) = (27) In addition for phase c, the load voltage and current in α—β coordinates can be represented by π/2 lead as (28) = (29)
  • 8. By using the definition of three phase p—q theory, for balanced three-phase system (3), the instantaneous power components can be represented as Instantaneous active power = + . . (30) Instantaneous reactive power = . - . (31) Considering the phase a, the phase-a instantaneous load active and instantaneous load reactive powers can be represented by (32) Where = + (33) = + (34) In (33) and (34), and represent the DC components that are responsible for fundamental load active and reactive powers, whereas and represent the ac components that are responsible for harmonic powers. The phase-a fundamental instantaneous load active and reactive power components can be extracted from and , respectively by using a low pass filter. Therefore, the instantaneous fundamental load active power for phase-a is given by = (35) And Instantaneous fundamental load reactive power for phase-a is given by = (36) Similarly the fundamental instantaneous load active and the fundamental instantaneous load reactive powers for phases-b and c can be calculated as Instantaneous fundamental load active power for phase b = (37) Instantaneous fundamental load reactive power for phase b = (38) Instantaneous fundamental load active power for phase c = (39) Instantaneous fundamental load reactive power for phase c = (40) Since the load current drawn by each phase may be different due to different loads that may be present inside plant, therefore the instantaneous fundamental load active power and the instantaneous fundamental load reactive power demand for each phase may not be the same. In order to make this load unbalanced power demand, seen from the utility side, as a perfectly balanced fundamental three phase active power, the unbalanced load power should be properly redistributed between utility, UPQC and load such that the total load seen by the utility would be linear and balanced load. The unbalanced or balanced reactive power demanded by the load should be handled by a shunt APF. The aforementioned task can be achieved by summing instantaneous load active power demands of all the three phases and redistributing it again on each utility phase that is from equations (35), (37) and (39). = + + (41) = /3 (42)
  • 9. Equation (42) gives the distributed per phase fundamental active power demand that each phase of utility should supply in order to achieve perfectly balanced source currents. From (42) it is evident that under all the conditions the total fundamental active power demand by the loads would be equal to the total power drawn from the utility but with perfectly balanced way even though the load currents are unbalanced. Thus the reference compensating currents representing a perfectly balanced three-phase system can be extracted by taking the inverse of (32). = . (43) In (43), is the precise amount of per-phase active power that should be taken from the source in order to maintain the dc-link voltage at a constant level and to overcome the losses associated with UPQC, The oscillating instantaneous active power should be exchanged between the load ad shunt APF. The reactive power term in (43) is considered as zero since the utility should not supply load reactive power demand. In the above matrix, the α-axis reference compensating current represents the current that is at lead with respect to the original system. Therefore, = /( (t) } (44) Similarly the reference source currents for phases b and can be estimated as = /( (t) } (45) = /( (t) } (46) The reference neutral current signal can be extracted by simply adding all the sensed load currents without actual neutral current sensing as (t) = (47) (t) = (t). (48) The proposed balanced per-phase fundamental active power estimation, dc link voltage control based on PI regulator, the reference neutral current generation are shown in figures A:(a) and (d) respectively. Figure.A. Shunt active filter control block diagram. (a) Proposed balanced per-phase fundamental active power estimation. (b) DC-link voltage control loop. (c) Reference source current generation. (d) Neutral current compensation.
  • 10. VIII. SIMULATION STUDIES The load compensator with H-bridge VSI topology as shown in figure.1 is realized by digital simulation by using MATLAB. The load and the compensator are connected at the PCC. The ac load consists of a three phase unbalanced load and a three phase diode bridge rectifier feeding a highly inductive R-L load. A dc load is realized by an equivalent resistance ( ) as shown in the figure. The dc load forms 50% of the total power requirement. The system and compensator parameters are given in table1. By monitoring the load currents and PCC voltages, the average load power is computed. At every zero crossing of phase a voltage, is generated by using the dc-link voltage controller. The state space equations are solved to compute the actual compensator currents and dc-link voltage. These actual currents are compared with the reference currents given by (1) using hysteresis current control. Based on the comparison, switching signals are generated to compute the actual state-variables by solving the state-space model given in (2). The source voltages and load currents are plotted in figure 4(a) and (b). The load currents have total harmonic distortions of 8.9%, 14.3%, and 21.5% in phases a, b and c, respectively. The unbalance in load currents results in neutral current as illustrated in the figure. The compensator currents and compensated source currents are shown in Figure 4© and (d). As seen from figure 4(d), the source currents are balanced sinusoids; however, the switching frequency components are superimposed over the reference currents due to the switching action of VSI. The currents have a unity power factor relationship with voltages in the respective phases. The THDs in Figure 4 (a) supply voltages (b) Load currents (c) Compensator currents (d) Compensated source currents. These currents are 3.6%, 3.7% and 3.9% in phases a, b and c respectively. There are notches in the source currents due to finite bandwidth of VSI. The transient performance of the conventional and fast acting dc link voltage controllers are studied by making sudden changes in the ac load supplied by the ac load bus as well as the dc load supplied by the dc link. In the simulation study, the load is halved at the instant t = 0.4s and brought back to full load at t = 0.8s. The transient performance is explained in the subsections.
  • 11. A. Transient Performance of Conventional DC-Link Voltage Controller The conventional dc-link voltage controller as given in (8) is used to generate the dc load power which is inclusive of losses in the inverter. The transient performance of the compensator is shown in figure 5(a) and (b). The total load, which is a combination of linear unbalanced and nonlinear load (as given in table 1), is halved at the instant t = 0.4s. Due to a sudden reduction in the load, the dc link capacitor absorbs surplus power from the source. Therefore, there is an increase in dc link capacitor voltage above the reference value. Based on the values of PI controller will be brought back to the reference value after a few cycles. Similarly, when the load is switched back to the full load at instant t = 0.8s, the dc capacitor supplies power to the load momentarily and hence the dc link voltage falls below the reference value. Due to the PI controller action, the capacitor voltage will gradually build up and reach its reference value. If gains of the conventional dc link voltage would have undesirable overshoot and considerably large settling time. Consequently, the performance of the load connected to the dc link also gets affected due to the above factors. It can be observed from figure 5(a) and (b) that the conventional dc link voltage controller takes about a ten cycle period to reach the reference voltage during load transient. This is indicated by time duration in these figures . B. Transient Performance of Fast-Acting DC-Link Voltage Controller The dc load power is computed by using the fast acting dc link voltage controller as given in (11). Transients in the load are considered the same as in the above simulation study. Figure 6(a) and (b) illustrates the phase a source current and dc link capacitor voltage during the load transients. At the instant t = 0.4s, the capacitor voltage increases due to the sudden removal of the load. The fast acting dc link voltage controller takes action at instant t = 0.41s. This is because the controller output is updated at every half- cycle. It computes the dc load power needed to bring the capacitor voltage to the reference value in a half-cycle. Therefore, the dc link voltage reaches its reference voltage at the instant t = 0.42s. When the dc link voltage is more than the reference value, is less. Therefore, the source currents are less in magnitude. At the instant t = 0.8s, the dc link voltage falls below the reference voltage due to a sudden increase in load. As explained earlier, the fast acting controller brings the dc link voltage to its reference value at t = 0.82s with almost the same rise in voltages as that of the conventional dc link voltage controller. A close observation of the figure would reveal that the fast acting dc link voltage controller can regulate the capacitor voltage with in half-cycle period which is indicated by . Owing to its good transient performance, it is preferred over the conventional dc link voltage controller. Figure5: Transient response of the conventional controller. (a) Compensated source current in phase a. (b) DC-Link voltage.
  • 12. Figure 6: Transient response of the fast-acting controller. (a) Compensated source current in phase a. (b) DC-Link voltage. IX.PROPOSED METHOD SIMULATION RESULTS: The average load power is computed by taking samples of the load currents and PCC voltages. The dc load power ( ) is generated by using the conventional dc link voltage controller and fast acting dc link voltage controllers. Based on these values, reference compensator currents are obtained by using (1). The VSI is then operated in the hysteresis band current control mode to synthesize the actual compensator currents. Accordingly, the switching commands are issued to control IGBT switches through proper interfacing circuits. The source voltages and load currents are shown in figure 8(a) and (b), respectively. The source voltages are balanced and sinusoidal but the load currents have both unbalance and distortions. The unbalance in load currents results in neutral current. The THDs of the load currents are 11.6%, 16.7% and 24.2% in phases a, b and c respectively. Compensator and compensated source currents are shown in figure 8 (c) and (d) respectively. The source currents are balanced sinusoids with the THDs of 5.2%, 4.8% and 4.7% in phases a, b and c respectively. A.Transient Performance of the Conventional DC-Link Voltage Controller The transient performance with the conventional dc link voltage controller is shown in figure.9. At the instant t = , the unbalanced linear R-L load and a half dc load are removed. At t = the load is brought to its original value. The power ( ) required by the dc link is computed by using (8). Figure 9 illustrates the compensated source currents and dc link voltage. From this figure, it can be understood that the usage of the conventional controller with an improper value of controller gains cannot bring the actual dc link voltage to its reference value quickly. It takes around 40 cycles to regulate the dc link voltage to its reference voltage. B.Transient Performance of the Fast-Acting DC-Link Voltage Controller The performance of the fast acting dc link voltage controller is tested by using the trandsient load used in the previous section. Figure 10 shows the source currents during the transients in load by using this fast acting dc link voltage controller as given in (11). From the close observatoion of the figure, it is found that the response time is very less compared to that of the conventional dc link voltage controller. Though, in simulation studies, the fast acting voltage controller corrects the actual dc link voltage in a half cycle, the experimental results do not fully validate the same. This is due to the use of the mechanical switch for the change of load, which can not connect/disconnect the load in all three phases simultaneously at the instants and and due to other nonidealities in the system.
  • 13. Figure 8 (a) Supply Voltages. (b) Load currents (c) Compensator currents. (d) Source currents after compensation (e) injection current :-
  • 14. Figure 9:-Source currents and dc-link voltage with a conventional dc-link voltage controller. Figure 10:- Source currents and dc-link voltage with a fast-acting dc-link voltage controller
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