This paper was presented in the Forum for Knowledge Sharing annual meeting held at SIU, Pune on 30th November. Download the paper from http://ssrn.com/abstract=2155540

1. INDIA: a fab-less wonder: case of
SMDP
A.S.Rao
indiainvents@hotmail.com
( This paper is based on project `Impact of
SMDP-II’ sponsored by Department of
Information Technology (DIT) on CIIE-IIMA)

2. Techno-Nationalism on slippery
ground
• "Chinese President Hu Jintao had dinner at the
White House with President Obama and first lady
Michelle. They were going to exchange gifts from
the two countries, but unfortunately everything
in our country is now made in their country, so
they couldn't do any exchanging." –Jay Leno
• India to showcase Aakash tablet at United
Nations on November 28th. The initiative would
highlight the country's innovation. Media reports
the computer was a cheap Chinese import and
not an Indian innovation as was claimed.
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3. SEMICONDUCTOR CAPABILITIES- STATE OF NATIONS
• The development and manufacturing of chips
involve three primary activities in the value chain:
design, fabrication, test and assembly.
• Prior to 1980s, the semiconductor industry was
vertically integrated. Semiconductor companies
owned and operated their own silicon wafer
fabrication facilities and developed their own
process technology for manufacturing their chips.
These companies also carried out the fabrication,
assembly and testing of their chips.
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4. Value Chain
Design Fabrication Assembly
Huge fixed investment
(currently on the order Requires expensive
of $2 billion) to build a equipment
Skill intensive plant (called a fab)
Plant holds a wide
Lower overall costs of
variety of expensive
plant and equipment
equipment
Requires expensive EDA
(electronic design Plant has to meet
automation) software, Low average skill
extreme requirements
requirements
of cleanliness.
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5. Emergence of independent Fabs
• Investment in Fabs (1995-2006) in USD billions:
• USA- 74
• Japan- 66
• Taiwan- 72 (Foundry production is the largest
segment of Taiwan’s domestic industry; in 1999,
foundry related business accounted for almost 60
percent of Taiwan’s total industrial revenue.)
• China-26
• India- nil
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6. Fabless IC suppliers
• Total Fabless: $62.50 billion (2010)
• U.S. companies occupy eight of the top ten
slots by sales volume. Qualcomm tops the list
of Fabless suppliers.
Indian score on:
• Integrated Fabs: NIL
• Independent Fab : Nil
• Fabless IC production: NIL
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7. Emergence of fabless semi- conductor
design firms
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8. Special Manpower Development Program in VLSI Design and
Related Software ,Phase-II (SMDP-II)
Establishing
State-of-the-
art
VLSI Design
Labs
Generation of
SMDP-II VLSI Manpower at
Website & 7 various levels
sites at RCs in the VLSI
Design Area
Major
Elements
of the
Program
Instruction
Enhancement
India Chip
Program (IEP)
Program
for faculties of
PIs
Workshops
with
International
Guest
Faculties 8

9. Primary Objective
To train special manpower in the area of VLSI
Design and related software at M.E./M.Tech
level (Type-II manpower). In addition to this,
generation of Type-III manpower i.e.
M.E./M.Tech in other areas of electronics etc.
with at least two courses on VLSI design will
also be undertaken.
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10. Secondary Objective
To train Type-IV manpower i.e. B.E./B.Tech in
electronics etc. with graduate level courses on
VLSI Design. However, the program will not
only be limited to generation of Type-II, III &
IV manpower but would endeavour to
generate Ph.D in various aspects of VLSI
design/microelectronics (Type-I manpower)
manpower as well. The establishment of VLSI
design laboratories at RCs would also
strengthen their academic program.
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11. Implementing Organizations
• 7 Resource Centers : 5 IITs, IISc Bangalore,
CEERI Pilani
• 25 Participating Institutes : 16 NITs, 9 other
institutions.
• Total Outlay - Rs.49.98 Crores
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12. Achievements
• Establishing State–of-the art VLSI Design Laboratories
at 32 institutes.
• Generation of manpower in VLSI Design area at
various levels :a total of 20,114 engineering graduates
in Electronics/ Communication/ Computer Science/
Instrumentation etc had taken a graduate level course
in VLSI design. At PG level, 4,395 students had taken at
least two courses in various aspects of VLSI Design and
CAD. An addition 2,701 PG students had their
specialization at ME/MTech in VLSI design & CAD.
Further PhDs were awarded to 255 researchers in
various aspects of VLSI design & CAD.
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13. Chip Layout views of integrated designs under India
Chip Programme
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14. India Design Centers
• Top 18 of 20 Top US semiconductor firms
established Design Centers in India.
• List includes:
• Intel, TI, Freescale, AMD, IBM, QUALCOMM,
Broadcom, Analog Devices, SanDisk, National,
Agilent, ATI, etc
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15. Why India matters in Chip design
• Skilled manpower: Credit goes to a large
extent to SMDP initiative.
• Preference to work with MNCs:
• Fear of Chinese clones:
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16. The future: System on Chip
Challenges:
• Getting our hands dirty in IP Trading
• Move from R&L ( Research and learning) to
R&D ( Research and Development)
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17. Thanks
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