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29/09/2008




         Exploitation of Flexible Hardware Platforms for
         Massively Parallel Bioinformatics Applications

                    Harald Devos, Ghent University
   DSP Valley Academia-to-Business Forum – 2008-09-30      pag. 1
   Zuiderpoort, Gent, Belgium




    Moore’s law is slowing down
• Clock frequencies do not
  increase anymore
• Computational
  requirements keep
  increasing
• Need to fully exploit
  potential for parallel
  computing


      The FlexWare Project, IWT SBO 060068                 pag. 2
      DSP Valley Academia-to-Business Forum – 2008-09-30




   Use parallel HW acceleration
• (Sequential) Software: ‘easy’ to write, easy
  to adapt
• Hardware:
 • Detection & exploitation of parallelism is difficult
 • Hardware (re)design is expensive
 • Need automatic hardware (re)generation!



      The FlexWare Project, IWT SBO 060068                 pag. 3
      DSP Valley Academia-to-Business Forum – 2008-09-30




                                                                            1
29/09/2008




              General need for HW
                 acceleration
Massively parallel applications also in other
 application domains:
       bioinformatics
       image and video processing
       scientific computing
       medical imaging and diagnosis
       speech processing
       visualization and rendering
       ...
     The FlexWare Project, IWT SBO 060068                 pag. 4
     DSP Valley Academia-to-Business Forum – 2008-09-30




                Parallel approaches
   General-purpose solutions:
       Coarse grain parallelism: multi-processor
        (e.g., the Cell)
       Fine grain parallelism: SIMD, VLIW
   Dedicated solutions:
       custom design (ASIC, FPGA)
   Novel (research) platforms

     The FlexWare Project, IWT SBO 060068                 pag. 5
     DSP Valley Academia-to-Business Forum – 2008-09-30




               Research Questions
   Which level of parallelism for which
    application?
   Communication and memory
    requirements?
   Platform selection and design/mapping
    support?



     The FlexWare Project, IWT SBO 060068                 pag. 6
     DSP Valley Academia-to-Business Forum – 2008-09-30




                                                                           2
29/09/2008




                         FlexWare approach
1. Analysis and extraction of fine grain (loop-
   level) parallelism;
2. Analysis of strengths/weaknesses of
   range of platforms
3. Automated support for platform selection
4. Design support for mapping application to
   platform

            The FlexWare Project, IWT SBO 060068                                                                                                                     pag. 7
            DSP Valley Academia-to-Business Forum – 2008-09-30




                  The FlexWare platforms
Flexible, parallel hardware platforms

    FPGA:                  ADRES: Coarse              VLIW: Ultra Wide                                 DSP: special
Fine grain array             Grain Array                Register File                               purpose processor

                                                                Wide Scratch                                P rogra m                                 Da t a
    CLB     CLB   CLB                                               Pad                                        RAM                                    RAM
                                                                                          Addr
                                                                                                                         In ter n al Bu s es
                                                                                                                                                                  DMA
                                                                                AGU       Da t a
                                                                                                      Regs (A 0-A 1 5)




                                                                                                                                               Regs (B 0-B 1 5)




                                                                                                                            .D1      .D2                          Ser. P ort
                                                                               LD/ST
                                                                                       Ext erna l                           .M1      .M2                          Hos t P ort
    CLB     CL    CLB
                                                                   VWR
                                                                  VWR                  Mem ory                              .L1      .L2
                                                                  VWR                   -Sync                                                                     Boot Loa d
                                                                                        -As ync                            .S1 .S2                                Tim ers
                                                                                                                          Cont rol Regs
                                                                                                                                                                  P wr Down
                                                                                                                                CP U
                                                       SWP         Compl       Compl
                                                      Shifter      x FU1       x FU2




            The FlexWare Project, IWT SBO 060068                                                                                                                     pag. 8
            DSP Valley Academia-to-Business Forum – 2008-09-30




                                  First testcase
Smith-Waterman sequence alignment
         quantify similarity between two character sequences
                                                   CGTCAGT                               CG——TCAGT
                        CGTCAGT                    || | |                                || ||
                        ACGAATC                   ACG——AATC                             ACGAATC
           +5      Equal characters            => positive score (match)
           -2      Different characters        => negative score (mismatch)
           -3      Aligning character with gap => negative score (gap penalty)

                          CGTCAGT
                          || | |                = 5 + 5 – 3 – 3 + 5 – 2 + 5 = 12
                         ACG——AATC
                          CG——TCAGT
                          || ||     = 5 + 5 – 3 – 3 + 5 + 5 = 14 = best!
                         ACGAATC
            The FlexWare Project, IWT SBO 060068                                                                                                                     pag. 9
            DSP Valley Academia-to-Business Forum – 2008-09-30




                                                                                                                                                                                        3
29/09/2008




                                 First results
   Comparison of Smith-Waterman
    implementations
                                           FPGA ADRES VLIW DSP
                    Speed                   ++    0    -/+  0
                    Power                    +    +    -/+  --
                    Design effort            -    0     0   +



   Other trade-offs expected for other
    applications
        Tests needed on other applications
        The FlexWare Project, IWT SBO 060068                                               pag. 10
        DSP Valley Academia-to-Business Forum – 2008-09-30




                    Project Consortium
               Parallel Information Systems group (UGent)
                • 40 people
                • Techniques and methodology for (reconfigurable) HW design


               Design Technology Group (IMEC)
                • 150 people
                • Novel processor architectures and mapping of applications onto them


               Dekimo Products NV
                • Ghent based engineering company
                • 50 engineers
                • Provides solutions for third party companies (intelligent electronics)


               Bioinformatics & Evolutionary Genomics group (UGent)
                • Gene and genome annotation
                • Comparative and evolutionary genomics

        The FlexWare Project, IWT SBO 060068                                               pag. 11
        DSP Valley Academia-to-Business Forum – 2008-09-30




    Current user group members
Design services and tools




Bioinformatics



Generic (technology development and other application)




    More candidate members are welcome !
        The FlexWare Project, IWT SBO 060068                                               pag. 12
        DSP Valley Academia-to-Business Forum – 2008-09-30




                                                                                                             4
29/09/2008




         Open User Group Meeting
   Tuesday December 16th 2008
   Overview of the project
        Results until now
        Planning for the next two years
   Open to all interested companies
   More info will be available on
    http://flexware.elis.ugent.be
        The FlexWare Project, IWT SBO 060068                 pag. 13
        DSP Valley Academia-to-Business Forum – 2008-09-30




                    Contact Information
   Coordinator: Prof. Dirk Stroobandt
        Dirk.Stroobandt@UGent.be
         Tel.: +32-9-2643401
         Ghent University, ELIS/PARIS
         Sint-Pietersnieuwstraat 41
         B-9000 Gent, BELGIUM
   IWT SBO 060068
    (Jan 2007 – Dec 2010)
   http://flexware.elis.ugent.be
        The FlexWare Project, IWT SBO 060068                 pag. 14
        DSP Valley Academia-to-Business Forum – 2008-09-30




                                                                               5

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A2 Bforum P1 09 Ugent Harald Devos Flexware

  • 1. 29/09/2008 Exploitation of Flexible Hardware Platforms for Massively Parallel Bioinformatics Applications Harald Devos, Ghent University DSP Valley Academia-to-Business Forum – 2008-09-30 pag. 1 Zuiderpoort, Gent, Belgium Moore’s law is slowing down • Clock frequencies do not increase anymore • Computational requirements keep increasing • Need to fully exploit potential for parallel computing The FlexWare Project, IWT SBO 060068 pag. 2 DSP Valley Academia-to-Business Forum – 2008-09-30 Use parallel HW acceleration • (Sequential) Software: ‘easy’ to write, easy to adapt • Hardware: • Detection & exploitation of parallelism is difficult • Hardware (re)design is expensive • Need automatic hardware (re)generation! The FlexWare Project, IWT SBO 060068 pag. 3 DSP Valley Academia-to-Business Forum – 2008-09-30 1
  • 2. 29/09/2008 General need for HW acceleration Massively parallel applications also in other application domains:  bioinformatics  image and video processing  scientific computing  medical imaging and diagnosis  speech processing  visualization and rendering  ... The FlexWare Project, IWT SBO 060068 pag. 4 DSP Valley Academia-to-Business Forum – 2008-09-30 Parallel approaches  General-purpose solutions:  Coarse grain parallelism: multi-processor (e.g., the Cell)  Fine grain parallelism: SIMD, VLIW  Dedicated solutions:  custom design (ASIC, FPGA)  Novel (research) platforms The FlexWare Project, IWT SBO 060068 pag. 5 DSP Valley Academia-to-Business Forum – 2008-09-30 Research Questions  Which level of parallelism for which application?  Communication and memory requirements?  Platform selection and design/mapping support? The FlexWare Project, IWT SBO 060068 pag. 6 DSP Valley Academia-to-Business Forum – 2008-09-30 2
  • 3. 29/09/2008 FlexWare approach 1. Analysis and extraction of fine grain (loop- level) parallelism; 2. Analysis of strengths/weaknesses of range of platforms 3. Automated support for platform selection 4. Design support for mapping application to platform The FlexWare Project, IWT SBO 060068 pag. 7 DSP Valley Academia-to-Business Forum – 2008-09-30 The FlexWare platforms Flexible, parallel hardware platforms FPGA: ADRES: Coarse VLIW: Ultra Wide DSP: special Fine grain array Grain Array Register File purpose processor Wide Scratch P rogra m Da t a CLB CLB CLB Pad RAM RAM Addr In ter n al Bu s es DMA AGU Da t a Regs (A 0-A 1 5) Regs (B 0-B 1 5) .D1 .D2 Ser. P ort LD/ST Ext erna l .M1 .M2 Hos t P ort CLB CL CLB VWR VWR Mem ory .L1 .L2 VWR -Sync Boot Loa d -As ync .S1 .S2 Tim ers Cont rol Regs P wr Down CP U SWP Compl Compl Shifter x FU1 x FU2 The FlexWare Project, IWT SBO 060068 pag. 8 DSP Valley Academia-to-Business Forum – 2008-09-30 First testcase Smith-Waterman sequence alignment  quantify similarity between two character sequences CGTCAGT CG——TCAGT CGTCAGT || | | || || ACGAATC ACG——AATC ACGAATC +5 Equal characters => positive score (match) -2 Different characters => negative score (mismatch) -3 Aligning character with gap => negative score (gap penalty) CGTCAGT || | | = 5 + 5 – 3 – 3 + 5 – 2 + 5 = 12 ACG——AATC CG——TCAGT || || = 5 + 5 – 3 – 3 + 5 + 5 = 14 = best! ACGAATC The FlexWare Project, IWT SBO 060068 pag. 9 DSP Valley Academia-to-Business Forum – 2008-09-30 3
  • 4. 29/09/2008 First results  Comparison of Smith-Waterman implementations FPGA ADRES VLIW DSP Speed ++ 0 -/+ 0 Power + + -/+ -- Design effort - 0 0 +  Other trade-offs expected for other applications  Tests needed on other applications The FlexWare Project, IWT SBO 060068 pag. 10 DSP Valley Academia-to-Business Forum – 2008-09-30 Project Consortium Parallel Information Systems group (UGent) • 40 people • Techniques and methodology for (reconfigurable) HW design Design Technology Group (IMEC) • 150 people • Novel processor architectures and mapping of applications onto them Dekimo Products NV • Ghent based engineering company • 50 engineers • Provides solutions for third party companies (intelligent electronics) Bioinformatics & Evolutionary Genomics group (UGent) • Gene and genome annotation • Comparative and evolutionary genomics The FlexWare Project, IWT SBO 060068 pag. 11 DSP Valley Academia-to-Business Forum – 2008-09-30 Current user group members Design services and tools Bioinformatics Generic (technology development and other application) More candidate members are welcome ! The FlexWare Project, IWT SBO 060068 pag. 12 DSP Valley Academia-to-Business Forum – 2008-09-30 4
  • 5. 29/09/2008 Open User Group Meeting  Tuesday December 16th 2008  Overview of the project  Results until now  Planning for the next two years  Open to all interested companies  More info will be available on http://flexware.elis.ugent.be The FlexWare Project, IWT SBO 060068 pag. 13 DSP Valley Academia-to-Business Forum – 2008-09-30 Contact Information  Coordinator: Prof. Dirk Stroobandt  Dirk.Stroobandt@UGent.be Tel.: +32-9-2643401 Ghent University, ELIS/PARIS Sint-Pietersnieuwstraat 41 B-9000 Gent, BELGIUM  IWT SBO 060068 (Jan 2007 – Dec 2010)  http://flexware.elis.ugent.be The FlexWare Project, IWT SBO 060068 pag. 14 DSP Valley Academia-to-Business Forum – 2008-09-30 5