1. Caching

2. The Processor-Memory
Performance Gap

3. The Memory Problem

4. Program Locality

5. Typical Memory Hierarchy:
Everything is a Cache for
Something Else

6. Caches

7. Cache Organization & Access

8. Cache Operation

9. What About Writes?

10. Cache Write Policies: Major
Options

11. Write Policy Trade-offs

12. Write Miss Policies

13. Cache Performance

14. Understanding Cache Misses: The
“3 Cs”

15. Block size

16. Conflict misses

17. Fully Associative Cache

18. Set-associative caches

19. Replacement Policies

20. Tuning Basic Cache Parameters:
Size, Associativity, Block size

21. Within a Multi-core Processor

22. Multi-level Caches

23. 2-level Cache Performance
Equations

24. Multi-level Inclusion

25. Victim Caches

26. Pseudo-Associative Caches

27. Pseudo-Associative Cache“

28. Skew-Associative Caches

29. Critical Word First

30. Non-blocking or Lockup Free
Caches

31. Potential of Non-blocking
Caches

32. Miss Status Handling Register

33. MSHR

34. Non-block Caches: Operation

35. Prefetching

36. Software Prefetching

37. Hardware Prefetching

38. Simple Sequential Prefetching

39. Stream Prefetching

40. Strided Prefetching

41. Other Ideas in Prefetching

42. Multi-ported Caches

43. True Multi-porting

44. Multi-banked Caches

45. Sun UltraSPARCT28-bank L2
cache