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♦ Mixed-signal semiconductor company
     Headquartered in Austin, TX
     Fabless manufacturing model


♦ Proven, established partner
     $425M annual revenue
     More than 600 employees


♦ World-class mixed-signal talent
     Engineering focused
     Broad IP portfolio
♦ Workhorse technology for semiconductor industry
     Low cost, abundant, portable
     Consistently two generations ahead of other technologies



♦ New architectures for high-performance mixed-signal ICs
     Breakthrough integration possibilities
     Opportunity to leverage mixed-signal design expertise
!"                           #




First Globally    First Single Chip       First CMOS          First CMOS         First CMOS           First Single-Chip
 First Globally    First Single Chip       First CMOS          First CMOS         First CMOS           First Single-Chip
  Compliant            GSM RF             GSM/GPRS          8051 MCU with           Digital              GSM/GPRS
   Compliant            GSM RF             GSM/GPRS          8051 MCU with           Digital              GSM/GPRS
 Silicon DAA         Synthesizer          Transceiver         24-bit ADC                                    Phone
  Silicon DAA         Synthesizer                                                 FM Tuner
                                           Transceiver         24-bit ADC                                    Phone
                                                                                   FM Tuner



        $%%&                                                                                   ''(




                             First Integrated
       First Embedded                                First CMOS       First Single-Chip        First Fully Digital
                              First Integrated
        First Embedded                                First CMOS       First Single-Chip        First Fully Digital
         Modem with                                  GSM Power        CMOS GSM/GPRS                  Power
                                  CMOS
          Modem with                                 GSM Power         CMOS GSM/GPRS                  Power
                                   CMOS
         Silicon DAA                                  Amplifier          Transceiver               Controller
                                   SLIC
          Silicon DAA                                  Amplifier          Transceiver               Controller
                                    SLIC
)##

    Customer Requirements
         Small footprint

    Low power consumption

    Few external components


                                Customer Benefits
                              High level of integration

                               Easy implementation

                               Rapid time-to-market



(
+          +      #

                                      Precision Mixed-Signal
        SiRX™ Satellite Receivers
                                      Small Form Factor
        FM Radio Tuners
                                      CAN
        Satellite Radio Tuners
                                      USB
                                      USB to UART Bridge

        AeroFONE™ Single-Chip Phone
        Aero® Transceiver Family
                                      Frequency Control Solutions
        GSM/GPRS Power Amplifier
                                      Precision Clock ICs
        RF Synthesizers



        ISOmodem®
                                      Digital Power Controllers
        ProSLIC®
        DSL AFE
        Silicon DAA
        SiPHY® High-Speed ICs
*
+



    Precision Mixed-Signal
    Small Form Factor
    CAN
    USB
                             Applications:
    USB to UART Bridge       Industrial
                             Consumer
                             Automotive
                             Medical
                             Power Management




,
-.                       /   0
    ♦ Smallest
                       3x3 mm, 4x4 mm, 5x5 mm packages
                       Very flexible I/O system to maximize pin functions
                       Highest integration in class

                 $''




                                                         ♦ Fastest
                  %'

                  &'

                  ,'

                                                                 Fastest 8-Bit CPU available–100 MHz
     Peak MIPS




                  *'


                                                                 70% of instructions 1 or 2 cycles
                  ('

                   '

                                                                 On-chip debugging hardware
                   '


                                                                 8051 compatible
                   '

                  $'

                   '
                        A   B    C   Silicon   Silicon
                                      Labs      Labs




    ♦ Best analog
                       ADCs
                       DACs
                       Precision oscillator
                       Comparators
                       On-chip temperature sensor


&
0   00
         Typical 8-bit MCU
    Multi-Chip Discrete Solution                                                               Silicon Labs Solution

                                          XTA L




                                                      u CO NTRO LLER
                         CMP

        C

                                       C
       PGA




                                          R
                     R     R

                     R         R

             C
                                   R
                                   R EF
            ADC 24




                                                                   DAC 12


                                   C
                                                  C




    19.4 x 16.5 mm = 320 mm²                                                                    5 x 5 mm = 25 mm²
                               Advance analog integration enables the following:
                                                  Complete system-on-a-chip
                                                  Simpler designs and shorter design cycle
                                                  Faster time to market
                                                  Higher reliability and less quality issues
                                                  Better cost structure


%
1       0+        #      2

 Flash Memory:                    8051 CPU:
 On-chip charge pump              Up to 100 MHz
 Small segments                   70% Instr. in 1 or 2 cycles
 Security                         Pipelined object code
 Emulates byte EEPROM             compatibility
                                  Timers:
 Serial Communications:
                                  Capture & Compare
 UART
                                  Accumulate
 SPI
                                  PWM
 SMBus
                                  RTC
 USB 2.0
 CAN 2.0B
                                  Analog-to-Digital:
 I/O:                             Up to 16-Bit SAR
 Dynamically reconfigurable       Up to 24-Bit Sigma-Delta
                                  Up to 1 Msps
 Analog:                          Dual ADC option
 Temperature sensor               Up to 32-Channels
 Programmable comparators         Selectable VREF
 Precision Oscillator
                                  Digital-to-Analog:
 Cross Bar:                       Up to 12-Bit
 Custom select I/O

 Debug:
 On-chip JTAG-based



$'
3                             #        "4

 ♦ Many embedded systems are distributed networks and
   must be connected in order to share information
 ♦ Different embedded networks require different modes of
   connectivity
      High-speed
      Wireless
         RF
         IR
      TCP/IP based
      Fault tolerant
      Cost effective
 ♦ Silicon Laboratories has embedded connectivity solutions
   for each one of these areas



$$
-.

    ♦ USB Connectivity
            Wide range of MCU and fixed function solutions with software
            drivers and reference designs
    ♦ RF wireless networking
            802.15.4 and ZigBee solutions
    ♦ Ethernet and TCP/IP networks
            Hardware reference designs
            Full CMX TCP/IP protocol stack
    ♦ Fault-tolerant distributed networking
            CAN enabled MCU products with 32 message buffers
    ♦ Cost sensitive networks                                              RS-485 multi-drop network
                                                                           RS-    multi-
            UART, IIC, and SPI enabled MCUs




                                                         CP2201 Evaluation Kit


                   Ethernet Development Kit
$
/         0                                                               2/                          02


    ♦ CP210x family of devices                                                                                                                                                                 P0.0
                                                                                                                                                                                       P
                                                                                                                                                    Port 0                                     P0.1
                                                                                                                                                                                       0
                                                                5.0V                                                                                                                           P0.2/XTAL1
                                                                                                                                                    Latch
                                                                             Voltage         Enable
                                            REGIN                      IN

          Fixed function USB to UART
                                                                                                                                                                                               P0.3/XTAL2
                                                                            Regulator
                                                                                                                                                                                               P0.4
                                                                                                                                                                                       D
                                                                                                                                                   UART0
                                                                              OUT                                                                                                              P0.5
                                                                                                                                                                                       r       P0.6/CNVSTR

          bridges provide the easiest                                                                                                                                                  v
                                                           Analog/Digital                                                                                                                      P0.7/VREF
                                             VDD
                                                                                                                                                   UART1
                                                              Power
                                                                                                                      SFR Bus                                                                  P1.0

          method for upgrading legacy
                                                                                                                                                                                       P
                                             GND                                                                                                    Timer                                      P1.1
                                                                                                                  8                                                                    1
                                                                                                                                                   0,1,2,3 /                                   P1.2
                                                                                                                                                     RTC                                       P1.3
                                                                                                                           64 kB
          RS-232 systems with USB                                                                                 0
                                                        C2D
                                                                                                                                                                            C                  P1.4
                                                                                                                                                                                       D
                                                                               Debug HW                                   FLASH                                                                P1.5/ALE
                                                                                                                                                                            R
                                                                                                                                                    PCA/                               r
                                                                                                                  5                                                                            P1.6/RD
                                                                                                                                                                            O
                                                                                                                                                    WDT                                v       P1.7/WR
                                                                                                                         256 Byte

    ♦ Mixed-Signal USB MCUs
                                                                                                          Reset                                                             S
                                                                                                                  1
                                        RST/C2CK                                                                          SRAM                                              S
                                                                                                                                                   SMBus                                       P2.0/A0
                                                                                                                                                                                       P
                                                                                                                                                                            B                  P2.1/A1
                                                                                Brown-                                                                                                 2
                                                                       POR                                                  4 kB                                            A                  P2.2/A2
                                                                                                                                                     SPI
                                                                                 Out
                                                                                                                  C
          High-speed 8051 core operating
                                                                                                                                                                                               P2.3/A3
                                                                                                                           XRAM                                             R
                                                    XTAL1 XTAL2                                                                                                                                P2.4/A4
                                                                                                                                                                                       D
                                                                                                                                         C
                                                                                                                  o                                                                            P2.5/A5
                                                                                                                                                   P1 Latch                            r       P2.6/A6
                                                                                                                                         T
                                                      External
          up to 48 MIPS
                                                                                                                                                                                       v
                                                                                                                  r                                                                            P2.7/A7
                                                                                                                                         L
                                                      Oscillator
                                                                                                                        External Data
                                                       Circuit
                                                                                                                  e                                                                            P3.0/A8/C2D
                                                                                                                        Memory Bus             P2 Latch                                P
                                                                                                      System
                                                                                                                                                                                               P3.1/A9

          Up to 64 kB on-board Flash and
                                                                                                                                         A
                                                                                                       Clock                                                                           3
                                                      12 MHz                                                                                                                                   P3.2/A10
                                                                                                                                         d
                                                       Internal                  x4          ÷2                                                                                                P3.3/A11
                                                                                                                                         d                                                     P3.4/A12
                                                                                                                                                                                       D
                                                      Oscillator                                                                                   P3 Latch
          5376 bytes of RAM
                                                                                                                                                                                               P3.5/A13
                                                                                                                                         r                                             r
                                                                                                                                                                                               P3.6/A14
                                                                                                                                                                                       v       P3.7/A15

                                                                                 ÷2
          17 ch. 10-bit, 200 ksps ADC
                                                                                                                                                                                               P4.0/D0
                                                                                                                                                                                       P
                                                                                              USB Clock
                                                                                                                                         D                                                     P4.1/D1
                                                      Clock
                                                                                                                                                                                       4
                                                                             ÷ 1,2,3,4                                                             P4 Latch                                    P4.2/D2
                                                     Recovery                                                                            a
                                                                                                                                                                                               P4.3/D3
                                                                                                                                         t

          External memory interface
                                                                                                                                                                                       D       P4.4/D4
                                                                                                                                         a                                                     P4.5/D5
                                                                                  USB               USB
                                              D+                                                                                                                                       r
                                                                                                                                                                                               P4.6/D6
                                                                               Transceiver        Controller                                                                           v
                                               D-                                                                                                                                              P4.7/D7
                                                                                                                                                      VREF


          In-system non-intrusive debug
                                                                                                                                                               CP0      +
                                                                                                                                                                        -
                                            VBUS
                                                                                                  1 kB USB                                   VREF
                                                                                                                                                               CP1
                                                                                                    SRAM
          engine eliminates the need for
                                                                                                                                                                        +
                                                                                                                                                                        -
                                                                                                                                             VDD
                                                                                                                                                                     Temp


          emulators                                                                                                                                10-bit              A          AIN0-AIN16
                                                                                                                                                   200 ksps            M
                                                                                                                                                   ADC

          Integrated on-chip regulator,
                                                                                                                                                                                VDD
                                                                                                                                                                       U
                                                                                                                                                                       X        VREF



          oscillator, and USB transceiver
                                                                                              C8051F340-GQ
          Effective operating range from
          2.7 to 5.25 V

$
5
    ♦ CP220x single-chip Ethernet
      controller
         Industry’s smallest, highest performance
         10Base-T Ethernet controller
         10/100Base-T compatible

                                      ♦ Ethernet evaluation kit
                                              The CP2201EK demonstrates the
                                              simplicity of adding Ethernet connectivity
                                              to a product
                                              Demo applications included

♦ Ethernet development kit
         Provides everything needed to develop
         an embedded Ethernet solution with the
         CP220x
         CMX TCP/IP stack included free of cost
         or royalty fees
$
&' 6
        $(6 7 8
 ♦ Microcontrollers
        Low current consumption
        High throughput 8051 CPU (up to
        100 MIPS)


                                       ♦ Development Kits
                                               2.4 GHz ISM band operation
                                               IEEE 802.15.4 PHY/MAC evaluation
                                               Helicomm ZigBee protocol stack and
                                               tools


 ♦ Modules
        Silicon Labs/Helicomm co-developed
        8051-based modules
        Full drop-in wireless solution to ensure
        fastest time-to-market

$(
#           )

 ♦ Detailed inspection of USB solutions
      Demonstration of Mass Storage Reference Design
 ♦ Review Ethernet development platform
      Demonstration of Ethernet evaluation kit
 ♦ Describe 802.15.4 and ZigBee solutions

 ♦ Let’s get started…




$*
♦ Benefits of USB

                               Plug & Play
                 Easy to Use
                                              Low Power
                                             Consumption

          Fast

                                                  Low Cost

                 Reliable
                                   RS232 Ports
                                   Disappearing




$&
#        #

 ♦ Ease of Use
      One interface for many devices
      Hot pluggable
      Automatic configuration
      No power supply required
          Devices can pull up to 500mA from
          the bus
 ♦ Reliability
      Lossless data transfers




$%
#         #

♦ Speed
     Three transfer speeds
        Low Speed – 1.5 Mbps (USB 1.1 and 2.0)
        Full Speed – 12 Mbps (USB 1.1 and 2.0)
        High Speed – 480 Mbps (USB 2.0 only)
        Silicon Labs devices support Low and Full Speed. (USB 2.0 Compliant)
♦ Low Power Consumption
     Suspend mode
        Devices consume 500 A or less
♦ Availability
     Microsoft and Intel’s PC 2001 System Design Guide requires that all
     new PC’s have two user-accessible USB ports.




'
)#

♦ USB – Universal Serial Bus

♦ Host – System which initiates all transfers over the bus

♦ Device – Peripheral which communicates with and receives information from the
  host

♦ Hub – Provides connecting points and power

♦ Pipe – Logical abstraction which creates an association between an endpoint on
  a device and the host software

♦ Endpoint – Memory buffer on a device which serves as a sink or source of data
       IN Endpoint – Endpoint from which host reads data
       OUT Endpoint – Endpoint to which host writes data
           Endpoints on Silicon Labs MCUs are implemented as FIFO’s in on-chip XRAM




$
)#

     Transfer – The process of making and carrying out a communication
     request
     Transaction – The delivery of service to an endpoint
     Packet – Block of information
     Frame – A 1 ms time base established on low- and full-speed buses
♦ Transfers are divided into transactions.
♦ Transactions are made up of packets.
♦ The host controls transfers by allocating transactions to a
  frame.
♦ Transfers may span multiple frames.
2   )
)#

♦ Enumeration
     Enumeration is the activity that identifies and assigns unique
     addresses to devices attached to a bus
     Makes USB devices hot-pluggable
         The host is always checking the bus for new devices
     The host cannot communicate with a USB device until that device
     has been properly enumerated
     Invisible to user




(
+              02                    #            1

♦ Enumerate Devices

♦ Transfer Data with Peripherals

♦ Provide Power
     A full-power USB Host can provide up to 500 mA for each peripheral
     Some low-power USB hosts support only low-power devices which
     are limited to 100 mA
     USB peripherals can be self-powered as well


♦ Manage the USB Bus



*
+           02                #          +

♦ Transfer Data with the USB Host

♦ Manage power
    The supply current that can be drawn from the bus depends on the
    state of the bus
    A bus-powered device in normal mode may draw up to 500 mA
    When the bus is suspended, the device must draw less than 500 uA
    If the device supports remote wakeup, it may draw up to 2.5 mA
    when in suspend mode


♦ Respond to Standard Requests from the Host



,
+            95                7+

♦ All data is transferred to or from a device endpoint

♦ An Endpoint is memory on the USB peripheral that stores
  the data it receives from the host or it stores the data it
  intends to send

♦ Endpoints transfer data in one direction and labeled either
  IN or OUT, except for control endpoints which are
  bidirectional

♦ A Pipe is a logical connection between an endpoint on the
  device and the host controller’s software



&
#

♦ Four types of transfers:
    Control Transfers
    Bulk Transfers
    Interrupt Transfers
    Isochronous Transfers




%
#

♦ Control Transfers
    Two uses:
       Carry mandatory requests which enable the host to recognize
       and enumerate devices
       Carry user-defined requests for any other purpose
    Mandatory: Every device must support control transfers
    Top Speeds:
       Full Speed – 832 Kbytes/sec




'
#

♦ Bulk Transfers
    Fastest transfer type
    No guaranteed data rate or latency
    Supported only by High and Full
    Speed devices
    Top Speeds:
       Full Speed – 1.2 Mbytes/sec
     Common Applications:
       Printers
       Scanners
       Disk Drives (USB thumb drive)



$
#

♦ Interrupt Transfers
     Guaranteed latency
     Top Speeds:
       Full Speed – 64 Kbytes/sec
     Common Applications:
       Keyboards
       Mice
       Joysticks
#

♦ Isochronous Transfers
     Streaming real-time transfers
        Guaranteed delivery rate and
        latency
        No error correction – Not
        lossless!
     Supported only by High and
     Full Speed devices
     Top Speeds:
        Full Speed - 1.0 Mbytes/sec
     Common Applications:
        Music
        Video
)

♦ USB defines a set of standard device classes to enable interoperability
  across multiple platforms

      HID – Human Interface Device
          Keyboards, mice, controls, thermometers, voltmeters

      Mass Storage
          Removable and non-removable storage: floppy, hard, optical, and Flash drives

      Audio
          Speaker, microphone, audio processor

      Communications Device Class
          Analog and digital modems, analog and digital telephones, ADSL and cable
          modems, ethernet adapters and hubs

      IrDA, Power, Printer, Smartcard, Imaging, etc.
)                   #

♦ The Host machine distinguishes between devices by looking at their
  unique identifiers
        VID – Vendor ID
            Assigned by the USB Implementer’s Forum
        PID – Product ID
            Assigned by the vendor
        Serial Number
            Assigned by the developer/manufacturer
            Unique for every USB device
♦ Silicon Labs Allotment System
        Silicon Labs has a unique VID (0x10C4)
        All in-house items are assigned a PID under our VID
        Customers may receive PID’s under our VID for bridge and MCU products
        Contact mcutools@silabs.com to receive a PID



(
+               "             :             2




                             Ba
        De
           vic




                               nd




                                                rs
                                                         m
                 eC
                    Application requirements sto




                                            ive
                                 wi
                   las                      u




                                   dth




                                         Dr
                                                     C
                         s




                             Requirements


                              Silicon Labs
                                h/w, s/w,
                              drivers, and
                               examples

                              Certification

                               Production
*
.
Condition                USB Option                 Benefits                    Potential Downside
Legacy RS-232 upgrade    Use fixed-function         Shortest time to market -   Requires host driver
                         USB/UART bridge            - No change to host         installation
                         device (CP210x) + VCP      application or firmware
                         driver
Don’t have time to       Use USBXpress®             2nd Shortest time to        Requires host driver
master USB – need high                              market -- Easy to use       installation
bandwidth                                           high-speed data pipe (up
                                                    to 1 M bytes/sec)
App fits MSD class       Use MSD reference          No host driver install –    Requires ~11 kB code
definition               design                     intuitive “drag-and-drop”   space
                                                    interface
App fits HID class       Use HID application note   No host driver install      Limited to 64 K bytes/sec
definition               and example code                                       max data rate
App fits Audio class     Use USB Audio              No host driver install
definition               application note and
                         example code
Does not fit existing    Use existing Control,      Optimized for application   Longest development
class                    Interrupt, and Bulk                                    time -- requires custom
                         firmware and driver                                    firmware and driver
                         examples as starting                                   development
                         point


,
#

♦ USB Implementer’s Forum (USB-IF)
    www.usb.org
    Assigns Vendor IDs (VIDs)
    Oversees Compliance Testing
       USB products must pass compliance testing in order to display the USB
       logo and to be listed on the USB-IF Integrators List
       Contact mcutools@silabs.com for help with compliance testing




&
+                     -
                                                                  TQFP48 (9X9)
                         QFN 28 (5X5)          LQFP32 (9X9)
                                                                  EMIF, 2 UARTs

                                                                                  ♦ Pin-for-pin compatibility for
      MCU        MIPS

                                                                                    effortless migration
    64K, 5376     48                             F342-GQ            F340-GQ
    bytes RAM
      Mixed-
                                                                                         16 to 64kB
                  25                             F346-GQ            F344-GQ
    Signal USB


                                                                                         25 to 48 MIPS
      MCU        MIPS

                                                                                         Price sensitive to high
    32K, 3328     48                             F343-GQ            F341-GQ
    bytes RAM
                                                                                         performance
      Mixed-
                  25                             F347-GQ            F345-GQ
    Signal USB

                                                                                  ♦ Highly integrated solutions
      MCU        MIPS
                                                                                    in small form factors
    16K, 1536
    bytes RAM
                  25        F321-GM              F320-GQ
                                                                                  ♦ Larger packages include
      Mixed-
    Signal USB

                                                                                    external memory interface
      MCU        MIPS
                                                                                    for additional expansion
                            F327-GM
    16K, 1536
    bytes RAM     25
       USB
                            F326-GM



    USB-Serial   Host
     Interface    I/O
                        CP2102        CP2103
     Internal    Yes
      OSC,
     VREG,
                 No     CP2101
    EEPROM



                 Product Offerings and Packages

%
+          #        /                0

♦ High-speed 8051 core operating                                                                                                                                                     P0.0
                                                                                                                                                                             P
                                                                                                                                          Port 0                                     P0.1


  up to 48 MIPS
                                                                                                                                                                             0
                                                       5.0V                                                                                                                          P0.2/XTAL 1
                                                                                                                                          Latch
                                                                    Voltage         Enable
                                   REGIN                      IN                                                                                                                     P0.3/XTAL 2
                                                                   Regulator
                                                                                                                                                                                     P0.4
                                                                                                                                                                             D
                                                                                                                                          UART0
                                                                     OUT                                                                                                             P0.5
                                                                                                                                                                             r

♦ 64 kB on-board Flash and 5376
                                                                                                                                                                                     P0.6/CNVSTR
                                                                                                                                                                             v
                                                  Analog/Digital                                                                                                                     P0.7/VREF
                                    VDD
                                                                                                                                          UART1
                                                     Power
                                                                                                             SFR Bus                                                                 P1.0


  bytes of RAM
                                                                                                                                                                             P
                                    GND                                                                                                   Timer                                      P1.1
                                                                                                         8                                                                   1
                                                                                                                                         0,1,2,3 /                                   P1.2
                                                                                                                                           RTC                                       P1.3
                                                                                                                  64 kB
                                                                                                         0
                                               C2D
                                                                                                                                                                  C                  P1.4
                                                                                                                                                                             D
                                                                      Debug HW

♦ 17 ch. 10-bit, 200 ksps ADC
                                                                                                                 FLASH                                                               P1.5/ALE
                                                                                                                                                                  R
                                                                                                                                          PCA/                               r
                                                                                                         5                                                                           P1.6/RD
                                                                                                                                                                  O
                                                                                                                                          WDT                                v       P1.7/WR
                                                                                                                256 Byte                                          S
                                                                                                 Reset
                                                                                                         1
                               RST/C2CK                                                                          SRAM                                             S
                                                                                                                                          SMBus

♦ External memory interface
                                                                                                                                                                                     P2.0/A0
                                                                                                                                                                             P
                                                                                                                                                                  B                  P2.1/A1
                                                                       Brown-                                                                                                2
                                                              POR                                                  4 kB                                           A                  P2.2/A2
                                                                                                                                           SPI
                                                                        Out
                                                                                                         C                                                                           P2.3/A3
                                                                                                                  XRAM                                            R
                                           XTAL1 XTAL2                                                                                                                               P2.4/A4
                                                                                                                                                                             D

♦ In-system non-intrusive debug
                                                                                                                               C
                                                                                                         o                                                                           P2.5/A5
                                                                                                                                      P1 Latch                               r       P2.6/A6
                                                                                                                               T
                                             External                                                                                                                        v
                                                                                                         r                                                                           P2.7/A7
                                                                                                                               L
                                             Oscillator
                                                                                                               External Data

  engine eliminates the need for
                                              Circuit
                                                                                                         e                                                                           P3.0/A8/C2D
                                                                                                               Memory Bus             P2 Latch                               P
                                                                                             System
                                                                                                                                                                                     P3.1/A9
                                                                                                                               A
                                                                                              Clock                                                                          3
                                             12 MHz                                                                                                                                  P3.2/A10
                                                                                                                               d
                                              Internal                  x4          ÷2                                                                                               P3.3/A11


  emulators                                                                                                                    d                                                     P3.4/A12
                                                                                                                                                                             D
                                             Oscillator                                                                               P3 Latch                                       P3.5/A13
                                                                                                                               r                                             r
                                                                                                                                                                                     P3.6/A14
                                                                                                                                                                             v       P3.7/A15


♦ Integrated on-chip regulator                                          ÷2                                                                                                           P4.0/D0
                                                                                                                                                                             P
                                                                                     USB Clock
                                                                                                                               D                                                     P4.1/D1
                                             Clock
                                                                                                                                                                             4
                                                                    ÷ 1,2,3,4                                                         P4 Latch                                       P4.2/D2
                                            Recovery                                                                           a
                                                                                                                                                                                     P4.3/D3


♦ Effective operating range from
                                                                                                                               t
                                                                                                                                                                             D       P4.4/D4
                                                                                                                               a                                                     P4.5/D5
                                                                         USB               USB
                                     D+                                                                                                                                      r
                                                                                                                                                                                     P4.6/D6
                                                                      Transceiver        Controller                                                                          v
                                      D-                                                                                                                                             P4.7/D7

  2.7 to 5.25 V
                                                                                                                                            VREF
                                                                                                                                                     CP0      +
                                                                                                                                                              -
                                   VBUS
                                                                                         1 kB USB                                  VREF
                                                                                                                                                     CP1
                                                                                           SRAM                                                               +
                                                                                                                                                              -
                                                                                                                                   VDD
                                                                                                                                                           Temp


                                                                                                                                         10-bit              A          AIN0-AIN16
                                                                                                                                         200 ksps            M
                                                                                                                                         ADC                          VDD
                                                                                                                                                             U
                                                                                                                                                             X        VREF




                                                                                         C8051F340-GQ


'
)

♦ Evaluation kits for USB/UART
  Bridge Devices
      CP2102EK, CP2103EK
      VCP Driver CD included
                                     CP2103 Evaluation Board
♦ Full development kits for Flash-
  based USB MCUs
      C8051F320DK
      C8051F326DK
      C8051F340DK

      Integrated IDE, assembler,
      compiler, linker, debugger

      On-chip debug hardware
      (breakpoints, watchpoints,
                                     USB MCU Development Kit
      single-step)


$
#

♦ Silicon Labs USB support software is broad-based, from easiest to
  use to greatest flexibility and highest performance

                       Support Software
                            Drivers          No Firmware
                 VCP                          Required
                                    Firmware       Boot Loader
                                     Library         Example
                USBXpress®                         File Transfer
                                  Windows DLL
                                                     Example
                                   Drivers and Firmware
                Software         Bulk               Interrupt
                                            HID          Audio /
                Examples   MSD   HID
                                       Boot Loader Isochronous



                    3rd Party Tools
Products                Support Hardware                           Support Software
                                                                                Drivers         No Firmware
                                                                       VCP
                 C8051F326

                                      F340-DK                                                    Required
                 C8051F327




                 15                                                                    Firmware       Boot Loader
                                      F326-DK                                           Library         Example
                                                                   USBXpress®
                              +                            +                                                          =
                                                                                                      File Transfer
                                                                                     Windows DLL
                                      F320-DK                                                           Example
                C8051F340                                                             Drivers and Firmware
                C8051F341
                                                                   Software         Bulk               Interrupt
 CP2101
                                     CP2103-EK
                C8051F342
                                                                                              HID           Audio /
                                                                   Examples
 CP2102
                C8051F343                                                     MSD   HID
 CP2103                                                                                   Boot Loader Isochronous
                C8051F344
                C8051F345
                                     CP2102-EK
   5            C8051F346
                                                                        3rd Party Tools
                C8051F347
C8051F320
C8051F321




                                    Innovative Applications
                                                                           Mass Storage Device (MSD)
             USB FM Tuner            Human Interface Device (HID)
                                                                          Best Practices w / Data Logger
             (‘F321+Si4701)          Best Practices Application Note
                                                                                     Example
2     "        "#               )
Accelerating Embedded Radio Applications
1            ;   !<


                                !

                                               C8051F321




     Buffered
    32.768 kHz
      (MCU)
                                    Low Cost
                                     Watch
                                     Crystal




                     "!
                      #$%
                        "   &



(
#   2   "




                !"   #




*
0

♦ USB FM Radio Hardware

♦ User’s Guide: Explains easy set-up
          Guide
  to use radio

♦ AN264: Provides systems overview,
  AN264
  interface specifications, USB device
  classes, firmware overview

♦ AN283: Provides in-depth tutorial on
  USB Audio class implementation

♦ AN264SW: “Unzips” to provide all
  AN264SW
  design documentation in native
  formats

♦ Radio Player: Launch executable
           Player
  file directly from your PC (no
  installation required)


,
2   #



            www.silabs.com/usbradio

            Complete technical
            information including:
            user’s guide, applications
            note, Gerber files,
            schematics, BOM,
            firmware source, and
            Radio Player source




&
-.
5/            )         -




 ♦ Fleet shipping container monitoring system

          Record temperature once per second (8 bits per sample)

          Record time and magnitude of disturbances (load shifts, dropped
          packages, etc.) using an accelerometer (16 bits per sample)

          Data logging for 3 months requires a lot of storage space:
             3600 secs/hr * 24 hrs/day * 30 days/month * 3 months * 3 bytes per
             sample = over 21 million bytes




('
1   !)




($
2   !)




(
)                 9                          #

1. Connect RS-232 cable between PC and Demo Board
2. Connect DC Power Adapter to Demo Board
3. Set up HyperTerminal to use COM port at 115200 Baud, 8
   Data bits, No Parity, 1 Stop Bit, No flow control, and “Append
   line feeds to incoming line ends”




(
)                                            9                 #

    4.        Use the Command Interpreter shell
              presented by the device in HyperTerminal to
              log temperature data to a file:
         a)       Type “calibrate 25” to calibrate the device to
                  room temp (25 C)
         b)       Type “templog temp.txt” to initiate a
                  temperature data log
         c)       Wait a few seconds to collect some
                  temperature data
         d)       Type “templog” to stop logging temperature
                  data
         e)       Type “type temp.txt” to view the stored file




(
)                                     9              #

 5.           Use the Command Interpreter shell
              presented by the device in
              HyperTerminal to log button
              press/release events to a file:
         a)      Type “log button.txt” to begin logging
                 button events
         b)      Press buttons “P2.0” and “P2.1”
                 repeatedly
         c)      Type “log” again to end button event
                 logging
         d)      Type “type button.txt” to view the
                 stored file




((
)                      9                      #

 ♦ In addition to the commands used in the previous walk-
   through, the demo application implements the following
   commands:
         cls: Clear Screen
         del <filename>: Delete a file
         dir: List directory contents
         chkdsk: Print media size information
         s <#####>: Print raw sector information




(*
)                            9              #

 1.      Connect a USB cable to the PC and
         the USB connector on the Demo
         Board.
 2.      The OS should recognize the new
         hardware, and display it as a new USB
         Mass Storage Device on the system.




(,
)                               9                #

 3.      Open Windows Explorer (Right-click
         Start, and then click Explore).
 4.      Find the new drive in the list of folders.
 5.      View the contents of the drive and
         open the saved text files in a text
         editor.




(&
)                             9                       #

 7.      Files can also be copied to/from the drive, deleted, and modified from within the OS.
 8.      To disconnect the drive, click on the icon in the system tray, and select “Safely Remove
         USB Mass Storage Device”




(%
)
                                              File System / Sector Server
                                              (4.5kB)
                                              7%

                                              Example Application
                                              (4.0kB)
                                              6%
                                              USB / MSD / SCSI
                                              (3.8kB)
         Available Free Space    Used Space   6%
                      (45.1kB)   (17.9 kB)
                                              Compiler Library Calls / Misc
                          72%    28%
                                              (3.1kB)
                                              5%

                                              SD / MMC Media Access
                                              (1.8kB)
                                              3%
                                              CompactFlash Media Access
                                              (0.7kB)
                                              1%




*'
)            00                   #

 ♦ Mass Storage Device (MSD) Class Implementation
     Uses native OS drivers – no special driver is necessary
        Works on all Windows, MAC, and Linux platforms that support MSD
     Device appears to PC as a removable storage device
 ♦ SCSI Command Set
     Specified by the USB Mass Storage Device Class specification




*$
)            00

    ♦ Sector Server handles file system management
         FAT16 File Structure
         Supports up to 4 GB storage
    ♦ SD / MMC Interface
         Communicates via hardware SPI bus
         Accessed as 512-byte sectors to reduce RAM requirements and
         increase speed
    ♦ Compact Flash Interface Also Supported




*
2                     2            2

    ♦ Uses ANSI ‘C’ “Stream I/O” interface to access media file
      system
    ♦ File Access Functions:
         fopen(): Open a file for access
         fclose(): Close an open file
         fwrite(): Write information into an open file
         fread(): Read information from an open file
         feof(): Look for End-of-File Indicator
    ♦ File System Maintenance Functions:
         findfirst(): Returns first available file name
         findnext(): Returns next available file name
         fdelete(): Delete a file



*
5/               =1    6/ >

    ♦ The following code excerpt creates a file called “hello.txt”
      and stores it to the MMC/SD card
            FILE *fp;
            unsigned char error;
            unsigned char mystr[] = “Hello world!”;

            error = fopen (&fp, “hello.txt”, “w”);
            fwrite (fp, mystr, sizeof (mystr));
            fclose (&fp);


    ♦ It is very easy to add MSD functionality to your own system!


     (Next module)

*
5   +?+
♦ OSI Model

 ♦ TCP/IP Protocol Family

 ♦ Embedded Ethernet
   Development Kit

 ♦ AB4 Ethernet Development Board

 ♦ TCP/IP Configuration Wizard

 ♦ Demo

**
♦ Open Systems Interconnection Model

 ♦ Layered abstract description for communications and
   computer network protocol design.

 ♦ Divided into layers
      Each layer can use functions only from the layer below.
      Each layer can export functionality only to the layer above.
      Layers can be implemented in hardware, software, or a mixture of
      both.
      Generally, the lower levels are implemented in hardware and the
      upper layers in software.



*,
Application
       Data
                        Network Process to Application


                               Presentation
       Data
                             Data Representation


                                  Session
       Data
                           Interhost Communication


                                 Transport
     Segments
                    End-to-End Connections and Reliablity


                                  Network
     Packets
                Path Determination and IP (Logical Addressing )


                                 Data Link
     Frames
                      MAC and LLC (Physical Addresing )


                                 Physical
       Bits
                   Media, Signal, and Binary Transmission




*&
Application   HTTP     FTP    SMTP        TFTP   BOOTP DHCP



     Transport              TCP                       UDP


      Network                             IP


     Data Link                Hardware Device Drivers



      Physical            Hardware (Ethernet, Modem, etc.)




*%
+?+ +

 ♦ TCP/IP is a set of standard communication protocols which
   fit within the OSI model.

 ♦ Benefits of TCP/IP:
      Interoperability – The protocols operate at a layer of abstraction above the hardware
      layer.
      Ubiquity – Nearly all network devices implement standard TCP/IP protocols.
      Ease of Development – Code implementations are already written and can be
      reused.
      Reliability – Protocols have been proven by over 20 years of widespread use.


 ♦ Silicon Laboratories provides a library providing TCP/IP
   functionality in the Embedded Ethernet Development Kit.


,'
+?+ +

                                                           Network
 ♦ Network Layer                         Path Determination and IP (Logical Addressing )


     IP (Internet Protocol) – Manages logical addressing of network
     devices (i.e. IP addressing).

     ARP (Address Resolution Protocol) – Converts an IP address
     (logical address) to a MAC address (physical address).

     PING – Program which sends a packet to a network device and
     waits for a response. Returns the round trip time of the request.




,$
+?+ +

                                                               Transport
    ♦ Transport Layer                              End-to-End Connections and Reliablity


         UDP (User Datagram Protocol)
           Advantages
              • Fast
              • Requires less protocol overhead
              • Implementations consume less code space


           Disadvantages
              • Connectionless
              • Unreliable
              • Best Effort (Data may arrive of order and packets may be lost!)




,
+?+ +

                                                                  Transport
    ♦ Transport Layer (cont’d)                        End-to-End Connections and Reliablity


         TCP (Transmission Control Protocol)
            Advantages
              • Connection-oriented
              • Reliable
              • Data Stream (data arrives in order)


            Disadvantages
              • Slower
              • Requires more protocol overhead
              • Implementations consume more code space




,
+?+ +

                                                         Application
    ♦ Application Protocols                       Network Process to Application


         HTTP (HyperText Transfer Protocol) – Transfers HTML files
         across the World Wide Web.

         FTP (File Transfer Protocol) – Exchanges files over a network.

         SMTP (Simple Mail Transfer Protocol) – Sends email.

         TFTP (Trivial File Transfer Protocol) – A simpler but unreliable
         version of FTP.




,
+?+ +

                                                    Application
 ♦ Application Protocols (cont’d)            Network Process to Application


      BOOTP (Boot Protocol) – Assigns a static IP address to a network
      device.

      DHCP (Dynamic Host Configuration Protocol) – Assigns a
      dynamic IP address to a network device.




,(
+?+ +                 )

     Application   HTTP     FTP     SMTP        TFTP   BOOTP DHCP



     Transport              TCP                        UDP


      Network                              IP


     Data Link                 Hardware Device Drivers



      Physical            Hardware (Ethernet, Modem, etc.)




,*
+       '/ 5
 ♦ Industry’s smallest, low power
   Ethernet controller
      5 x 5 mm package reduces board
      space up to 95% compared to
      competing devices


 ♦ Highest performance 10Base-
   T Ethernet controller
      10/100Base-T compatible
      Implements a high-performance
      parallel external memory interface


 ♦ Embedded Ethernet made
   easy with the CP220x
      CP220x Development Kit simplifies
      design process


,,
#           5.                       5                   <+              '/




     ♦   Parallel host interface with up to a 30 Mbps transfer rate
              Reduces the amount of time the MCU spends communicating with the Ethernet controller
     ♦   8 kB of on-chip Flash memory factory pre-programmed with a unique 48-bit MAC address
              Eliminates the necessary serialization step from the product manufacturing process
              Can be used for non-volatile storage requirements and offload host MCU
     ♦   Low power consumption (70 mA typ) suitable for high-density applications where self-
         heating is a key concern
     ♦   Supports auto-negotiation (for maximum bandwidth utilization)
     ♦   Extended temperature range (-40 to +85 °C operation)
,&
+     '/ @        2
 ♦ Auto-Negotiation Support




       100 Base-T Full Duplex
       100 Base-T Half Duplex
       10 Base-T Full Duplex               10 Base-T Full Duplex
       10 Base-T Half Duplex               10 Base-T Half Duplex


     ♦ Low Operating Current: 75mA @ 3.3V, 150mA peak (typ)
          Average current depends on packet size and data rate.
          Typical average current ranges from 60 to 90 mA.
     ♦ Extended Temperature Range: -40 to +85°C

,%
5             )                                 @
 ♦ Provides all of the hardware and software
   necessary to develop an embedded
   Ethernet solution using the CP220x
 ♦ The CMX Micronet TCP/IP protocol stack is
   included in an easy-to-use library format.
 ♦ A TCP/IP configuration wizard is provided
   to generate a highly customized library
   optimized for user-selected protocols
 ♦ Kit Contents
         CP2200-based Ethernet Development Board
         C8051F120 Target Board
                                                               Part #: EthernetDK
         Universal Power Supply
         USB Debug Adapter
         1 m Cat5e Cable, USB Cable, Serial Cable            The Ethernet Development Kit is
         CD containing:                                           available for $119 at
                                                                www.silabs.com/ethernet.
             Silicon Labs IDE
             TCP/IP configuration wizard
             Evaluation version of the Keil C51 Tool Chain
             Source code examples and register definition
             files
             Documentation
&'
5             )

 ♦ CP2200 and RJ-45
   connector provide
   Ethernet connectivity.
 ♦ 96-pin connector
   interfaces to ‘F120,
   ‘F020, and ‘F340
   Target Boards.
 ♦ Prototyping area,
   switches, and LED’s
   facilitate development.



&$
+?+   #   ;:
              ♦ Included in the Ethernet Development Kit
                    Generates a highly customized library
                    optimized for user-selected protocols
                    Generates both the framework code and
                    a project file that can be managed within
                    the Silicon Labs IDE


              ♦ Host processor Flash memory
                requirements for Ethernet
                implementations range from 16.2 kB to
                49.5 kB
                    These are minimum memory requirement
                    and do not include additional user code
                    16.2 kB implementation includes ARP,
                    PING, UDP, & IP protocols
                    49.5 kB implementation includes DHCP,
                    HTTP, FTP, TFTP, ARP, PING, TCP,
                    UDP, & IP protocols



&
5.   5   )
+   '$ 5                @

    ♦   CP2201EB Evaluation Board
    ♦   Universal 9V Power Supply
    ♦   Standard Ethernet Cable (Blue)
    ♦   Crossover Ethernet Cable (Yellow)
    ♦   Evaluation Kit CD
    ♦   Quick Start Guide




&
+   '$ 5




 ♦ Demonstrates Small Size – Entire board is 1.25” x 1.50”.
 ♦ Uses the C8051F340 and the CP2201.
 ♦ Demonstrates Embedded Ethernet Connectivity.



&(
+   '$ 5               @   )

 ♦   Automatic Network Configuration using Netfinder
 ♦   Remote Monitoring and Control from a Web Browser
 ♦   Remote Monitoring and Control from HyperTerminal
 ♦   Sending E-mail from the Embedded System
 ♦   Updating Firmware over the Network




&*
♦ This demonstration will implement a simple “Hello World”
   web server using the AB4 Ethernet Development Board
   and C8051F340 Target Board.
 ♦ The steps of the demonstration are:
     1. Hardware Setup
     2. Network Configuration
     3. Software Generation




&,
1

 1. Connect the C8051F120 Target Board to the AB4 using their 96-pin
    connectors.
 2. Connect an Ethernet cable to the RJ-45 connector on the AB4 and to a
    network jack (hub, switch, NIC, router, etc.).
 3. Connect the 10-pin ribbon cable of the USB Debug Adapter to J4 on
    the ‘F120 Target Board.
 4. Connect the USB cable to the USB Debug Adapter and to the PC.
 5. Plug the power supply into P1 on the ‘F120 Target Board.



                                                        USB
         Ethernet
                                   JTAG




&&
3             !         #

 ♦ To determine a valid IP address for the Embedded Web Server:
         1.   Launch the TCP/IP Configuration Wizard.
         2.   Select the IP Addresses field under System Settings.
         3.   Go to Start    Run then type cmd /K ipconfig.
         4.   Enter IP Address + 1 and Subnet Mask into the Source IP Address and
              Subnet Mask IP Address fields.




     Note: 169.254.236.193 + 1 = 169.254.236.194

&%
#                          +

 ♦ My Network Places
      Right Click “Properties”
 ♦ Network and Dialup Connections
      Right Click “Local Area Connection”
      Select “Properties”
 ♦ Select Internet Protocol (TCP/IP)
      Click Properties
      Use the Following IP Address radio button
      Assign 10.10.10.80
      Click OK (click OK on warning to use default subnet mask)
 ♦ Click OK…..PC IP address is now 10.10.10.80



%'
#           A


 1) Select the following checkboxes:
    a) CP220x
    b) C8051F34x
    c) Ethernet
    d) TCP
    e) HTTP
    f) Click IP Addresses
    g) Assign source IP address as
       10.10.10.168




%$
#            A

    2) Generate Project Files:
        a) Select “File ->Generate Project.”
        b) Browse to destination folder.
        c) Press OK.


    3) Open the output project
       (TCPIP_Project.wsp) in the Silicon
       Laboratories IDE.

    4) Build the project and download to the
       C8051F340 target board.




%
#           A

    5) Press “Go.” After a few
       seconds, the link LED on the
       connector will turn on.

    6) Launch a web browser and
       enter the IP address
       configured during Network
       Configuration.

    7) The web browser will display
       the “Hello World” HTML
       document.




%
555 &' 6
       $(6 7 8                         B
 Comprehensive Solutions with ZigBee
8              "               555 &' 6
                                                  $(6


                      (( # # '
                         "
        /

                             )                 A                                     B
                           " #$            ♦       Low power operation → longer battery life
     *#
      +,                                   ♦
                %          &# '" $( # '            Flexible & dynamic network topologies
       # '"                                             Star, Cluster-Tree & Mesh
                                           ♦       Security & reliability
                                  !


                                                             B
                                               A
     )---
     .
                                               A                                      B
                                           ♦       Limited to point-to-point or point-to-
                                                   multipoint (star) configurations
                    ## '
                     "
                                           ♦       Longer distance → more power →
                                      ((
                    *#
                     +,    "                       shorter battery life


%(
"               8

                          802.15.4 or ZigBee




        Star or
     Point-to-Point

                                    ZigBee Only

                                                         Cluster-Tree



                                               Coordinator (FFD)
          Mesh                                 Routing Node (FFD)
                                               End Node (RFD)
                                               Range

%*
&' 6
        $(6 ?
            8                  2     4                   7)          "

                  BAND      COVERAGE        DATA RATE      # OF CHANNEL(S)

       2.4 GHz     ISM       Worldwide        250 kbps              16


      868 MHz      ISM         Europe          20 kbps              1


      915 MHz      ISM        Americas         40 kbps              10

*Current market offerings support either the 2.4 GHz or the 868/915 MHz ISM bands.




%,
"                #




                                      Development Kits                     Modules
     MCUs
                                      ♦                                    ♦
                                          2.4 GHz ISM band operation
     ♦                                                                         Silicon Labs/Helicomm
         Low current consumption
                                                                               co-developed 8051-
                                      ♦   Helicomm ZigBee protocol
     ♦   High throughput 8051
                                                                               based modules
                                          stack and tools
         CPU (up to 100 MIPS)
                                                                           ♦   Full drop-in wireless
                                      ♦   IEEE 802.15.4 PHY/MAC
     ♦   Up to 128 kB Flash/8 kB
                                                                               solution to ensure the
                                          evaluation
         RAM
                                                                               fastest time-to-market.
                                      ♦   USB interface
     ♦   Highest performance
                                                                           ♦   Chip antenna or
                                      ♦   100 MIPs 8051 core
         integrated analog:     up
                                                                               connector options
         to 24-bit ADCs;      up to   ♦   128 kB Flash/8 kB RAM
                                                                               available
         1 Msps ADCs                  ♦   JTAG connection for in-circuit
     ♦   Small footprint (3x3 mm)         debug
                                      ♦   Power supply or 9 V battery
                                          operation

%&
5          0     0            A                )
ZigBee Demonstration GUI                               802.15.4 Demonstration GUI
                                                                                     ♦
 ♦                                                                                         Graphical representation of
     Graphical representation of
                                                                                           the association and
     various ZigBee topologies
                                                                                           disassociation of a star
 ♦   13 different topology examples
                                                                                           network
     included
                                                                                     ♦     GUI can support additional
 ♦   Interactive GUI supports 3
                                                                                           boards to create a larger
     demo applications which can
                                                                                           star network
     monitor data from any
                                                                                     ♦     Interactive GUI allows the
     networked devices
                                                                                           user to:
          Temperature
                                                                                                 Monitor the temperature
          Received Signal Strength
                                                                                                 and thumbwheel
          Indicator (RSSI)
                                                                                                 operation of each
          Thumbwheel (analog)
                                                                                                 development board
                                                                                                 Control the update rate
                                                                                                 and LED state of each
                                                                                                 development board

                                      Silicon Laboratories IDE
                                               ♦   Windows-based IDE
                                                        Full-featured editor
                                                        Full macro-assembler with evaluation C-compiler
                                                        Full debugger support
                                                        Support for 3rd party tools
                                               ♦   Configuration Wizard
                                                        Automatically generate configuration code
                                                        Full peripheral support for C8051 families
                                                        Generates both C and assembly



%%
#      8       7 &' 6
                                                       $(6

 ♦ Hardware platforms
     Microcontrollers
     Development kits/reference designs
     Drop-in modules
 ♦ Firmware & Software
     IEEE 802.15.4 MAC
     Full ZigBee protocol stack
     802.15.4 demonstration GUI
     ZigBee demonstration GUI
 ♦ Development Tools
     Silicon Labs Integrated Development Environment




$'
'
6   .6

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USB Training - Silicon Labs -

  • 1.
  • 2. ♦ Mixed-signal semiconductor company Headquartered in Austin, TX Fabless manufacturing model ♦ Proven, established partner $425M annual revenue More than 600 employees ♦ World-class mixed-signal talent Engineering focused Broad IP portfolio
  • 3. ♦ Workhorse technology for semiconductor industry Low cost, abundant, portable Consistently two generations ahead of other technologies ♦ New architectures for high-performance mixed-signal ICs Breakthrough integration possibilities Opportunity to leverage mixed-signal design expertise
  • 4. !" # First Globally First Single Chip First CMOS First CMOS First CMOS First Single-Chip First Globally First Single Chip First CMOS First CMOS First CMOS First Single-Chip Compliant GSM RF GSM/GPRS 8051 MCU with Digital GSM/GPRS Compliant GSM RF GSM/GPRS 8051 MCU with Digital GSM/GPRS Silicon DAA Synthesizer Transceiver 24-bit ADC Phone Silicon DAA Synthesizer FM Tuner Transceiver 24-bit ADC Phone FM Tuner $%%& ''( First Integrated First Embedded First CMOS First Single-Chip First Fully Digital First Integrated First Embedded First CMOS First Single-Chip First Fully Digital Modem with GSM Power CMOS GSM/GPRS Power CMOS Modem with GSM Power CMOS GSM/GPRS Power CMOS Silicon DAA Amplifier Transceiver Controller SLIC Silicon DAA Amplifier Transceiver Controller SLIC
  • 5. )## Customer Requirements Small footprint Low power consumption Few external components Customer Benefits High level of integration Easy implementation Rapid time-to-market (
  • 6. + + # Precision Mixed-Signal SiRX™ Satellite Receivers Small Form Factor FM Radio Tuners CAN Satellite Radio Tuners USB USB to UART Bridge AeroFONE™ Single-Chip Phone Aero® Transceiver Family Frequency Control Solutions GSM/GPRS Power Amplifier Precision Clock ICs RF Synthesizers ISOmodem® Digital Power Controllers ProSLIC® DSL AFE Silicon DAA SiPHY® High-Speed ICs *
  • 7. + Precision Mixed-Signal Small Form Factor CAN USB Applications: USB to UART Bridge Industrial Consumer Automotive Medical Power Management ,
  • 8. -. / 0 ♦ Smallest 3x3 mm, 4x4 mm, 5x5 mm packages Very flexible I/O system to maximize pin functions Highest integration in class $'' ♦ Fastest %' &' ,' Fastest 8-Bit CPU available–100 MHz Peak MIPS *' 70% of instructions 1 or 2 cycles (' ' On-chip debugging hardware ' 8051 compatible ' $' ' A B C Silicon Silicon Labs Labs ♦ Best analog ADCs DACs Precision oscillator Comparators On-chip temperature sensor &
  • 9. 0 00 Typical 8-bit MCU Multi-Chip Discrete Solution Silicon Labs Solution XTA L u CO NTRO LLER CMP C C PGA R R R R R C R R EF ADC 24 DAC 12 C C 19.4 x 16.5 mm = 320 mm² 5 x 5 mm = 25 mm² Advance analog integration enables the following: Complete system-on-a-chip Simpler designs and shorter design cycle Faster time to market Higher reliability and less quality issues Better cost structure %
  • 10. 1 0+ # 2 Flash Memory: 8051 CPU: On-chip charge pump Up to 100 MHz Small segments 70% Instr. in 1 or 2 cycles Security Pipelined object code Emulates byte EEPROM compatibility Timers: Serial Communications: Capture & Compare UART Accumulate SPI PWM SMBus RTC USB 2.0 CAN 2.0B Analog-to-Digital: I/O: Up to 16-Bit SAR Dynamically reconfigurable Up to 24-Bit Sigma-Delta Up to 1 Msps Analog: Dual ADC option Temperature sensor Up to 32-Channels Programmable comparators Selectable VREF Precision Oscillator Digital-to-Analog: Cross Bar: Up to 12-Bit Custom select I/O Debug: On-chip JTAG-based $'
  • 11. 3 # "4 ♦ Many embedded systems are distributed networks and must be connected in order to share information ♦ Different embedded networks require different modes of connectivity High-speed Wireless RF IR TCP/IP based Fault tolerant Cost effective ♦ Silicon Laboratories has embedded connectivity solutions for each one of these areas $$
  • 12. -. ♦ USB Connectivity Wide range of MCU and fixed function solutions with software drivers and reference designs ♦ RF wireless networking 802.15.4 and ZigBee solutions ♦ Ethernet and TCP/IP networks Hardware reference designs Full CMX TCP/IP protocol stack ♦ Fault-tolerant distributed networking CAN enabled MCU products with 32 message buffers ♦ Cost sensitive networks RS-485 multi-drop network RS- multi- UART, IIC, and SPI enabled MCUs CP2201 Evaluation Kit Ethernet Development Kit $
  • 13. / 0 2/ 02 ♦ CP210x family of devices P0.0 P Port 0 P0.1 0 5.0V P0.2/XTAL1 Latch Voltage Enable REGIN IN Fixed function USB to UART P0.3/XTAL2 Regulator P0.4 D UART0 OUT P0.5 r P0.6/CNVSTR bridges provide the easiest v Analog/Digital P0.7/VREF VDD UART1 Power SFR Bus P1.0 method for upgrading legacy P GND Timer P1.1 8 1 0,1,2,3 / P1.2 RTC P1.3 64 kB RS-232 systems with USB 0 C2D C P1.4 D Debug HW FLASH P1.5/ALE R PCA/ r 5 P1.6/RD O WDT v P1.7/WR 256 Byte ♦ Mixed-Signal USB MCUs Reset S 1 RST/C2CK SRAM S SMBus P2.0/A0 P B P2.1/A1 Brown- 2 POR 4 kB A P2.2/A2 SPI Out C High-speed 8051 core operating P2.3/A3 XRAM R XTAL1 XTAL2 P2.4/A4 D C o P2.5/A5 P1 Latch r P2.6/A6 T External up to 48 MIPS v r P2.7/A7 L Oscillator External Data Circuit e P3.0/A8/C2D Memory Bus P2 Latch P System P3.1/A9 Up to 64 kB on-board Flash and A Clock 3 12 MHz P3.2/A10 d Internal x4 ÷2 P3.3/A11 d P3.4/A12 D Oscillator P3 Latch 5376 bytes of RAM P3.5/A13 r r P3.6/A14 v P3.7/A15 ÷2 17 ch. 10-bit, 200 ksps ADC P4.0/D0 P USB Clock D P4.1/D1 Clock 4 ÷ 1,2,3,4 P4 Latch P4.2/D2 Recovery a P4.3/D3 t External memory interface D P4.4/D4 a P4.5/D5 USB USB D+ r P4.6/D6 Transceiver Controller v D- P4.7/D7 VREF In-system non-intrusive debug CP0 + - VBUS 1 kB USB VREF CP1 SRAM engine eliminates the need for + - VDD Temp emulators 10-bit A AIN0-AIN16 200 ksps M ADC Integrated on-chip regulator, VDD U X VREF oscillator, and USB transceiver C8051F340-GQ Effective operating range from 2.7 to 5.25 V $
  • 14. 5 ♦ CP220x single-chip Ethernet controller Industry’s smallest, highest performance 10Base-T Ethernet controller 10/100Base-T compatible ♦ Ethernet evaluation kit The CP2201EK demonstrates the simplicity of adding Ethernet connectivity to a product Demo applications included ♦ Ethernet development kit Provides everything needed to develop an embedded Ethernet solution with the CP220x CMX TCP/IP stack included free of cost or royalty fees $
  • 15. &' 6 $(6 7 8 ♦ Microcontrollers Low current consumption High throughput 8051 CPU (up to 100 MIPS) ♦ Development Kits 2.4 GHz ISM band operation IEEE 802.15.4 PHY/MAC evaluation Helicomm ZigBee protocol stack and tools ♦ Modules Silicon Labs/Helicomm co-developed 8051-based modules Full drop-in wireless solution to ensure fastest time-to-market $(
  • 16. # ) ♦ Detailed inspection of USB solutions Demonstration of Mass Storage Reference Design ♦ Review Ethernet development platform Demonstration of Ethernet evaluation kit ♦ Describe 802.15.4 and ZigBee solutions ♦ Let’s get started… $*
  • 17.
  • 18. ♦ Benefits of USB Plug & Play Easy to Use Low Power Consumption Fast Low Cost Reliable RS232 Ports Disappearing $&
  • 19. # # ♦ Ease of Use One interface for many devices Hot pluggable Automatic configuration No power supply required Devices can pull up to 500mA from the bus ♦ Reliability Lossless data transfers $%
  • 20. # # ♦ Speed Three transfer speeds Low Speed – 1.5 Mbps (USB 1.1 and 2.0) Full Speed – 12 Mbps (USB 1.1 and 2.0) High Speed – 480 Mbps (USB 2.0 only) Silicon Labs devices support Low and Full Speed. (USB 2.0 Compliant) ♦ Low Power Consumption Suspend mode Devices consume 500 A or less ♦ Availability Microsoft and Intel’s PC 2001 System Design Guide requires that all new PC’s have two user-accessible USB ports. '
  • 21. )# ♦ USB – Universal Serial Bus ♦ Host – System which initiates all transfers over the bus ♦ Device – Peripheral which communicates with and receives information from the host ♦ Hub – Provides connecting points and power ♦ Pipe – Logical abstraction which creates an association between an endpoint on a device and the host software ♦ Endpoint – Memory buffer on a device which serves as a sink or source of data IN Endpoint – Endpoint from which host reads data OUT Endpoint – Endpoint to which host writes data Endpoints on Silicon Labs MCUs are implemented as FIFO’s in on-chip XRAM $
  • 22.
  • 23. )# Transfer – The process of making and carrying out a communication request Transaction – The delivery of service to an endpoint Packet – Block of information Frame – A 1 ms time base established on low- and full-speed buses ♦ Transfers are divided into transactions. ♦ Transactions are made up of packets. ♦ The host controls transfers by allocating transactions to a frame. ♦ Transfers may span multiple frames.
  • 24. 2 )
  • 25. )# ♦ Enumeration Enumeration is the activity that identifies and assigns unique addresses to devices attached to a bus Makes USB devices hot-pluggable The host is always checking the bus for new devices The host cannot communicate with a USB device until that device has been properly enumerated Invisible to user (
  • 26. + 02 # 1 ♦ Enumerate Devices ♦ Transfer Data with Peripherals ♦ Provide Power A full-power USB Host can provide up to 500 mA for each peripheral Some low-power USB hosts support only low-power devices which are limited to 100 mA USB peripherals can be self-powered as well ♦ Manage the USB Bus *
  • 27. + 02 # + ♦ Transfer Data with the USB Host ♦ Manage power The supply current that can be drawn from the bus depends on the state of the bus A bus-powered device in normal mode may draw up to 500 mA When the bus is suspended, the device must draw less than 500 uA If the device supports remote wakeup, it may draw up to 2.5 mA when in suspend mode ♦ Respond to Standard Requests from the Host ,
  • 28. + 95 7+ ♦ All data is transferred to or from a device endpoint ♦ An Endpoint is memory on the USB peripheral that stores the data it receives from the host or it stores the data it intends to send ♦ Endpoints transfer data in one direction and labeled either IN or OUT, except for control endpoints which are bidirectional ♦ A Pipe is a logical connection between an endpoint on the device and the host controller’s software &
  • 29. # ♦ Four types of transfers: Control Transfers Bulk Transfers Interrupt Transfers Isochronous Transfers %
  • 30. # ♦ Control Transfers Two uses: Carry mandatory requests which enable the host to recognize and enumerate devices Carry user-defined requests for any other purpose Mandatory: Every device must support control transfers Top Speeds: Full Speed – 832 Kbytes/sec '
  • 31. # ♦ Bulk Transfers Fastest transfer type No guaranteed data rate or latency Supported only by High and Full Speed devices Top Speeds: Full Speed – 1.2 Mbytes/sec Common Applications: Printers Scanners Disk Drives (USB thumb drive) $
  • 32. # ♦ Interrupt Transfers Guaranteed latency Top Speeds: Full Speed – 64 Kbytes/sec Common Applications: Keyboards Mice Joysticks
  • 33. # ♦ Isochronous Transfers Streaming real-time transfers Guaranteed delivery rate and latency No error correction – Not lossless! Supported only by High and Full Speed devices Top Speeds: Full Speed - 1.0 Mbytes/sec Common Applications: Music Video
  • 34. ) ♦ USB defines a set of standard device classes to enable interoperability across multiple platforms HID – Human Interface Device Keyboards, mice, controls, thermometers, voltmeters Mass Storage Removable and non-removable storage: floppy, hard, optical, and Flash drives Audio Speaker, microphone, audio processor Communications Device Class Analog and digital modems, analog and digital telephones, ADSL and cable modems, ethernet adapters and hubs IrDA, Power, Printer, Smartcard, Imaging, etc.
  • 35. ) # ♦ The Host machine distinguishes between devices by looking at their unique identifiers VID – Vendor ID Assigned by the USB Implementer’s Forum PID – Product ID Assigned by the vendor Serial Number Assigned by the developer/manufacturer Unique for every USB device ♦ Silicon Labs Allotment System Silicon Labs has a unique VID (0x10C4) All in-house items are assigned a PID under our VID Customers may receive PID’s under our VID for bridge and MCU products Contact mcutools@silabs.com to receive a PID (
  • 36. + " : 2 Ba De vic nd rs m eC Application requirements sto ive wi las u dth Dr C s Requirements Silicon Labs h/w, s/w, drivers, and examples Certification Production *
  • 37. . Condition USB Option Benefits Potential Downside Legacy RS-232 upgrade Use fixed-function Shortest time to market - Requires host driver USB/UART bridge - No change to host installation device (CP210x) + VCP application or firmware driver Don’t have time to Use USBXpress® 2nd Shortest time to Requires host driver master USB – need high market -- Easy to use installation bandwidth high-speed data pipe (up to 1 M bytes/sec) App fits MSD class Use MSD reference No host driver install – Requires ~11 kB code definition design intuitive “drag-and-drop” space interface App fits HID class Use HID application note No host driver install Limited to 64 K bytes/sec definition and example code max data rate App fits Audio class Use USB Audio No host driver install definition application note and example code Does not fit existing Use existing Control, Optimized for application Longest development class Interrupt, and Bulk time -- requires custom firmware and driver firmware and driver examples as starting development point ,
  • 38. # ♦ USB Implementer’s Forum (USB-IF) www.usb.org Assigns Vendor IDs (VIDs) Oversees Compliance Testing USB products must pass compliance testing in order to display the USB logo and to be listed on the USB-IF Integrators List Contact mcutools@silabs.com for help with compliance testing &
  • 39. + - TQFP48 (9X9) QFN 28 (5X5) LQFP32 (9X9) EMIF, 2 UARTs ♦ Pin-for-pin compatibility for MCU MIPS effortless migration 64K, 5376 48 F342-GQ F340-GQ bytes RAM Mixed- 16 to 64kB 25 F346-GQ F344-GQ Signal USB 25 to 48 MIPS MCU MIPS Price sensitive to high 32K, 3328 48 F343-GQ F341-GQ bytes RAM performance Mixed- 25 F347-GQ F345-GQ Signal USB ♦ Highly integrated solutions MCU MIPS in small form factors 16K, 1536 bytes RAM 25 F321-GM F320-GQ ♦ Larger packages include Mixed- Signal USB external memory interface MCU MIPS for additional expansion F327-GM 16K, 1536 bytes RAM 25 USB F326-GM USB-Serial Host Interface I/O CP2102 CP2103 Internal Yes OSC, VREG, No CP2101 EEPROM Product Offerings and Packages %
  • 40. + # / 0 ♦ High-speed 8051 core operating P0.0 P Port 0 P0.1 up to 48 MIPS 0 5.0V P0.2/XTAL 1 Latch Voltage Enable REGIN IN P0.3/XTAL 2 Regulator P0.4 D UART0 OUT P0.5 r ♦ 64 kB on-board Flash and 5376 P0.6/CNVSTR v Analog/Digital P0.7/VREF VDD UART1 Power SFR Bus P1.0 bytes of RAM P GND Timer P1.1 8 1 0,1,2,3 / P1.2 RTC P1.3 64 kB 0 C2D C P1.4 D Debug HW ♦ 17 ch. 10-bit, 200 ksps ADC FLASH P1.5/ALE R PCA/ r 5 P1.6/RD O WDT v P1.7/WR 256 Byte S Reset 1 RST/C2CK SRAM S SMBus ♦ External memory interface P2.0/A0 P B P2.1/A1 Brown- 2 POR 4 kB A P2.2/A2 SPI Out C P2.3/A3 XRAM R XTAL1 XTAL2 P2.4/A4 D ♦ In-system non-intrusive debug C o P2.5/A5 P1 Latch r P2.6/A6 T External v r P2.7/A7 L Oscillator External Data engine eliminates the need for Circuit e P3.0/A8/C2D Memory Bus P2 Latch P System P3.1/A9 A Clock 3 12 MHz P3.2/A10 d Internal x4 ÷2 P3.3/A11 emulators d P3.4/A12 D Oscillator P3 Latch P3.5/A13 r r P3.6/A14 v P3.7/A15 ♦ Integrated on-chip regulator ÷2 P4.0/D0 P USB Clock D P4.1/D1 Clock 4 ÷ 1,2,3,4 P4 Latch P4.2/D2 Recovery a P4.3/D3 ♦ Effective operating range from t D P4.4/D4 a P4.5/D5 USB USB D+ r P4.6/D6 Transceiver Controller v D- P4.7/D7 2.7 to 5.25 V VREF CP0 + - VBUS 1 kB USB VREF CP1 SRAM + - VDD Temp 10-bit A AIN0-AIN16 200 ksps M ADC VDD U X VREF C8051F340-GQ '
  • 41. ) ♦ Evaluation kits for USB/UART Bridge Devices CP2102EK, CP2103EK VCP Driver CD included CP2103 Evaluation Board ♦ Full development kits for Flash- based USB MCUs C8051F320DK C8051F326DK C8051F340DK Integrated IDE, assembler, compiler, linker, debugger On-chip debug hardware (breakpoints, watchpoints, USB MCU Development Kit single-step) $
  • 42. # ♦ Silicon Labs USB support software is broad-based, from easiest to use to greatest flexibility and highest performance Support Software Drivers No Firmware VCP Required Firmware Boot Loader Library Example USBXpress® File Transfer Windows DLL Example Drivers and Firmware Software Bulk Interrupt HID Audio / Examples MSD HID Boot Loader Isochronous 3rd Party Tools
  • 43. Products Support Hardware Support Software Drivers No Firmware VCP C8051F326 F340-DK Required C8051F327 15 Firmware Boot Loader F326-DK Library Example USBXpress® + + = File Transfer Windows DLL F320-DK Example C8051F340 Drivers and Firmware C8051F341 Software Bulk Interrupt CP2101 CP2103-EK C8051F342 HID Audio / Examples CP2102 C8051F343 MSD HID CP2103 Boot Loader Isochronous C8051F344 C8051F345 CP2102-EK 5 C8051F346 3rd Party Tools C8051F347 C8051F320 C8051F321 Innovative Applications Mass Storage Device (MSD) USB FM Tuner Human Interface Device (HID) Best Practices w / Data Logger (‘F321+Si4701) Best Practices Application Note Example
  • 44. 2 " "# ) Accelerating Embedded Radio Applications
  • 45. 1 ; !< ! C8051F321 Buffered 32.768 kHz (MCU) Low Cost Watch Crystal "! #$% " & (
  • 46. # 2 " !" # *
  • 47. 0 ♦ USB FM Radio Hardware ♦ User’s Guide: Explains easy set-up Guide to use radio ♦ AN264: Provides systems overview, AN264 interface specifications, USB device classes, firmware overview ♦ AN283: Provides in-depth tutorial on USB Audio class implementation ♦ AN264SW: “Unzips” to provide all AN264SW design documentation in native formats ♦ Radio Player: Launch executable Player file directly from your PC (no installation required) ,
  • 48. 2 # www.silabs.com/usbradio Complete technical information including: user’s guide, applications note, Gerber files, schematics, BOM, firmware source, and Radio Player source &
  • 49. -.
  • 50. 5/ ) - ♦ Fleet shipping container monitoring system Record temperature once per second (8 bits per sample) Record time and magnitude of disturbances (load shifts, dropped packages, etc.) using an accelerometer (16 bits per sample) Data logging for 3 months requires a lot of storage space: 3600 secs/hr * 24 hrs/day * 30 days/month * 3 months * 3 bytes per sample = over 21 million bytes ('
  • 51. 1 !) ($
  • 52. 2 !) (
  • 53. ) 9 # 1. Connect RS-232 cable between PC and Demo Board 2. Connect DC Power Adapter to Demo Board 3. Set up HyperTerminal to use COM port at 115200 Baud, 8 Data bits, No Parity, 1 Stop Bit, No flow control, and “Append line feeds to incoming line ends” (
  • 54. ) 9 # 4. Use the Command Interpreter shell presented by the device in HyperTerminal to log temperature data to a file: a) Type “calibrate 25” to calibrate the device to room temp (25 C) b) Type “templog temp.txt” to initiate a temperature data log c) Wait a few seconds to collect some temperature data d) Type “templog” to stop logging temperature data e) Type “type temp.txt” to view the stored file (
  • 55. ) 9 # 5. Use the Command Interpreter shell presented by the device in HyperTerminal to log button press/release events to a file: a) Type “log button.txt” to begin logging button events b) Press buttons “P2.0” and “P2.1” repeatedly c) Type “log” again to end button event logging d) Type “type button.txt” to view the stored file ((
  • 56. ) 9 # ♦ In addition to the commands used in the previous walk- through, the demo application implements the following commands: cls: Clear Screen del <filename>: Delete a file dir: List directory contents chkdsk: Print media size information s <#####>: Print raw sector information (*
  • 57. ) 9 # 1. Connect a USB cable to the PC and the USB connector on the Demo Board. 2. The OS should recognize the new hardware, and display it as a new USB Mass Storage Device on the system. (,
  • 58. ) 9 # 3. Open Windows Explorer (Right-click Start, and then click Explore). 4. Find the new drive in the list of folders. 5. View the contents of the drive and open the saved text files in a text editor. (&
  • 59. ) 9 # 7. Files can also be copied to/from the drive, deleted, and modified from within the OS. 8. To disconnect the drive, click on the icon in the system tray, and select “Safely Remove USB Mass Storage Device” (%
  • 60. ) File System / Sector Server (4.5kB) 7% Example Application (4.0kB) 6% USB / MSD / SCSI (3.8kB) Available Free Space Used Space 6% (45.1kB) (17.9 kB) Compiler Library Calls / Misc 72% 28% (3.1kB) 5% SD / MMC Media Access (1.8kB) 3% CompactFlash Media Access (0.7kB) 1% *'
  • 61. ) 00 # ♦ Mass Storage Device (MSD) Class Implementation Uses native OS drivers – no special driver is necessary Works on all Windows, MAC, and Linux platforms that support MSD Device appears to PC as a removable storage device ♦ SCSI Command Set Specified by the USB Mass Storage Device Class specification *$
  • 62. ) 00 ♦ Sector Server handles file system management FAT16 File Structure Supports up to 4 GB storage ♦ SD / MMC Interface Communicates via hardware SPI bus Accessed as 512-byte sectors to reduce RAM requirements and increase speed ♦ Compact Flash Interface Also Supported *
  • 63. 2 2 2 ♦ Uses ANSI ‘C’ “Stream I/O” interface to access media file system ♦ File Access Functions: fopen(): Open a file for access fclose(): Close an open file fwrite(): Write information into an open file fread(): Read information from an open file feof(): Look for End-of-File Indicator ♦ File System Maintenance Functions: findfirst(): Returns first available file name findnext(): Returns next available file name fdelete(): Delete a file *
  • 64. 5/ =1 6/ > ♦ The following code excerpt creates a file called “hello.txt” and stores it to the MMC/SD card FILE *fp; unsigned char error; unsigned char mystr[] = “Hello world!”; error = fopen (&fp, “hello.txt”, “w”); fwrite (fp, mystr, sizeof (mystr)); fclose (&fp); ♦ It is very easy to add MSD functionality to your own system! (Next module) *
  • 65. 5 +?+
  • 66. ♦ OSI Model ♦ TCP/IP Protocol Family ♦ Embedded Ethernet Development Kit ♦ AB4 Ethernet Development Board ♦ TCP/IP Configuration Wizard ♦ Demo **
  • 67. ♦ Open Systems Interconnection Model ♦ Layered abstract description for communications and computer network protocol design. ♦ Divided into layers Each layer can use functions only from the layer below. Each layer can export functionality only to the layer above. Layers can be implemented in hardware, software, or a mixture of both. Generally, the lower levels are implemented in hardware and the upper layers in software. *,
  • 68. Application Data Network Process to Application Presentation Data Data Representation Session Data Interhost Communication Transport Segments End-to-End Connections and Reliablity Network Packets Path Determination and IP (Logical Addressing ) Data Link Frames MAC and LLC (Physical Addresing ) Physical Bits Media, Signal, and Binary Transmission *&
  • 69. Application HTTP FTP SMTP TFTP BOOTP DHCP Transport TCP UDP Network IP Data Link Hardware Device Drivers Physical Hardware (Ethernet, Modem, etc.) *%
  • 70. +?+ + ♦ TCP/IP is a set of standard communication protocols which fit within the OSI model. ♦ Benefits of TCP/IP: Interoperability – The protocols operate at a layer of abstraction above the hardware layer. Ubiquity – Nearly all network devices implement standard TCP/IP protocols. Ease of Development – Code implementations are already written and can be reused. Reliability – Protocols have been proven by over 20 years of widespread use. ♦ Silicon Laboratories provides a library providing TCP/IP functionality in the Embedded Ethernet Development Kit. ,'
  • 71. +?+ + Network ♦ Network Layer Path Determination and IP (Logical Addressing ) IP (Internet Protocol) – Manages logical addressing of network devices (i.e. IP addressing). ARP (Address Resolution Protocol) – Converts an IP address (logical address) to a MAC address (physical address). PING – Program which sends a packet to a network device and waits for a response. Returns the round trip time of the request. ,$
  • 72. +?+ + Transport ♦ Transport Layer End-to-End Connections and Reliablity UDP (User Datagram Protocol) Advantages • Fast • Requires less protocol overhead • Implementations consume less code space Disadvantages • Connectionless • Unreliable • Best Effort (Data may arrive of order and packets may be lost!) ,
  • 73. +?+ + Transport ♦ Transport Layer (cont’d) End-to-End Connections and Reliablity TCP (Transmission Control Protocol) Advantages • Connection-oriented • Reliable • Data Stream (data arrives in order) Disadvantages • Slower • Requires more protocol overhead • Implementations consume more code space ,
  • 74. +?+ + Application ♦ Application Protocols Network Process to Application HTTP (HyperText Transfer Protocol) – Transfers HTML files across the World Wide Web. FTP (File Transfer Protocol) – Exchanges files over a network. SMTP (Simple Mail Transfer Protocol) – Sends email. TFTP (Trivial File Transfer Protocol) – A simpler but unreliable version of FTP. ,
  • 75. +?+ + Application ♦ Application Protocols (cont’d) Network Process to Application BOOTP (Boot Protocol) – Assigns a static IP address to a network device. DHCP (Dynamic Host Configuration Protocol) – Assigns a dynamic IP address to a network device. ,(
  • 76. +?+ + ) Application HTTP FTP SMTP TFTP BOOTP DHCP Transport TCP UDP Network IP Data Link Hardware Device Drivers Physical Hardware (Ethernet, Modem, etc.) ,*
  • 77. + '/ 5 ♦ Industry’s smallest, low power Ethernet controller 5 x 5 mm package reduces board space up to 95% compared to competing devices ♦ Highest performance 10Base- T Ethernet controller 10/100Base-T compatible Implements a high-performance parallel external memory interface ♦ Embedded Ethernet made easy with the CP220x CP220x Development Kit simplifies design process ,,
  • 78. # 5. 5 <+ '/ ♦ Parallel host interface with up to a 30 Mbps transfer rate Reduces the amount of time the MCU spends communicating with the Ethernet controller ♦ 8 kB of on-chip Flash memory factory pre-programmed with a unique 48-bit MAC address Eliminates the necessary serialization step from the product manufacturing process Can be used for non-volatile storage requirements and offload host MCU ♦ Low power consumption (70 mA typ) suitable for high-density applications where self- heating is a key concern ♦ Supports auto-negotiation (for maximum bandwidth utilization) ♦ Extended temperature range (-40 to +85 °C operation) ,&
  • 79. + '/ @ 2 ♦ Auto-Negotiation Support 100 Base-T Full Duplex 100 Base-T Half Duplex 10 Base-T Full Duplex 10 Base-T Full Duplex 10 Base-T Half Duplex 10 Base-T Half Duplex ♦ Low Operating Current: 75mA @ 3.3V, 150mA peak (typ) Average current depends on packet size and data rate. Typical average current ranges from 60 to 90 mA. ♦ Extended Temperature Range: -40 to +85°C ,%
  • 80. 5 ) @ ♦ Provides all of the hardware and software necessary to develop an embedded Ethernet solution using the CP220x ♦ The CMX Micronet TCP/IP protocol stack is included in an easy-to-use library format. ♦ A TCP/IP configuration wizard is provided to generate a highly customized library optimized for user-selected protocols ♦ Kit Contents CP2200-based Ethernet Development Board C8051F120 Target Board Part #: EthernetDK Universal Power Supply USB Debug Adapter 1 m Cat5e Cable, USB Cable, Serial Cable The Ethernet Development Kit is CD containing: available for $119 at www.silabs.com/ethernet. Silicon Labs IDE TCP/IP configuration wizard Evaluation version of the Keil C51 Tool Chain Source code examples and register definition files Documentation &'
  • 81. 5 ) ♦ CP2200 and RJ-45 connector provide Ethernet connectivity. ♦ 96-pin connector interfaces to ‘F120, ‘F020, and ‘F340 Target Boards. ♦ Prototyping area, switches, and LED’s facilitate development. &$
  • 82. +?+ # ;: ♦ Included in the Ethernet Development Kit Generates a highly customized library optimized for user-selected protocols Generates both the framework code and a project file that can be managed within the Silicon Labs IDE ♦ Host processor Flash memory requirements for Ethernet implementations range from 16.2 kB to 49.5 kB These are minimum memory requirement and do not include additional user code 16.2 kB implementation includes ARP, PING, UDP, & IP protocols 49.5 kB implementation includes DHCP, HTTP, FTP, TFTP, ARP, PING, TCP, UDP, & IP protocols &
  • 83. 5. 5 )
  • 84. + '$ 5 @ ♦ CP2201EB Evaluation Board ♦ Universal 9V Power Supply ♦ Standard Ethernet Cable (Blue) ♦ Crossover Ethernet Cable (Yellow) ♦ Evaluation Kit CD ♦ Quick Start Guide &
  • 85. + '$ 5 ♦ Demonstrates Small Size – Entire board is 1.25” x 1.50”. ♦ Uses the C8051F340 and the CP2201. ♦ Demonstrates Embedded Ethernet Connectivity. &(
  • 86. + '$ 5 @ ) ♦ Automatic Network Configuration using Netfinder ♦ Remote Monitoring and Control from a Web Browser ♦ Remote Monitoring and Control from HyperTerminal ♦ Sending E-mail from the Embedded System ♦ Updating Firmware over the Network &*
  • 87. ♦ This demonstration will implement a simple “Hello World” web server using the AB4 Ethernet Development Board and C8051F340 Target Board. ♦ The steps of the demonstration are: 1. Hardware Setup 2. Network Configuration 3. Software Generation &,
  • 88. 1 1. Connect the C8051F120 Target Board to the AB4 using their 96-pin connectors. 2. Connect an Ethernet cable to the RJ-45 connector on the AB4 and to a network jack (hub, switch, NIC, router, etc.). 3. Connect the 10-pin ribbon cable of the USB Debug Adapter to J4 on the ‘F120 Target Board. 4. Connect the USB cable to the USB Debug Adapter and to the PC. 5. Plug the power supply into P1 on the ‘F120 Target Board. USB Ethernet JTAG &&
  • 89. 3 ! # ♦ To determine a valid IP address for the Embedded Web Server: 1. Launch the TCP/IP Configuration Wizard. 2. Select the IP Addresses field under System Settings. 3. Go to Start Run then type cmd /K ipconfig. 4. Enter IP Address + 1 and Subnet Mask into the Source IP Address and Subnet Mask IP Address fields. Note: 169.254.236.193 + 1 = 169.254.236.194 &%
  • 90. # + ♦ My Network Places Right Click “Properties” ♦ Network and Dialup Connections Right Click “Local Area Connection” Select “Properties” ♦ Select Internet Protocol (TCP/IP) Click Properties Use the Following IP Address radio button Assign 10.10.10.80 Click OK (click OK on warning to use default subnet mask) ♦ Click OK…..PC IP address is now 10.10.10.80 %'
  • 91. # A 1) Select the following checkboxes: a) CP220x b) C8051F34x c) Ethernet d) TCP e) HTTP f) Click IP Addresses g) Assign source IP address as 10.10.10.168 %$
  • 92. # A 2) Generate Project Files: a) Select “File ->Generate Project.” b) Browse to destination folder. c) Press OK. 3) Open the output project (TCPIP_Project.wsp) in the Silicon Laboratories IDE. 4) Build the project and download to the C8051F340 target board. %
  • 93. # A 5) Press “Go.” After a few seconds, the link LED on the connector will turn on. 6) Launch a web browser and enter the IP address configured during Network Configuration. 7) The web browser will display the “Hello World” HTML document. %
  • 94. 555 &' 6 $(6 7 8 B Comprehensive Solutions with ZigBee
  • 95. 8 " 555 &' 6 $(6 (( # # ' " / ) A B " #$ ♦ Low power operation → longer battery life *# +, ♦ % &# '" $( # ' Flexible & dynamic network topologies # '" Star, Cluster-Tree & Mesh ♦ Security & reliability ! B A )--- . A B ♦ Limited to point-to-point or point-to- multipoint (star) configurations ## ' " ♦ Longer distance → more power → (( *# +, " shorter battery life %(
  • 96. " 8 802.15.4 or ZigBee Star or Point-to-Point ZigBee Only Cluster-Tree Coordinator (FFD) Mesh Routing Node (FFD) End Node (RFD) Range %*
  • 97. &' 6 $(6 ? 8 2 4 7) " BAND COVERAGE DATA RATE # OF CHANNEL(S) 2.4 GHz ISM Worldwide 250 kbps 16 868 MHz ISM Europe 20 kbps 1 915 MHz ISM Americas 40 kbps 10 *Current market offerings support either the 2.4 GHz or the 868/915 MHz ISM bands. %,
  • 98. " # Development Kits Modules MCUs ♦ ♦ 2.4 GHz ISM band operation ♦ Silicon Labs/Helicomm Low current consumption co-developed 8051- ♦ Helicomm ZigBee protocol ♦ High throughput 8051 based modules stack and tools CPU (up to 100 MIPS) ♦ Full drop-in wireless ♦ IEEE 802.15.4 PHY/MAC ♦ Up to 128 kB Flash/8 kB solution to ensure the evaluation RAM fastest time-to-market. ♦ USB interface ♦ Highest performance ♦ Chip antenna or ♦ 100 MIPs 8051 core integrated analog: up connector options to 24-bit ADCs; up to ♦ 128 kB Flash/8 kB RAM available 1 Msps ADCs ♦ JTAG connection for in-circuit ♦ Small footprint (3x3 mm) debug ♦ Power supply or 9 V battery operation %&
  • 99. 5 0 0 A ) ZigBee Demonstration GUI 802.15.4 Demonstration GUI ♦ ♦ Graphical representation of Graphical representation of the association and various ZigBee topologies disassociation of a star ♦ 13 different topology examples network included ♦ GUI can support additional ♦ Interactive GUI supports 3 boards to create a larger demo applications which can star network monitor data from any ♦ Interactive GUI allows the networked devices user to: Temperature Monitor the temperature Received Signal Strength and thumbwheel Indicator (RSSI) operation of each Thumbwheel (analog) development board Control the update rate and LED state of each development board Silicon Laboratories IDE ♦ Windows-based IDE Full-featured editor Full macro-assembler with evaluation C-compiler Full debugger support Support for 3rd party tools ♦ Configuration Wizard Automatically generate configuration code Full peripheral support for C8051 families Generates both C and assembly %%
  • 100. # 8 7 &' 6 $(6 ♦ Hardware platforms Microcontrollers Development kits/reference designs Drop-in modules ♦ Firmware & Software IEEE 802.15.4 MAC Full ZigBee protocol stack 802.15.4 demonstration GUI ZigBee demonstration GUI ♦ Development Tools Silicon Labs Integrated Development Environment $' '
  • 101. 6 .6