2. Summary on µPOST1 Removes many aspects of die to board assembly Die can be assembled directly onto copper based circuit boards Allows die to be fully tested at the wafer level with minimal cost Known good die program with board level build savings possible Save wafer real-estate For example 400 connections 2.5x2.5mm with 100µm spacing Enable for increased connections within existing die geometry Save on prototype/bring-up costs A device can be mounted onto a bring up board, within one day Further overall savings are possible Overall component height down to 0.2mm. Devices can be attached to yielded SMT boards 1. Micro-Precision-Optimised-Shaped-Termination , µPOST is pronounced Micro POST
3. µPOST formationuses a standard thermo-sonic bonding tool 1) Starts as normal, with ball formed on end of wire 3) Wire breaks as capillary rises, ready for new ball formation, whilst performing 100% connection pull test 2) Ball is attached & ultrasonically extruded into the capillary to form the characteristic µPOST shape
4. Save Wafer Real Estate The patented µPOST technology allows die to be designed with asymmetric sub 150µm area array pads. A typical die with 400 external connections…. 3.5x3.5mm with peripheral wire bond pads 4.5x4.5mm with 200µm full array solder bump 2.5x2.5mm with 100µm full array µPOST
5. Save Test NRE The µPOST technology allows die to be FULLY TESTED at the wafer level, using a simple pressure contact onto a multilayer board. Transmission line effects minimised to enable operational speed testing while containing costs Remove probe cards costs for 400 I/O die are around……. $20k and not suitable for hi-speed, analogue or hi-power. Pyramid and flex probe cards cost even more
6. Outperform BGA with µPOST Solder balls have a low height and a large radius Typically 100µm (h) x 100µm (w) on a 250µm pitch µPOST have superior height to radius For example 100µm (h) x 65µm (w) on a 100µm pitch Provides improved tolerance to mismatched Coeff. Thermal Expansion Improved mechanical and electrical characteristics with less cost Height( L ) Radius( r ) Force For a given displacement: A contact Half Height will receive 8 x Force A contact double Radius will receive 16 x Force Displacement The Euler-Bernoulli Beam Equation states Displacement equals (Force x L3 )/3(E x r4)
7. FEA Results The gold column stretches, in response to the strain, diffusing shear stress away from the attachment area Provide for a more reliable connection than lead free solder or tin Important in devices subject to mechanical shock during use (i.e cell phones) Displacement 23.5 µm Stress 131N/mm2
8. Save Assembly Costs µPOSTed die can be assembled directly onto copper based circuit boards. Simple, low cost, reliable connections Can be made using standard Ultrasonic or Thermosonic Can use conductive or non-conductive adhesive Can use a hot air gun Typical 400 I/O die would require FBGA technology Design charges ~$10k Lead Time 6 to 8 weeks Assembly Charges ~$1/unit @ 1M/month
9. Comparing BGA and µPOSTAssembly Wafers In Wafers In Mount on frame Dice Wafer Pick off frame Die Attach Wire bond Transfer mold Part mark Ball Attach Singulate Test Bake & Pack Screen Print Pick & Place Reflow Solder Final Test 1. Bond µPOSTs 2. Test 3. Mount on Frame 4. Dice Wafer 5. Pick off Frame 6. Tin coat Board 7. Apply glue 8. Hot Place Die 9. Final Test Boards Out Boards Out
10. Save on Prototype costs As soon as Wafers are available, a device can be µPOSTed and mounted onto a bring up board, easily within one day. Mounted using standard equipment Heated pick & place or pick & place and bake Typical Engineering lot for standard assembly…. $2k adder to standard assembly charge Min lot size ~ 50 units Lead time 3 days plus freight times
11. Further savings Overall component height down to 0.2mm. Mobile and handheld growth with high pin-count, high functionality devices can benefit Pre-underfill can be applied at wafer level. Superior to imbedded chip on board, significantly less handling Rapid attach to circuit board with support via pre-underfill Devices can be attached to yielded SMT boards using localised heating. After passive and SMD reflow the µPOST devices can be attached Possible development of test head and heated pick and place Allows for complete system test before device is committed to be attached No need for subsequent liquid encapsulation (‘glob top’) Speeding the assembly line and reducing operational costs Less raw materials, Pb free process. Less gold than BGA, no die attach material, no expensive laminate, no plastic encapsulation, no solder balls.
12. Conclusion Save wafer real-estate Save test NRE Save assembly costs Save on prototype/bring-up costs Further overall savings are possible with minimal development Contact Jim Palmer at jim.palmer@semidice.co.uk for further information
13. The COB technology provides an attractive alternative to packaging, saving on cost and time to market. We are keen on the µPOST technology for these obvious benefits as well as providing improved RF performance. We are looking forward to see the wide adoption of the technology by board assemblers”. EbrahimBusherhri, Lime Micro, http://www.limemicro.com/ “Micropost interconnect technology has the potential to both shave time off the critical package design/NPI schedule, and offer a rapid route to the benefits of minimum size packaging.” Mike Warren, Frontier Silicon, http://www.frontier-silicon.com/ What the customers say …
Hinweis der Redaktion
Save wafer real-estateMore connections per die geometry due to improved pin densityEnables greater pin-out, better CTE tolerance and less transmission line effectsSave test NREWafer level die testing facilitating known good die program improving yieldTurn your die into a probe head and pressure contact to board a fully functional system testSave assembly costsDie can be mounted directly to the circuit boardUses standard pick & place, benefits of imbedded with none of the costsSave on prototype/bring-up costsA device can be uPost processed and mounted onto a bring up board within one dayRapid die to operational bring up board, 400 µPOST’s attached in around 10 minutesFurther overall savings possibleFunctional die per wafer increased, less handling, better imbedding solutionsDie could be tested in-circuit of complete system before final attachmentNext StepContact SemiDice to understand further how you can For instance we can provide a BGA de-process to enable early µPOST samples