1. 8051 MEMORY & I/O ADDRESSING

2. Memory Addressing

3. PROGRAM MEMORY - ROM ROM ( READ ONLYMEMORY ) 8051 can address 4K bytes on chip memory – map range 0000 TO 0FFFh IT can address 64 KB external memory map range – 0000 TO FFFFh Memory map of internal and external program overlaps The internal and external ROM distinguished by PSEN’ signal ROM less version of 8051 – PSEN’ used to access external memory

4. ROM - program

5. DATA MEMORY - RAM EXTERNAL RAM 8051 supports 64KB external data memory- range – 0000 to FFFFh Accessed by DPTR 8051 generates RD’, WR’ during external access . CS’ can be derived from address lines

6. ONCHIP (INTERNAL) RAM

7. RAM

8. INTERNAL RAM

9. Registers 1F 18 Bank 3 Four Register Banks Each bank has R0-R7 Selectable by psw.2,3 17 10 Bank 2 0F 08 Bank 1 07 06 05 04 03 02 01 00 R7 R6 R5 R4 R3 R2 R1 R0 Bank 0

10. Bit Addressable Memory 2F 2E 2D 2C 2B 2A 29 28 20h – 2Fh (16 locations X 8-bits = 128 bits) Bit addressing: mov C, 1Ah or mov C, 23h.2 27 26 25 24 23 22 21 20

12. CONTROL registers

13. Timers

14. Serial ports

15. Interrupt system

16. Analog to Digital converter

17. Digital to Analog converter

18. Etc.Addresses 80h – FFh Direct Addressing used to access SPRs

19. I/O ADDRESSING

20. I/O INTERFACING External i/o devices are interfaced as memorymapped i/o devices Devicestreated as externalmemory locations and consume externalmemoryaddress The address of external program and data memorymayoverlap