SPICE MODEL of 2SJ652 (Standard+BDS Model) in SPICE PARK

Device Modeling Report

COMPONENTS: Power MOSFET (Model Parameters)
PART NUMBER: 2SJ652
MANUFACTURER: SANYO
Body Diode (Model Parameters) / ESD Protection Diode

Bee Technologies Inc.

All Rights Reserved Copyright (c) Bee Technologies Inc. 2008
1

MOSFET MODEL
PSpice model
Model description
parameter
LEVEL
L Channel Length
W Channel Width
KP Transconductance
RS Source Ohmic Resistance
RD Ohmic Drain Resistance
VTO Zero-bias Threshold Voltage
RDS Drain-Source Shunt Resistance
TOX Gate Oxide Thickness
CGSO Zero-bias Gate-Source Capacitance
CGDO Zero-bias Gate-Drain Capacitance
CBD Zero-bias Bulk-Drain Junction Capacitance
MJ Bulk Junction Grading Coefficient
PB Bulk Junction Potential
FC Bulk Junction Forward-bias Capacitance Coefficient
RG Gate Ohmic Resistance
IS Bulk Junction Saturation Current
N Bulk Junction Emission Coefficient
RB Bulk Series Resistance
PHI Surface Inversion Potential
GAMMA Body-effect Parameter
DELTA Width effect on Threshold Voltage
ETA Static Feedback on Threshold Voltage
THETA Mobility Modulation
KAPPA Saturation Field Factor
VMAX Maximum Drift Velocity of Carriers
XJ Metallurgical Junction Depth
UO Surface Mobility

2

Transconductance Characteristic

Circuit Simulation Result

45
Measurement
40
Simulation
35

30

25
gfs(S)

20

15

10

5

0
0.0 10.0 20.0 30.0 40.0 50.0

Drain Current ID (-A)
Comparison table

gfs(S)
-Id(A) Error (%)
Measurement Simulation
1.0000 9.000 9.414 4.60
2.0000 12.500 12.814 2.51
5.0000 18.600 18.857 1.38
10.0000 25.400 24.736 -2.61
20.0000 32.200 31.729 -1.46
50.0000 41.500 42.357 2.07

3

Vgs-Id Characteristic

Circuit Simulation result
-50A

-40A

-30A

-20A

-10A

0A
0V -1.0V -2.0V -3.0V -4.0V -5.0V
I(V3)
V_V1

Evaluation circuit

V3

0Vdc

V2
U1
2SJ652 -10
V1

0Vdc

0

4

Comparison Graph


Simulation Result

-VGS(V)
-ID(A) Error (%)
1 2.450 2.421 -1.20
2 2.550 2.510 -1.56
5 2.700 2.698 -0.06
10 2.900 2.927 0.92
20 3.250 3.279 0.89
50 4.100 4.079 -0.51

5

Rds(on) Characteristic

-14A

-13A

-12A

-11A

-10A

-9A

-8A
-7A

-6A
-5A

-4A

-3A

-2A

-1A

0A
0V -100mV -200mV -300mV -400mV
I(V3)
V_VDS

Evaluation circuit
V3

0Vdc

VDS

U1 0Vdc
2SJ652
V1

-10

0

Simulation Result

ID=-14A, VGS=-10V Measurement Simulation Error (%)
R DS (on) mΩ 28.500 28.500 0.00

6

Gate Charge Characteristic
-10V

-9V

-8V

-7V

-6V

-5V

-4V

-3V

-2V

-1V

0V
0 10n 20n 30n 40n 50n 60n 70n 80n
V(W1:4)
Time*1mA
Evaluation circuit

U1
ION = 0uA 2SJ652 I2
I1 = 0 IOFF = 1mA D2 28
I2 = 1m W Dbreak
TD = 0 I1 -
TR = 5n +
TF = 5n VDD
PW = 600u W1
PER = 1000u
-30

0

Simulation Result

VDD=-30V,ID=-28A
Measurement Simulation Error (%)
,VGS=-10V
Qgs nC 15.000 15.035 0.23
Qgd nC 12.000 11.958 -0.35
Qg nC 80.000 57.746 -27.82

7

Capacitance Characteristic

Measurement
Simulation

Simulation Result

Cbd(pF)
VSD(V) Error(%)
0 810.000 810.000 0.000
5 280.000 279.250 -0.268
10 195.000 196.900 0.974
15 160.000 158.800 -0.750
20 135.000 135.900 0.667
25 120.000 120.265 0.221
30 110.000 108.755 -1.132

8

Switching Time Characteristic


-14V

-12V

-10V

-8V

-6V

-4V

-2V

0V
0.6us 0.7us 0.8us 0.9us 1.0us 1.1us 1.2us 1.3us
V(U1:G) V(U1:D)/3
Time

Evaluation circuit

L2 RL

50nH 2.1

R1 L1
U1
PER = 20u 2SJ652 VDD
PW = 10u 30nH -30Vdc
TF = 5n 50 R2
TR = 5n 50
TD = 1u
V2 = 20 V2
V1 = 0

0

Simulation Result

ID=-14A, VDD=-30V
Measurement Simulation Error(%)
VGS=0/-10V
td(on) ns 33.000 33.016 0.05

9

Output Characteristic


-50A
-4
-10 -6

-40A

-30A

-20A

VGS=-3V
-10A

0A
0V -0.5V -1.0V -1.5V -2.0V -2.5V -3.0V -3.5V -4.0V -4.5V
I(V3)
V_V2

Evaluation circuit

V3

0Vdc

V2
U1
2SJ652
-5

V1

0

0

10

BODY DIODE SPICE MODEL
Forward Current Characteristic

70A

10A

1.0A

100mA

10mA

1.0mA
0V 0.3V 0.6V 0.9V 1.2V 1.5V
I(Vsense)
V_VDS

Evaluation Circuit

Vsense

0Vdc

VDS U1
2SJ652

0

11

Comparison Graph


Measurement

Simulation
10.000
Drain reverse current IDR (-A)

1.000

0.100

0.010

0.001
0 0.3 0.6 0.9 1.2 1.5

Source - Drain voltage VSD (-V)
Simulation Result

VSD(-V)
IDR(-A) %Error
0.001 0.5000 0.4973 -0.53
0.01 0.5600 0.5595 -0.08
0.1 0.6200 0.6223 0.38
1 0.6950 0.6913 -0.53
2 0.7200 0.7176 -0.33
5 0.7600 0.7641 0.54
10 0.8150 0.8150 0.00
20 0.8900 0.8882 -0.20
50 1.0500 1.0505 0.05

12

Reverse Recovery Characteristic

400mA

300mA

200mA

100mA

-0mA

-100mA

-200mA

-300mA

-400mA
0.2us 0.6us 1.0us 1.4us 1.8us 2.2us
I(R1)
Time

Evaluation Circuit

R1

50

V1 = -9.4v V1
V2 = 10.6v U1
TD = 90ns 2SJ652
TR = 10ns
TF = 10ns
PW = 1us
PER = 100us

0

Compare Measurement vs. Simulation

Measurement Simulation Error (%)
trj ns 28.000 27.853 -0.52

13

Reverse Recovery Characteristic Reference

Measurement

Trj=28.00(ns)
Trb=72.00(ns)
Conditions:Ifwd=lrev=0.2(A),Rl=50

Example

Relation between trj and trb

14

ESD PROTECTION DIODE SPICE MODEL
Zener Voltage Characteristic

-10mA

-8mA

-6mA

-4mA

-2mA

0A
0V -10V -20V -30V -40V -50V
I(R1)
V_V1

Evaluation Circuit

R1

0.001m U1
2SJ652

V1

0Vdc
R2

100MEG

0

15

Zener Voltage Characteristic Reference

16

SPICE MODEL of 2SJ652 (Standard+BDS Model) in SPICE PARK

Empfohlen

Empfohlen

Weitere ähnliche Inhalte

Was ist angesagt?

Was ist angesagt? (20)

Andere mochten auch

Andere mochten auch (9)

Ähnlich wie SPICE MODEL of 2SJ652 (Standard+BDS Model) in SPICE PARK

Ähnlich wie SPICE MODEL of 2SJ652 (Standard+BDS Model) in SPICE PARK (20)

Mehr von Tsuyoshi Horigome

Mehr von Tsuyoshi Horigome (20)

Kürzlich hochgeladen

Kürzlich hochgeladen (20)

SPICE MODEL of 2SJ652 (Standard+BDS Model) in SPICE PARK