Automate the testing of the 100's of devices used in design kit verification of wire models. The models require verification over all the allowed geometry, level combinations, and temperature range allowed by the design rules.
3. ∗ Automate the I/V testing of wires for design kit
verification
∗ Use device geometry and design level already
available to the test executive at test time
∗ Create a test definition useable across
technologies
∗ Test definition requires only a single definition
of technology specific parameters
August 20133
Goal
4. ∗ Wire resistance dependent on level, width, and device
length and space
∗ Current must not create self heating
∗ Testing done with current in 1 – 2 – 5 steps
∗ Net: forced current can be different on each device
with hundreds of devices to test
August 20134
Background
5. ∗ Need “simple model” for wire resistance
∗ Start with a table of resistance values from the
technology definition derived from all the process
factors that influence wire resistance
August 20135
Development - model for test
Level
on-wafer
line width
line
resistance
per unit
length
1 M1 0.40 18.3
2 M1 0.60 10.5
3 M1 0.80 7.0
6. ∗ Need “simple model” for wire resistance
∗ Direct fit is a power function – not desirable
August 20136
Development - model for test (cont.)
– Need function with less potential error, particularly at
the range limits
Wire Resistance y = 0.2826x
-1.2615
R
2
= 0.9961
Line Width
Resistance
7. ∗ Need “simple model” for wire resistance
∗ Solution: Transform line width to squares/unit length
August 20137
Development – model for test (cont.)
– Result: Well behaved second order polynomial with
small coefficients and exceptional correlation
Wire Resistance y = 0.0141x
2
+ 0.3971x - 0.2421
R
2
= 0.9992
Squares/unit length
Resistance
8. ∗ Use the “simple Model” for wire resistance combined with the
known device width and length, and target voltage drop to
compute target current
∗ Set the fitting coefficients from “simple model” and target
voltage drop aspects in the test definition
∗ Set the number of points in the sweep
∗ Use high precision DVM to measure voltage across the Kelvin
terminals
∗ Force currents set by the test script on a device instance basis
∗ DVM measurement and force current saved for each sweep
point
August 20138
Development – test script
9. August 20139
Results - wire resistance, thin metal
Resistance
Line Width
Narrow Thin Metal Resistance
Measurement
Model Nominal
Model Maximum
Model Minimum
∗ Measurements and model in excellent agreement
10. ∗ Measurements and model in excellent agreement
August 201310
Results - wire resistance, thick metal
Resistance
Line Width
Wide Thick Metal Resistance
Measurement
Model Nominal
Model Maximum
Model Minimum
11. ∗ New test script process
∗ Single test definition customized with aspects
∗ Force values computed at test execution time for each
device instance
∗ Low measurement uncertainty
∗ Excellent agreement between measurement and
model for thin and thick metal
August 201311
Summary