1. Silicon Schottky Barriers Modified with Atomic Layer Deposited Alumina
Brandon K. Horton, Rod Marstell, Nicholas C. Strandwitz
Materials Science and Engineering & Center for Advanced Materials and Nanotechnology, Lehigh University
Introduction
Conclusions
• Fermi-level de-pinning from addition of insulating layer
• Further barrier modification possible through additional
deposited layers
• Insulating layer makes p-Si/ Al2O3 /Al device a
noteworthy solar cell
References1. J. Tersoff, Phys. Rev. Lett. 52, 465 (1984)
2. S. M. George. Chem. Rev. 110 (1), 111-131 (2010)
3. D. Connelly, C. Faulkner, D. E. Grupp, and J. S. Harris, IEEE Trans. Nanotechnol. 3, 98 (2004)
4. R. J. Stirn and Y. C. M. Yeh, IEEE Trans. On Electronic Devices, 24, 4 (1977)
5. D. K. Schroder, Semiconductor Material and Device Characterization. Wiley, NY (1990)
Acknowledgements
We acknowledge Ling Ju for her assistance on operating several of our data-
measuring devices, as well as helpful discussion with her on this research
topic. We also acknowledge the National Science Foundation for funding
(Grant PHY-1359195) during the summer that this research took place.
Fabricated Metal-Insulator-Semiconductor (MIS) devices
with varying insulator thicknesses:
• Used ALD to grow Al2O3 layers on silicon.
Thickness ranges from 0-44 ALD cycles (1 Å/cycle)
• Al evaporated on Al2O3 as metal contacts
Experiment
Intimate contact for n and p-type yields similar barrier heights
• 0.07 eV barrier height difference
Addition of 11 ALD cycles alleviates Fermi-level pinning
• 0.54 eV barrier height difference
Barrier Height vs Thickness
Given high enough ΦBH, device can produce photo-current4
Open Circuit Voltage
Both p-type and n-type Si exhibit similar current-voltage
characteristics when no insulating layer is deposited
After insulatinglayer added:
• n-type: Ohmic contact
• p-type: Rectifying contact (Diode)
Current-Voltage
# of
ALD P-Type Si N-Type Si
0 0.52±0.01 0.45±0.01
11 0.94±0.01 0.40±0.01
18 0.89±0.01 0.49±0.01
26 0.86±0.02 0.75±0.02
33 0.81±0.05 0.78±0.03
44 N/A 0.82±0.02
Nearly all electronic devices contain metal-semiconductor
contacts. The Schottky barrier height (ΦBH) determines the
properties of these contacts:
• ΦBH is largely independent of specific metal used due to
Fermi-level pinning by metal-induced gap states1
• Interface modification by atomic layer deposition
(ALD) is a potential solution2
Theory
Addition of insulatinglayer between MS contact:3
• Alleviates metal induced gap states
• Charge carriers can still tunnel
• Allows further tuning of Schottky barrier height
Large tunnel resistance after 33 cycles of ALD
Open-circuit voltage also exhibits rapid change from Fermi-level
de-pinning
• Considerably high open-circuit voltage (Voc)
• Correlates with increase in ΦBH after insulator deposition
Barrier Height ΦBH (eV)
p-type: Increasing insulator
thickness  decreasing Schottky
barrier
n-type: Increasing insulator
thickness  increasing Schottky
barrier
Pre-Al Annealing (450°C)
Capacitance
Some samples annealed before Al evaporation step
• Thermal annealing may alter ΦBH
No significant effect seen between annealed and un-annealed samples
ΦBH can also be calculated through capacitance measurements5
• Depends on x-intercept of linear fit of 1/C2
• Calculated ΦBH is often higher than that from current-voltage
measurements
• Noticeable relationship between x-intercept and ALD cycles
Although ΦBH for capacitance measurements is slightly higher, it
exhibits similar trend to current-voltage measurements