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[object Object],[object Object],X64 Workshop – Driving the Platform
Day 1 AM Driving A Platform: Agenda  ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
X64 Workshop Introduction ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],The X64 Family
X64 Workshop Introduction ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],The X64 Family – U20 / U24 / U40 (M2)
X64 Workshop Introduction ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],The X64 Family – V20z/V40z
X64 Workshop Introduction ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],The X64 Family – X2100 / X2100 M2 / X2200 M2
X64 Workshop Introduction ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],The X64 Family – X4100 (M2) / X4200 (M2)
X64 Workshop Introduction ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],The X64 Family – X4500
X64 Workshop Introduction ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],The X64 Family – X4600 (M2)
Family - 1st Gen AMD Opteron Systems
Family - 2 nd  Gen AMD Opteron Systems
AMD Opteron Identification First generation AMD Opteron CPU's use a three digit identifier – XYY; X – Family scalability YY – Relative performance Second generation AMD Opteron CPU's use a four digit identifier – XYZZ; X – Family scalability Y – Socket generation ZZ – Relative performance Model suffixes denote high or low power versions – SE or HE
X64 Workshop Introduction ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],The X64 Family – Intel Differences
HyperTransport Overview ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
QuickPath Overview ,[object Object],[object Object]
AMD HyperTransport Technology
Intel QuickPath Technology
System Features Summary
BIOS Overview The Role Of BIOS ,[object Object],[object Object],[object Object],[object Object],[object Object]
BIOS Overview Continued BIOS Startup ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
BIOS Overview Continued The Functions Of BIOS ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
BIOS Overview Continued The Functions Of BIOS ,[object Object],[object Object],[object Object],[object Object],[object Object]
Service Processor ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],Introduction to the SP
Service Processor Continued ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],SP Connectivity
Service Processor Continued ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],SP Functionality
Service Processor Continued ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],SP Management
Service Processor Continued ,[object Object],[object Object],[object Object],[object Object],[object Object],Connecting to the Console
Service Processor Continued ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],SP Console – KVMS / JavaR
Service Processor Continued ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],SP Console – Serial / LAN
Service Processor Comparison
Service Processor Comparison
Host ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Useful Links ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Lab Connecting To Remote iLOM Platforms ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
[object Object],[object Object],X64 Workshop – Driving the Platform

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Driving The Platform 2

Hinweis der Redaktion

  1. Power on -> CPU loads BIOS Boot Program -> POST -> looks for BIOSes on optional cards such as GPU, HDD, etc ->You can break into BIOS at this stage to change or confirm BIOS setting -> memory tests and performs system inventory -> detect plug and play devices -> BIOS searches for a bootable device BIOS determiens whether it is a cold boot or a reboot...if it's a reboot then POST is skipped.
  2. Global states; G0 normal working G1 is sleep or standby – several levels depending on implementation G2 is soft off – some components retain power – can be woken up by attached device (kbd, etc) – still requires boot so cannot resume OS G3 is mechanical off PIC allows 16 IRQ's APIC requires both IO and Local APICS to create a APIC bus Edge-triggered interrupts result in all associated interrupt sector routines being run against a particular interrupt vector and 'hopes' that whatever caused the interrupt is corrected. Level-triggered interrupts a device 'drives' the signal to it's active level where it is held until serviced, the problem is when you have multiple devices sharing the same interrupt – status change in these devices won't be detected until the original event is serviced.
  3. We use both IPMI 1.5 (x2100) and IPMI 2.0 IPMI consists of the BMC and satellite controllers around the system, sensors report to the BMC via the IPMB (Intelligent Platform Management Bus – a sort of I2C bus. Adminc use the BMC to remotely control system state
  4. Galaxy health state = all manage system state remotely only via ipmi, Web and CLI
  5. KVMS = Keyboard, Video, Mouse & Storage Absolute = grid reference Relative = movement is offset against last known mouse position Relative is considered to allow 'finer' mouse movement but can also lead to mouse jumps and erratic movement.